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path: root/drivers/usb/dwc2/platform.c
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Diffstat (limited to 'drivers/usb/dwc2/platform.c')
-rw-r--r--drivers/usb/dwc2/platform.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index c0b64d483552..d10a7f8daec3 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -230,9 +230,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
230 230
231 reset_control_deassert(hsotg->reset_ecc); 231 reset_control_deassert(hsotg->reset_ecc);
232 232
233 /* Set default UTMI width */
234 hsotg->phyif = GUSBCFG_PHYIF16;
235
236 /* 233 /*
237 * Attempt to find a generic PHY, then look for an old style 234 * Attempt to find a generic PHY, then look for an old style
238 * USB PHY and then fall back to pdata 235 * USB PHY and then fall back to pdata
@@ -280,14 +277,14 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
280 * width is 8-bit and set the phyif appropriately. 277 * width is 8-bit and set the phyif appropriately.
281 */ 278 */
282 if (phy_get_bus_width(hsotg->phy) == 8) 279 if (phy_get_bus_width(hsotg->phy) == 8)
283 hsotg->phyif = GUSBCFG_PHYIF8; 280 hsotg->params.phy_utmi_width = 8;
284 } 281 }
285 282
286 /* Clock */ 283 /* Clock */
287 hsotg->clk = devm_clk_get(hsotg->dev, "otg"); 284 hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
288 if (IS_ERR(hsotg->clk)) { 285 if (IS_ERR(hsotg->clk)) {
289 hsotg->clk = NULL; 286 dev_err(hsotg->dev, "cannot get otg clock\n");
290 dev_dbg(hsotg->dev, "cannot get otg clock\n"); 287 return PTR_ERR(hsotg->clk);
291 } 288 }
292 289
293 /* Regulators */ 290 /* Regulators */
@@ -481,6 +478,15 @@ static int dwc2_driver_probe(struct platform_device *dev)
481 hsotg->gadget_enabled = 1; 478 hsotg->gadget_enabled = 1;
482 } 479 }
483 480
481 hsotg->reset_phy_on_wake =
482 of_property_read_bool(dev->dev.of_node,
483 "snps,reset-phy-on-wake");
484 if (hsotg->reset_phy_on_wake && !hsotg->phy) {
485 dev_warn(hsotg->dev,
486 "Quirk reset-phy-on-wake only supports generic PHYs\n");
487 hsotg->reset_phy_on_wake = false;
488 }
489
484 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 490 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
485 retval = dwc2_hcd_init(hsotg); 491 retval = dwc2_hcd_init(hsotg);
486 if (retval) { 492 if (retval) {