diff options
Diffstat (limited to 'drivers/scsi/csiostor/csio_lnode.c')
-rw-r--r-- | drivers/scsi/csiostor/csio_lnode.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/scsi/csiostor/csio_lnode.c b/drivers/scsi/csiostor/csio_lnode.c index ffe9be04dc39..87f9280d9b43 100644 --- a/drivers/scsi/csiostor/csio_lnode.c +++ b/drivers/scsi/csiostor/csio_lnode.c | |||
@@ -603,7 +603,7 @@ csio_ln_vnp_read_cbfn(struct csio_hw *hw, struct csio_mb *mbp) | |||
603 | enum fw_retval retval; | 603 | enum fw_retval retval; |
604 | __be32 nport_id; | 604 | __be32 nport_id; |
605 | 605 | ||
606 | retval = FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16)); | 606 | retval = FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16)); |
607 | if (retval != FW_SUCCESS) { | 607 | if (retval != FW_SUCCESS) { |
608 | csio_err(hw, "FCOE VNP read cmd returned error:0x%x\n", retval); | 608 | csio_err(hw, "FCOE VNP read cmd returned error:0x%x\n", retval); |
609 | mempool_free(mbp, hw->mb_mempool); | 609 | mempool_free(mbp, hw->mb_mempool); |
@@ -770,7 +770,7 @@ csio_ln_read_fcf_cbfn(struct csio_hw *hw, struct csio_mb *mbp) | |||
770 | (struct fw_fcoe_fcf_cmd *)(mbp->mb); | 770 | (struct fw_fcoe_fcf_cmd *)(mbp->mb); |
771 | enum fw_retval retval; | 771 | enum fw_retval retval; |
772 | 772 | ||
773 | retval = FW_CMD_RETVAL_GET(ntohl(rsp->retval_len16)); | 773 | retval = FW_CMD_RETVAL_G(ntohl(rsp->retval_len16)); |
774 | if (retval != FW_SUCCESS) { | 774 | if (retval != FW_SUCCESS) { |
775 | csio_ln_err(ln, "FCOE FCF cmd failed with ret x%x\n", | 775 | csio_ln_err(ln, "FCOE FCF cmd failed with ret x%x\n", |
776 | retval); | 776 | retval); |
@@ -1506,7 +1506,7 @@ csio_fcoe_fwevt_handler(struct csio_hw *hw, __u8 cpl_op, __be64 *cmd) | |||
1506 | } | 1506 | } |
1507 | } else if (cpl_op == CPL_FW6_PLD) { | 1507 | } else if (cpl_op == CPL_FW6_PLD) { |
1508 | wr = (struct fw_wr_hdr *) (cmd + 4); | 1508 | wr = (struct fw_wr_hdr *) (cmd + 4); |
1509 | if (FW_WR_OP_GET(be32_to_cpu(wr->hi)) | 1509 | if (FW_WR_OP_G(be32_to_cpu(wr->hi)) |
1510 | == FW_RDEV_WR) { | 1510 | == FW_RDEV_WR) { |
1511 | 1511 | ||
1512 | rdev_wr = (struct fw_rdev_wr *) (cmd + 4); | 1512 | rdev_wr = (struct fw_rdev_wr *) (cmd + 4); |
@@ -1574,17 +1574,17 @@ out_pld: | |||
1574 | return; | 1574 | return; |
1575 | } else { | 1575 | } else { |
1576 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", | 1576 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", |
1577 | FW_WR_OP_GET(be32_to_cpu((wr->hi)))); | 1577 | FW_WR_OP_G(be32_to_cpu((wr->hi)))); |
1578 | CSIO_INC_STATS(hw, n_cpl_unexp); | 1578 | CSIO_INC_STATS(hw, n_cpl_unexp); |
1579 | } | 1579 | } |
1580 | } else if (cpl_op == CPL_FW6_MSG) { | 1580 | } else if (cpl_op == CPL_FW6_MSG) { |
1581 | wr = (struct fw_wr_hdr *) (cmd); | 1581 | wr = (struct fw_wr_hdr *) (cmd); |
1582 | if (FW_WR_OP_GET(be32_to_cpu(wr->hi)) == FW_FCOE_ELS_CT_WR) { | 1582 | if (FW_WR_OP_G(be32_to_cpu(wr->hi)) == FW_FCOE_ELS_CT_WR) { |
1583 | csio_ln_mgmt_wr_handler(hw, wr, | 1583 | csio_ln_mgmt_wr_handler(hw, wr, |
1584 | sizeof(struct fw_fcoe_els_ct_wr)); | 1584 | sizeof(struct fw_fcoe_els_ct_wr)); |
1585 | } else { | 1585 | } else { |
1586 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", | 1586 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", |
1587 | FW_WR_OP_GET(be32_to_cpu((wr->hi)))); | 1587 | FW_WR_OP_G(be32_to_cpu((wr->hi)))); |
1588 | CSIO_INC_STATS(hw, n_cpl_unexp); | 1588 | CSIO_INC_STATS(hw, n_cpl_unexp); |
1589 | } | 1589 | } |
1590 | } else { | 1590 | } else { |
@@ -1668,12 +1668,12 @@ csio_ln_prep_ecwr(struct csio_ioreq *io_req, uint32_t wr_len, | |||
1668 | __be32 port_id; | 1668 | __be32 port_id; |
1669 | 1669 | ||
1670 | wr = (struct fw_fcoe_els_ct_wr *)fw_wr; | 1670 | wr = (struct fw_fcoe_els_ct_wr *)fw_wr; |
1671 | wr->op_immdlen = cpu_to_be32(FW_WR_OP(FW_FCOE_ELS_CT_WR) | | 1671 | wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_FCOE_ELS_CT_WR) | |
1672 | FW_FCOE_ELS_CT_WR_IMMDLEN(immd_len)); | 1672 | FW_FCOE_ELS_CT_WR_IMMDLEN(immd_len)); |
1673 | 1673 | ||
1674 | wr_len = DIV_ROUND_UP(wr_len, 16); | 1674 | wr_len = DIV_ROUND_UP(wr_len, 16); |
1675 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID(flow_id) | | 1675 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(flow_id) | |
1676 | FW_WR_LEN16(wr_len)); | 1676 | FW_WR_LEN16_V(wr_len)); |
1677 | wr->els_ct_type = sub_op; | 1677 | wr->els_ct_type = sub_op; |
1678 | wr->ctl_pri = 0; | 1678 | wr->ctl_pri = 0; |
1679 | wr->cp_en_class = 0; | 1679 | wr->cp_en_class = 0; |
@@ -1757,7 +1757,7 @@ csio_ln_mgmt_submit_wr(struct csio_mgmtm *mgmtm, struct csio_ioreq *io_req, | |||
1757 | csio_wr_copy_to_wrp(pld->vaddr, &wrp, wr_off, im_len); | 1757 | csio_wr_copy_to_wrp(pld->vaddr, &wrp, wr_off, im_len); |
1758 | else { | 1758 | else { |
1759 | /* Program DSGL to dma payload */ | 1759 | /* Program DSGL to dma payload */ |
1760 | dsgl.cmd_nsge = htonl(ULPTX_CMD(ULP_TX_SC_DSGL) | | 1760 | dsgl.cmd_nsge = htonl(ULPTX_CMD_V(ULP_TX_SC_DSGL) | |
1761 | ULPTX_MORE | ULPTX_NSGE(1)); | 1761 | ULPTX_MORE | ULPTX_NSGE(1)); |
1762 | dsgl.len0 = cpu_to_be32(pld_len); | 1762 | dsgl.len0 = cpu_to_be32(pld_len); |
1763 | dsgl.addr0 = cpu_to_be64(pld->paddr); | 1763 | dsgl.addr0 = cpu_to_be64(pld->paddr); |