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-rw-r--r--drivers/rtc/Kconfig69
-rw-r--r--drivers/rtc/Makefile6
-rw-r--r--drivers/rtc/dev.c5
-rw-r--r--drivers/rtc/lib.c6
-rw-r--r--drivers/rtc/rtc-88pm80x.c21
-rw-r--r--drivers/rtc/rtc-88pm860x.c21
-rw-r--r--drivers/rtc/rtc-ab-eoz9.c465
-rw-r--r--drivers/rtc/rtc-abx80x.c71
-rw-r--r--drivers/rtc/rtc-cadence.c423
-rw-r--r--drivers/rtc/rtc-coh901331.c6
-rw-r--r--drivers/rtc/rtc-ds1307.c707
-rw-r--r--drivers/rtc/rtc-ds1672.c3
-rw-r--r--drivers/rtc/rtc-hym8563.c2
-rw-r--r--drivers/rtc/rtc-imx-sc.c21
-rw-r--r--drivers/rtc/rtc-isl1208.c167
-rw-r--r--drivers/rtc/rtc-mc146818-lib.c2
-rw-r--r--drivers/rtc/rtc-meson.c407
-rw-r--r--drivers/rtc/rtc-pcf85063.c46
-rw-r--r--drivers/rtc/rtc-pcf8523.c29
-rw-r--r--drivers/rtc/rtc-pic32.c34
-rw-r--r--drivers/rtc/rtc-pm8xxx.c6
-rw-r--r--drivers/rtc/rtc-rs5c372.c76
-rw-r--r--drivers/rtc/rtc-rv3028.c732
-rw-r--r--drivers/rtc/rtc-rv8803.c15
-rw-r--r--drivers/rtc/rtc-rx8581.c114
-rw-r--r--drivers/rtc/rtc-s3c.c87
-rw-r--r--drivers/rtc/rtc-sd3078.c231
-rw-r--r--drivers/rtc/rtc-snvs.c6
-rw-r--r--drivers/rtc/rtc-tx4939.c26
-rw-r--r--drivers/rtc/rtc-wilco-ec.c177
-rw-r--r--drivers/rtc/rtc-zynqmp.c18
31 files changed, 3421 insertions, 578 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 225b0b8516f3..a71734c41693 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -185,6 +185,16 @@ config RTC_DRV_ABB5ZES3
185 This driver can also be built as a module. If so, the module 185 This driver can also be built as a module. If so, the module
186 will be called rtc-ab-b5ze-s3. 186 will be called rtc-ab-b5ze-s3.
187 187
188config RTC_DRV_ABEOZ9
189 select REGMAP_I2C
190 tristate "Abracon AB-RTCMC-32.768kHz-EOZ9"
191 help
192 If you say yes here you get support for the Abracon
193 AB-RTCMC-32.768kHz-EOA9 I2C RTC chip.
194
195 This driver can also be built as a module. If so, the module
196 will be called rtc-ab-e0z9.
197
188config RTC_DRV_ABX80X 198config RTC_DRV_ABX80X
189 tristate "Abracon ABx80x" 199 tristate "Abracon ABx80x"
190 select WATCHDOG_CORE if WATCHDOG 200 select WATCHDOG_CORE if WATCHDOG
@@ -601,9 +611,10 @@ config RTC_DRV_RX8010
601 will be called rtc-rx8010. 611 will be called rtc-rx8010.
602 612
603config RTC_DRV_RX8581 613config RTC_DRV_RX8581
604 tristate "Epson RX-8581" 614 tristate "Epson RX-8571/RX-8581"
605 help 615 help
606 If you say yes here you will get support for the Epson RX-8581. 616 If you say yes here you will get support for the Epson RX-8571/
617 RX-8581.
607 618
608 This driver can also be built as a module. If so the module 619 This driver can also be built as a module. If so the module
609 will be called rtc-rx8581. 620 will be called rtc-rx8581.
@@ -626,6 +637,15 @@ config RTC_DRV_EM3027
626 This driver can also be built as a module. If so, the module 637 This driver can also be built as a module. If so, the module
627 will be called rtc-em3027. 638 will be called rtc-em3027.
628 639
640config RTC_DRV_RV3028
641 tristate "Micro Crystal RV3028"
642 help
643 If you say yes here you get support for the Micro Crystal
644 RV3028.
645
646 This driver can also be built as a module. If so, the module
647 will be called rtc-rv3028.
648
629config RTC_DRV_RV8803 649config RTC_DRV_RV8803
630 tristate "Micro Crystal RV8803, Epson RX8900" 650 tristate "Micro Crystal RV8803, Epson RX8900"
631 help 651 help
@@ -646,6 +666,15 @@ config RTC_DRV_S5M
646 This driver can also be built as a module. If so, the module 666 This driver can also be built as a module. If so, the module
647 will be called rtc-s5m. 667 will be called rtc-s5m.
648 668
669config RTC_DRV_SD3078
670 tristate "ZXW Crystal SD3078"
671 help
672 If you say yes here you get support for the ZXW Crystal
673 SD3078 RTC chips.
674
675 This driver can also be built as a module. If so, the module
676 will be called rtc-sd3078
677
649endif # I2C 678endif # I2C
650 679
651comment "SPI RTC drivers" 680comment "SPI RTC drivers"
@@ -1285,6 +1314,17 @@ config RTC_DRV_IMXDI
1285 This driver can also be built as a module, if so, the module 1314 This driver can also be built as a module, if so, the module
1286 will be called "rtc-imxdi". 1315 will be called "rtc-imxdi".
1287 1316
1317config RTC_DRV_MESON
1318 tristate "Amlogic Meson RTC"
1319 depends on (ARM && ARCH_MESON) || COMPILE_TEST
1320 select REGMAP_MMIO
1321 help
1322 Support for the RTC block on the Amlogic Meson6, Meson8, Meson8b
1323 and Meson8m2 SoCs.
1324
1325 This driver can also be built as a module, if so, the module
1326 will be called "rtc-meson".
1327
1288config RTC_DRV_OMAP 1328config RTC_DRV_OMAP
1289 tristate "TI OMAP Real Time Clock" 1329 tristate "TI OMAP Real Time Clock"
1290 depends on ARCH_OMAP || ARCH_DAVINCI || COMPILE_TEST 1330 depends on ARCH_OMAP || ARCH_DAVINCI || COMPILE_TEST
@@ -1508,6 +1548,16 @@ config RTC_DRV_ARMADA38X
1508 This driver can also be built as a module. If so, the module 1548 This driver can also be built as a module. If so, the module
1509 will be called armada38x-rtc. 1549 will be called armada38x-rtc.
1510 1550
1551config RTC_DRV_CADENCE
1552 tristate "Cadence RTC driver"
1553 depends on OF && HAS_IOMEM
1554 help
1555 If you say Y here you will get access to Cadence RTC IP
1556 found on certain SOCs.
1557
1558 To compile this driver as a module, choose M here: the
1559 module will be called rtc-cadence.
1560
1511config RTC_DRV_FTRTC010 1561config RTC_DRV_FTRTC010
1512 tristate "Faraday Technology FTRTC010 RTC" 1562 tristate "Faraday Technology FTRTC010 RTC"
1513 depends on HAS_IOMEM 1563 depends on HAS_IOMEM
@@ -1679,6 +1729,7 @@ config RTC_DRV_SNVS
1679 1729
1680config RTC_DRV_IMX_SC 1730config RTC_DRV_IMX_SC
1681 depends on IMX_SCU 1731 depends on IMX_SCU
1732 depends on HAVE_ARM_SMCCC
1682 tristate "NXP i.MX System Controller RTC support" 1733 tristate "NXP i.MX System Controller RTC support"
1683 help 1734 help
1684 If you say yes here you get support for the NXP i.MX System 1735 If you say yes here you get support for the NXP i.MX System
@@ -1795,8 +1846,7 @@ comment "HID Sensor RTC drivers"
1795config RTC_DRV_HID_SENSOR_TIME 1846config RTC_DRV_HID_SENSOR_TIME
1796 tristate "HID Sensor Time" 1847 tristate "HID Sensor Time"
1797 depends on USB_HID 1848 depends on USB_HID
1798 select IIO 1849 depends on HID_SENSOR_HUB && IIO
1799 select HID_SENSOR_HUB
1800 select HID_SENSOR_IIO_COMMON 1850 select HID_SENSOR_IIO_COMMON
1801 help 1851 help
1802 Say yes here to build support for the HID Sensors of type Time. 1852 Say yes here to build support for the HID Sensors of type Time.
@@ -1814,4 +1864,15 @@ config RTC_DRV_GOLDFISH
1814 Goldfish is a code name for the virtual platform developed by Google 1864 Goldfish is a code name for the virtual platform developed by Google
1815 for Android emulation. 1865 for Android emulation.
1816 1866
1867config RTC_DRV_WILCO_EC
1868 tristate "Wilco EC RTC"
1869 depends on WILCO_EC
1870 default m
1871 help
1872 If you say yes here, you get read/write support for the Real Time
1873 Clock on the Wilco Embedded Controller (Wilco is a kind of Chromebook)
1874
1875 This can also be built as a module. If so, the module will
1876 be named "rtc_wilco_ec".
1877
1817endif # RTC_CLASS 1878endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index df022d820bee..fe3962496685 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_RTC_DRV_88PM860X) += rtc-88pm860x.o
28obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o 28obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o
29obj-$(CONFIG_RTC_DRV_AB8500) += rtc-ab8500.o 29obj-$(CONFIG_RTC_DRV_AB8500) += rtc-ab8500.o
30obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o 30obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o
31obj-$(CONFIG_RTC_DRV_ABEOZ9) += rtc-ab-eoz9.o
31obj-$(CONFIG_RTC_DRV_ABX80X) += rtc-abx80x.o 32obj-$(CONFIG_RTC_DRV_ABX80X) += rtc-abx80x.o
32obj-$(CONFIG_RTC_DRV_AC100) += rtc-ac100.o 33obj-$(CONFIG_RTC_DRV_AC100) += rtc-ac100.o
33obj-$(CONFIG_RTC_DRV_ARMADA38X) += rtc-armada38x.o 34obj-$(CONFIG_RTC_DRV_ARMADA38X) += rtc-armada38x.o
@@ -39,6 +40,7 @@ obj-$(CONFIG_RTC_DRV_AU1XXX) += rtc-au1xxx.o
39obj-$(CONFIG_RTC_DRV_BQ32K) += rtc-bq32k.o 40obj-$(CONFIG_RTC_DRV_BQ32K) += rtc-bq32k.o
40obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o 41obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o
41obj-$(CONFIG_RTC_DRV_BRCMSTB) += rtc-brcmstb-waketimer.o 42obj-$(CONFIG_RTC_DRV_BRCMSTB) += rtc-brcmstb-waketimer.o
43obj-$(CONFIG_RTC_DRV_CADENCE) += rtc-cadence.o
42obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o 44obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o
43obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o 45obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o
44obj-$(CONFIG_RTC_DRV_CPCAP) += rtc-cpcap.o 46obj-$(CONFIG_RTC_DRV_CPCAP) += rtc-cpcap.o
@@ -100,6 +102,7 @@ obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o
100obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o 102obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o
101obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o 103obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o
102obj-$(CONFIG_RTC_DRV_MCP795) += rtc-mcp795.o 104obj-$(CONFIG_RTC_DRV_MCP795) += rtc-mcp795.o
105obj-$(CONFIG_RTC_DRV_MESON) += rtc-meson.o
103obj-$(CONFIG_RTC_DRV_MOXART) += rtc-moxart.o 106obj-$(CONFIG_RTC_DRV_MOXART) += rtc-moxart.o
104obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o 107obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
105obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o 108obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
@@ -137,6 +140,7 @@ obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5c313.o
137obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o 140obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o
138obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o 141obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o
139obj-$(CONFIG_RTC_DRV_RTD119X) += rtc-rtd119x.o 142obj-$(CONFIG_RTC_DRV_RTD119X) += rtc-rtd119x.o
143obj-$(CONFIG_RTC_DRV_RV3028) += rtc-rv3028.o
140obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o 144obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o
141obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o 145obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o
142obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o 146obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o
@@ -149,6 +153,7 @@ obj-$(CONFIG_RTC_DRV_S3C) += rtc-s3c.o
149obj-$(CONFIG_RTC_DRV_S5M) += rtc-s5m.o 153obj-$(CONFIG_RTC_DRV_S5M) += rtc-s5m.o
150obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o 154obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o
151obj-$(CONFIG_RTC_DRV_SC27XX) += rtc-sc27xx.o 155obj-$(CONFIG_RTC_DRV_SC27XX) += rtc-sc27xx.o
156obj-$(CONFIG_RTC_DRV_SD3078) += rtc-sd3078.o
152obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o 157obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o
153obj-$(CONFIG_RTC_DRV_SIRFSOC) += rtc-sirfsoc.o 158obj-$(CONFIG_RTC_DRV_SIRFSOC) += rtc-sirfsoc.o
154obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o 159obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o
@@ -172,6 +177,7 @@ obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
172obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o 177obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o
173obj-$(CONFIG_RTC_DRV_VRTC) += rtc-mrst.o 178obj-$(CONFIG_RTC_DRV_VRTC) += rtc-mrst.o
174obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o 179obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o
180obj-$(CONFIG_RTC_DRV_WILCO_EC) += rtc-wilco-ec.o
175obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o 181obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o
176obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o 182obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o
177obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o 183obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o
diff --git a/drivers/rtc/dev.c b/drivers/rtc/dev.c
index 43d962a9c210..1d006ef4bb57 100644
--- a/drivers/rtc/dev.c
+++ b/drivers/rtc/dev.c
@@ -178,11 +178,6 @@ rtc_dev_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
178 remove_wait_queue(&rtc->irq_queue, &wait); 178 remove_wait_queue(&rtc->irq_queue, &wait);
179 179
180 if (ret == 0) { 180 if (ret == 0) {
181 /* Check for any data updates */
182 if (rtc->ops->read_callback)
183 data = rtc->ops->read_callback(rtc->dev.parent,
184 data);
185
186 if (sizeof(int) != sizeof(long) && 181 if (sizeof(int) != sizeof(long) &&
187 count == sizeof(unsigned int)) 182 count == sizeof(unsigned int))
188 ret = put_user(data, (unsigned int __user *)buf) ?: 183 ret = put_user(data, (unsigned int __user *)buf) ?:
diff --git a/drivers/rtc/lib.c b/drivers/rtc/lib.c
index ef160da84220..9714cb3d1e29 100644
--- a/drivers/rtc/lib.c
+++ b/drivers/rtc/lib.c
@@ -100,7 +100,7 @@ int rtc_valid_tm(struct rtc_time *tm)
100 if (tm->tm_year < 70 100 if (tm->tm_year < 70
101 || ((unsigned)tm->tm_mon) >= 12 101 || ((unsigned)tm->tm_mon) >= 12
102 || tm->tm_mday < 1 102 || tm->tm_mday < 1
103 || tm->tm_mday > rtc_month_days(tm->tm_mon, tm->tm_year + 1900) 103 || tm->tm_mday > rtc_month_days(tm->tm_mon, ((unsigned)tm->tm_year + 1900))
104 || ((unsigned)tm->tm_hour) >= 24 104 || ((unsigned)tm->tm_hour) >= 24
105 || ((unsigned)tm->tm_min) >= 60 105 || ((unsigned)tm->tm_min) >= 60
106 || ((unsigned)tm->tm_sec) >= 60) 106 || ((unsigned)tm->tm_sec) >= 60)
@@ -116,8 +116,8 @@ EXPORT_SYMBOL(rtc_valid_tm);
116 */ 116 */
117time64_t rtc_tm_to_time64(struct rtc_time *tm) 117time64_t rtc_tm_to_time64(struct rtc_time *tm)
118{ 118{
119 return mktime64(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday, 119 return mktime64(((unsigned)tm->tm_year + 1900), tm->tm_mon + 1,
120 tm->tm_hour, tm->tm_min, tm->tm_sec); 120 tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec);
121} 121}
122EXPORT_SYMBOL(rtc_tm_to_time64); 122EXPORT_SYMBOL(rtc_tm_to_time64);
123 123
diff --git a/drivers/rtc/rtc-88pm80x.c b/drivers/rtc/rtc-88pm80x.c
index cab293cb2bf0..1fc48ebd3cd0 100644
--- a/drivers/rtc/rtc-88pm80x.c
+++ b/drivers/rtc/rtc-88pm80x.c
@@ -114,12 +114,14 @@ static int pm80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
114 unsigned char buf[4]; 114 unsigned char buf[4];
115 unsigned long ticks, base, data; 115 unsigned long ticks, base, data;
116 regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4); 116 regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
117 base = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 117 base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
118 (buf[1] << 8) | buf[0];
118 dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]); 119 dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
119 120
120 /* load 32-bit read-only counter */ 121 /* load 32-bit read-only counter */
121 regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4); 122 regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
122 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 123 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
124 (buf[1] << 8) | buf[0];
123 ticks = base + data; 125 ticks = base + data;
124 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 126 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
125 base, data, ticks); 127 base, data, ticks);
@@ -137,7 +139,8 @@ static int pm80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
137 139
138 /* load 32-bit read-only counter */ 140 /* load 32-bit read-only counter */
139 regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4); 141 regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
140 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 142 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
143 (buf[1] << 8) | buf[0];
141 base = ticks - data; 144 base = ticks - data;
142 dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 145 dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
143 base, data, ticks); 146 base, data, ticks);
@@ -158,11 +161,13 @@ static int pm80x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
158 int ret; 161 int ret;
159 162
160 regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4); 163 regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
161 base = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 164 base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
165 (buf[1] << 8) | buf[0];
162 dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]); 166 dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
163 167
164 regmap_raw_read(info->map, PM800_RTC_EXPIRE1_1, buf, 4); 168 regmap_raw_read(info->map, PM800_RTC_EXPIRE1_1, buf, 4);
165 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 169 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
170 (buf[1] << 8) | buf[0];
166 ticks = base + data; 171 ticks = base + data;
167 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 172 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
168 base, data, ticks); 173 base, data, ticks);
@@ -185,12 +190,14 @@ static int pm80x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
185 regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_ALARM1_EN, 0); 190 regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_ALARM1_EN, 0);
186 191
187 regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4); 192 regmap_raw_read(info->map, PM800_RTC_EXPIRE2_1, buf, 4);
188 base = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 193 base = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
194 (buf[1] << 8) | buf[0];
189 dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]); 195 dev_dbg(info->dev, "%x-%x-%x-%x\n", buf[0], buf[1], buf[2], buf[3]);
190 196
191 /* load 32-bit read-only counter */ 197 /* load 32-bit read-only counter */
192 regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4); 198 regmap_raw_read(info->map, PM800_RTC_COUNTER1, buf, 4);
193 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 199 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
200 (buf[1] << 8) | buf[0];
194 ticks = base + data; 201 ticks = base + data;
195 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 202 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
196 base, data, ticks); 203 base, data, ticks);
diff --git a/drivers/rtc/rtc-88pm860x.c b/drivers/rtc/rtc-88pm860x.c
index 01ffc0ef8033..d25282b4a7dd 100644
--- a/drivers/rtc/rtc-88pm860x.c
+++ b/drivers/rtc/rtc-88pm860x.c
@@ -115,11 +115,13 @@ static int pm860x_rtc_read_time(struct device *dev, struct rtc_time *tm)
115 pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf); 115 pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
116 dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1], 116 dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
117 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); 117 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
118 base = (buf[1] << 24) | (buf[3] << 16) | (buf[5] << 8) | buf[7]; 118 base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
119 (buf[5] << 8) | buf[7];
119 120
120 /* load 32-bit read-only counter */ 121 /* load 32-bit read-only counter */
121 pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf); 122 pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
122 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 123 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
124 (buf[1] << 8) | buf[0];
123 ticks = base + data; 125 ticks = base + data;
124 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 126 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
125 base, data, ticks); 127 base, data, ticks);
@@ -145,7 +147,8 @@ static int pm860x_rtc_set_time(struct device *dev, struct rtc_time *tm)
145 147
146 /* load 32-bit read-only counter */ 148 /* load 32-bit read-only counter */
147 pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf); 149 pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
148 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 150 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
151 (buf[1] << 8) | buf[0];
149 base = ticks - data; 152 base = ticks - data;
150 dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 153 dev_dbg(info->dev, "set base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
151 base, data, ticks); 154 base, data, ticks);
@@ -170,10 +173,12 @@ static int pm860x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
170 pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf); 173 pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
171 dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1], 174 dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
172 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); 175 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
173 base = (buf[1] << 24) | (buf[3] << 16) | (buf[5] << 8) | buf[7]; 176 base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
177 (buf[5] << 8) | buf[7];
174 178
175 pm860x_bulk_read(info->i2c, PM8607_RTC_EXPIRE1, 4, buf); 179 pm860x_bulk_read(info->i2c, PM8607_RTC_EXPIRE1, 4, buf);
176 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 180 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
181 (buf[1] << 8) | buf[0];
177 ticks = base + data; 182 ticks = base + data;
178 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 183 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
179 base, data, ticks); 184 base, data, ticks);
@@ -198,11 +203,13 @@ static int pm860x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
198 pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf); 203 pm860x_page_bulk_read(info->i2c, REG0_ADDR, 8, buf);
199 dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1], 204 dev_dbg(info->dev, "%x-%x-%x-%x-%x-%x-%x-%x\n", buf[0], buf[1],
200 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); 205 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
201 base = (buf[1] << 24) | (buf[3] << 16) | (buf[5] << 8) | buf[7]; 206 base = ((unsigned long)buf[1] << 24) | (buf[3] << 16) |
207 (buf[5] << 8) | buf[7];
202 208
203 /* load 32-bit read-only counter */ 209 /* load 32-bit read-only counter */
204 pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf); 210 pm860x_bulk_read(info->i2c, PM8607_RTC_COUNTER1, 4, buf);
205 data = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 211 data = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
212 (buf[1] << 8) | buf[0];
206 ticks = base + data; 213 ticks = base + data;
207 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n", 214 dev_dbg(info->dev, "get base:0x%lx, RO count:0x%lx, ticks:0x%lx\n",
208 base, data, ticks); 215 base, data, ticks);
diff --git a/drivers/rtc/rtc-ab-eoz9.c b/drivers/rtc/rtc-ab-eoz9.c
new file mode 100644
index 000000000000..e4f6e0061ccf
--- /dev/null
+++ b/drivers/rtc/rtc-ab-eoz9.c
@@ -0,0 +1,465 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Real Time Clock driver for AB-RTCMC-32.768kHz-EOZ9 chip.
4 * Copyright (C) 2019 Orolia
5 *
6 */
7
8#include <linux/module.h>
9#include <linux/rtc.h>
10#include <linux/i2c.h>
11#include <linux/bcd.h>
12#include <linux/of.h>
13#include <linux/regmap.h>
14#include <linux/hwmon.h>
15#include <linux/hwmon-sysfs.h>
16
17#define ABEOZ9_REG_CTRL1 0x00
18#define ABEOZ9_REG_CTRL1_MASK GENMASK(7, 0)
19#define ABEOZ9_REG_CTRL1_WE BIT(0)
20#define ABEOZ9_REG_CTRL1_TE BIT(1)
21#define ABEOZ9_REG_CTRL1_TAR BIT(2)
22#define ABEOZ9_REG_CTRL1_EERE BIT(3)
23#define ABEOZ9_REG_CTRL1_SRON BIT(4)
24#define ABEOZ9_REG_CTRL1_TD0 BIT(5)
25#define ABEOZ9_REG_CTRL1_TD1 BIT(6)
26#define ABEOZ9_REG_CTRL1_CLKINT BIT(7)
27
28#define ABEOZ9_REG_CTRL_INT 0x01
29#define ABEOZ9_REG_CTRL_INT_AIE BIT(0)
30#define ABEOZ9_REG_CTRL_INT_TIE BIT(1)
31#define ABEOZ9_REG_CTRL_INT_V1IE BIT(2)
32#define ABEOZ9_REG_CTRL_INT_V2IE BIT(3)
33#define ABEOZ9_REG_CTRL_INT_SRIE BIT(4)
34
35#define ABEOZ9_REG_CTRL_INT_FLAG 0x02
36#define ABEOZ9_REG_CTRL_INT_FLAG_AF BIT(0)
37#define ABEOZ9_REG_CTRL_INT_FLAG_TF BIT(1)
38#define ABEOZ9_REG_CTRL_INT_FLAG_V1IF BIT(2)
39#define ABEOZ9_REG_CTRL_INT_FLAG_V2IF BIT(3)
40#define ABEOZ9_REG_CTRL_INT_FLAG_SRF BIT(4)
41
42#define ABEOZ9_REG_CTRL_STATUS 0x03
43#define ABEOZ9_REG_CTRL_STATUS_V1F BIT(2)
44#define ABEOZ9_REG_CTRL_STATUS_V2F BIT(3)
45#define ABEOZ9_REG_CTRL_STATUS_SR BIT(4)
46#define ABEOZ9_REG_CTRL_STATUS_PON BIT(5)
47#define ABEOZ9_REG_CTRL_STATUS_EEBUSY BIT(7)
48
49#define ABEOZ9_REG_SEC 0x08
50#define ABEOZ9_REG_MIN 0x09
51#define ABEOZ9_REG_HOURS 0x0A
52#define ABEOZ9_HOURS_PM BIT(6)
53#define ABEOZ9_REG_DAYS 0x0B
54#define ABEOZ9_REG_WEEKDAYS 0x0C
55#define ABEOZ9_REG_MONTHS 0x0D
56#define ABEOZ9_REG_YEARS 0x0E
57
58#define ABEOZ9_SEC_LEN 7
59
60#define ABEOZ9_REG_REG_TEMP 0x20
61#define ABEOZ953_TEMP_MAX 120
62#define ABEOZ953_TEMP_MIN -60
63
64#define ABEOZ9_REG_EEPROM 0x30
65#define ABEOZ9_REG_EEPROM_MASK GENMASK(8, 0)
66#define ABEOZ9_REG_EEPROM_THP BIT(0)
67#define ABEOZ9_REG_EEPROM_THE BIT(1)
68#define ABEOZ9_REG_EEPROM_FD0 BIT(2)
69#define ABEOZ9_REG_EEPROM_FD1 BIT(3)
70#define ABEOZ9_REG_EEPROM_R1K BIT(4)
71#define ABEOZ9_REG_EEPROM_R5K BIT(5)
72#define ABEOZ9_REG_EEPROM_R20K BIT(6)
73#define ABEOZ9_REG_EEPROM_R80K BIT(7)
74
75struct abeoz9_rtc_data {
76 struct rtc_device *rtc;
77 struct regmap *regmap;
78 struct device *hwmon_dev;
79};
80
81static int abeoz9_check_validity(struct device *dev)
82{
83 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
84 struct regmap *regmap = data->regmap;
85 int ret;
86 int val;
87
88 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val);
89 if (ret < 0) {
90 dev_err(dev,
91 "unable to get CTRL_STATUS register (%d)\n", ret);
92 return ret;
93 }
94
95 if (val & ABEOZ9_REG_CTRL_STATUS_PON) {
96 dev_warn(dev, "power-on reset detected, date is invalid\n");
97 return -EINVAL;
98 }
99
100 if (val & ABEOZ9_REG_CTRL_STATUS_V1F) {
101 dev_warn(dev,
102 "voltage drops below VLOW1 threshold, date is invalid\n");
103 return -EINVAL;
104 }
105
106 if ((val & ABEOZ9_REG_CTRL_STATUS_V2F)) {
107 dev_warn(dev,
108 "voltage drops below VLOW2 threshold, date is invalid\n");
109 return -EINVAL;
110 }
111
112 return 0;
113}
114
115static int abeoz9_reset_validity(struct regmap *regmap)
116{
117 return regmap_update_bits(regmap, ABEOZ9_REG_CTRL_STATUS,
118 ABEOZ9_REG_CTRL_STATUS_V1F |
119 ABEOZ9_REG_CTRL_STATUS_V2F |
120 ABEOZ9_REG_CTRL_STATUS_PON,
121 0);
122}
123
124static int abeoz9_rtc_get_time(struct device *dev, struct rtc_time *tm)
125{
126 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
127 u8 regs[ABEOZ9_SEC_LEN];
128 int ret;
129
130 ret = abeoz9_check_validity(dev);
131 if (ret)
132 return ret;
133
134 ret = regmap_bulk_read(data->regmap, ABEOZ9_REG_SEC,
135 regs,
136 sizeof(regs));
137 if (ret) {
138 dev_err(dev, "reading RTC time failed (%d)\n", ret);
139 return ret;
140 }
141
142 tm->tm_sec = bcd2bin(regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] & 0x7F);
143 tm->tm_min = bcd2bin(regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] & 0x7F);
144
145 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM) {
146 tm->tm_hour =
147 bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & 0x1f);
148 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM)
149 tm->tm_hour += 12;
150 } else {
151 tm->tm_hour = bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC]);
152 }
153
154 tm->tm_mday = bcd2bin(regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC]);
155 tm->tm_wday = bcd2bin(regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC]);
156 tm->tm_mon = bcd2bin(regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC]) - 1;
157 tm->tm_year = bcd2bin(regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC]) + 100;
158
159 return ret;
160}
161
162static int abeoz9_rtc_set_time(struct device *dev, struct rtc_time *tm)
163{
164 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
165 struct regmap *regmap = data->regmap;
166 u8 regs[ABEOZ9_SEC_LEN];
167 int ret;
168
169 regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_sec);
170 regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_min);
171 regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_hour);
172 regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mday);
173 regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_wday);
174 regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mon + 1);
175 regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_year - 100);
176
177 ret = regmap_bulk_write(data->regmap, ABEOZ9_REG_SEC,
178 regs,
179 sizeof(regs));
180
181 if (ret) {
182 dev_err(dev, "set RTC time failed (%d)\n", ret);
183 return ret;
184 }
185
186 return abeoz9_reset_validity(regmap);
187}
188
189static int abeoz9_trickle_parse_dt(struct device_node *node)
190{
191 u32 ohms = 0;
192
193 if (of_property_read_u32(node, "trickle-resistor-ohms", &ohms))
194 return 0;
195
196 switch (ohms) {
197 case 1000:
198 return ABEOZ9_REG_EEPROM_R1K;
199 case 5000:
200 return ABEOZ9_REG_EEPROM_R5K;
201 case 20000:
202 return ABEOZ9_REG_EEPROM_R20K;
203 case 80000:
204 return ABEOZ9_REG_EEPROM_R80K;
205 default:
206 return 0;
207 }
208}
209
210static int abeoz9_rtc_setup(struct device *dev, struct device_node *node)
211{
212 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
213 struct regmap *regmap = data->regmap;
214 int ret;
215
216 /* Enable Self Recovery, Clock for Watch and EEPROM refresh functions */
217 ret = regmap_update_bits(regmap, ABEOZ9_REG_CTRL1,
218 ABEOZ9_REG_CTRL1_MASK,
219 ABEOZ9_REG_CTRL1_WE |
220 ABEOZ9_REG_CTRL1_EERE |
221 ABEOZ9_REG_CTRL1_SRON);
222 if (ret < 0) {
223 dev_err(dev, "unable to set CTRL_1 register (%d)\n", ret);
224 return ret;
225 }
226
227 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT, 0);
228 if (ret < 0) {
229 dev_err(dev,
230 "unable to set control CTRL_INT register (%d)\n",
231 ret);
232 return ret;
233 }
234
235 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT_FLAG, 0);
236 if (ret < 0) {
237 dev_err(dev,
238 "unable to set control CTRL_INT_FLAG register (%d)\n",
239 ret);
240 return ret;
241 }
242
243 ret = abeoz9_trickle_parse_dt(node);
244
245 /* Enable built-in termometer */
246 ret |= ABEOZ9_REG_EEPROM_THE;
247
248 ret = regmap_update_bits(regmap, ABEOZ9_REG_EEPROM,
249 ABEOZ9_REG_EEPROM_MASK,
250 ret);
251 if (ret < 0) {
252 dev_err(dev, "unable to set EEPROM register (%d)\n", ret);
253 return ret;
254 }
255
256 return ret;
257}
258
259static const struct rtc_class_ops rtc_ops = {
260 .read_time = abeoz9_rtc_get_time,
261 .set_time = abeoz9_rtc_set_time,
262};
263
264static const struct regmap_config abeoz9_rtc_regmap_config = {
265 .reg_bits = 8,
266 .val_bits = 8,
267};
268
269#if IS_REACHABLE(CONFIG_HWMON)
270
271static int abeoz9z3_temp_read(struct device *dev,
272 enum hwmon_sensor_types type,
273 u32 attr, int channel, long *temp)
274{
275 struct abeoz9_rtc_data *data = dev_get_drvdata(dev);
276 struct regmap *regmap = data->regmap;
277 int ret;
278 unsigned int val;
279
280 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val);
281 if (ret < 0)
282 return ret;
283
284 if ((val & ABEOZ9_REG_CTRL_STATUS_V1F) ||
285 (val & ABEOZ9_REG_CTRL_STATUS_V2F)) {
286 dev_err(dev,
287 "thermometer might be disabled due to low voltage\n");
288 return -EINVAL;
289 }
290
291 switch (attr) {
292 case hwmon_temp_input:
293 ret = regmap_read(regmap, ABEOZ9_REG_REG_TEMP, &val);
294 if (ret < 0)
295 return ret;
296 *temp = 1000 * (val + ABEOZ953_TEMP_MIN);
297 return 0;
298 case hwmon_temp_max:
299 *temp = 1000 * ABEOZ953_TEMP_MAX;
300 return 0;
301 case hwmon_temp_min:
302 *temp = 1000 * ABEOZ953_TEMP_MIN;
303 return 0;
304 default:
305 return -EOPNOTSUPP;
306 }
307}
308
309static umode_t abeoz9_is_visible(const void *data,
310 enum hwmon_sensor_types type,
311 u32 attr, int channel)
312{
313 switch (attr) {
314 case hwmon_temp_input:
315 case hwmon_temp_max:
316 case hwmon_temp_min:
317 return 0444;
318 default:
319 return 0;
320 }
321}
322
323static const u32 abeoz9_chip_config[] = {
324 HWMON_C_REGISTER_TZ,
325 0
326};
327
328static const struct hwmon_channel_info abeoz9_chip = {
329 .type = hwmon_chip,
330 .config = abeoz9_chip_config,
331};
332
333static const u32 abeoz9_temp_config[] = {
334 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN,
335 0
336};
337
338static const struct hwmon_channel_info abeoz9_temp = {
339 .type = hwmon_temp,
340 .config = abeoz9_temp_config,
341};
342
343static const struct hwmon_channel_info *abeoz9_info[] = {
344 &abeoz9_chip,
345 &abeoz9_temp,
346 NULL
347};
348
349static const struct hwmon_ops abeoz9_hwmon_ops = {
350 .is_visible = abeoz9_is_visible,
351 .read = abeoz9z3_temp_read,
352};
353
354static const struct hwmon_chip_info abeoz9_chip_info = {
355 .ops = &abeoz9_hwmon_ops,
356 .info = abeoz9_info,
357};
358
359static void abeoz9_hwmon_register(struct device *dev,
360 struct abeoz9_rtc_data *data)
361{
362 data->hwmon_dev =
363 devm_hwmon_device_register_with_info(dev,
364 "abeoz9",
365 data,
366 &abeoz9_chip_info,
367 NULL);
368 if (IS_ERR(data->hwmon_dev)) {
369 dev_warn(dev, "unable to register hwmon device %ld\n",
370 PTR_ERR(data->hwmon_dev));
371 }
372}
373
374#else
375
376static void abeoz9_hwmon_register(struct device *dev,
377 struct abeoz9_rtc_data *data)
378{
379}
380
381#endif
382
383static int abeoz9_probe(struct i2c_client *client,
384 const struct i2c_device_id *id)
385{
386 struct abeoz9_rtc_data *data = NULL;
387 struct device *dev = &client->dev;
388 struct regmap *regmap;
389 int ret;
390
391 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
392 I2C_FUNC_SMBUS_BYTE_DATA |
393 I2C_FUNC_SMBUS_I2C_BLOCK)) {
394 ret = -ENODEV;
395 goto err;
396 }
397
398 regmap = devm_regmap_init_i2c(client, &abeoz9_rtc_regmap_config);
399 if (IS_ERR(regmap)) {
400 ret = PTR_ERR(regmap);
401 dev_err(dev, "regmap allocation failed: %d\n", ret);
402 goto err;
403 }
404
405 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
406 if (!data) {
407 ret = -ENOMEM;
408 goto err;
409 }
410
411 data->regmap = regmap;
412 dev_set_drvdata(dev, data);
413
414 ret = abeoz9_rtc_setup(dev, client->dev.of_node);
415 if (ret)
416 goto err;
417
418 data->rtc = devm_rtc_allocate_device(dev);
419 ret = PTR_ERR_OR_ZERO(data->rtc);
420 if (ret)
421 goto err;
422
423 data->rtc->ops = &rtc_ops;
424 data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
425 data->rtc->range_max = RTC_TIMESTAMP_END_2099;
426
427 ret = rtc_register_device(data->rtc);
428 if (ret)
429 goto err;
430
431 abeoz9_hwmon_register(dev, data);
432 return 0;
433
434err:
435 dev_err(dev, "unable to register RTC device (%d)\n", ret);
436 return ret;
437}
438
439#ifdef CONFIG_OF
440static const struct of_device_id abeoz9_dt_match[] = {
441 { .compatible = "abracon,abeoz9" },
442 { },
443};
444MODULE_DEVICE_TABLE(of, abeoz9_dt_match);
445#endif
446
447static const struct i2c_device_id abeoz9_id[] = {
448 { "abeoz9", 0 },
449 { }
450};
451
452static struct i2c_driver abeoz9_driver = {
453 .driver = {
454 .name = "rtc-ab-eoz9",
455 .of_match_table = of_match_ptr(abeoz9_dt_match),
456 },
457 .probe = abeoz9_probe,
458 .id_table = abeoz9_id,
459};
460
461module_i2c_driver(abeoz9_driver);
462
463MODULE_AUTHOR("Artem Panfilov <panfilov.artyom@gmail.com>");
464MODULE_DESCRIPTION("Abracon AB-RTCMC-32.768kHz-EOZ9 RTC driver");
465MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-abx80x.c b/drivers/rtc/rtc-abx80x.c
index 4d24f7288ad7..6ddcad642d1e 100644
--- a/drivers/rtc/rtc-abx80x.c
+++ b/drivers/rtc/rtc-abx80x.c
@@ -5,7 +5,7 @@
5 * Copyright 2014-2015 Macq S.A. 5 * Copyright 2014-2015 Macq S.A.
6 * 6 *
7 * Author: Philippe De Muyter <phdm@macqel.be> 7 * Author: Philippe De Muyter <phdm@macqel.be>
8 * Author: Alexandre Belloni <alexandre.belloni@free-electrons.com> 8 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -46,6 +46,9 @@
46#define ABX8XX_CTRL_ARST BIT(2) 46#define ABX8XX_CTRL_ARST BIT(2)
47#define ABX8XX_CTRL_12_24 BIT(6) 47#define ABX8XX_CTRL_12_24 BIT(6)
48 48
49#define ABX8XX_REG_CTRL2 0x11
50#define ABX8XX_CTRL2_RSVD BIT(5)
51
49#define ABX8XX_REG_IRQ 0x12 52#define ABX8XX_REG_IRQ 0x12
50#define ABX8XX_IRQ_AIE BIT(2) 53#define ABX8XX_IRQ_AIE BIT(2)
51#define ABX8XX_IRQ_IM_1_4 (0x3 << 5) 54#define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
@@ -78,6 +81,9 @@
78 81
79#define ABX8XX_REG_ID0 0x28 82#define ABX8XX_REG_ID0 0x28
80 83
84#define ABX8XX_REG_OUT_CTRL 0x30
85#define ABX8XX_OUT_CTRL_EXDS BIT(4)
86
81#define ABX8XX_REG_TRICKLE 0x20 87#define ABX8XX_REG_TRICKLE 0x20
82#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0 88#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
83#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8 89#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
@@ -86,7 +92,7 @@
86static u8 trickle_resistors[] = {0, 3, 6, 11}; 92static u8 trickle_resistors[] = {0, 3, 6, 11};
87 93
88enum abx80x_chip {AB0801, AB0803, AB0804, AB0805, 94enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
89 AB1801, AB1803, AB1804, AB1805, ABX80X}; 95 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
90 96
91struct abx80x_cap { 97struct abx80x_cap {
92 u16 pn; 98 u16 pn;
@@ -103,6 +109,7 @@ static struct abx80x_cap abx80x_caps[] = {
103 [AB1803] = {.pn = 0x1803}, 109 [AB1803] = {.pn = 0x1803},
104 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true}, 110 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
105 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, 111 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
112 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
106 [ABX80X] = {.pn = 0} 113 [ABX80X] = {.pn = 0}
107}; 114};
108 115
@@ -723,6 +730,62 @@ static int abx80x_probe(struct i2c_client *client,
723 return -EIO; 730 return -EIO;
724 } 731 }
725 732
733 /* Configure RV1805 specifics */
734 if (part == RV1805) {
735 /*
736 * Avoid accidentally entering test mode. This can happen
737 * on the RV1805 in case the reserved bit 5 in control2
738 * register is set. RV-1805-C3 datasheet indicates that
739 * the bit should be cleared in section 11h - Control2.
740 */
741 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
742 if (data < 0) {
743 dev_err(&client->dev,
744 "Unable to read control2 register\n");
745 return -EIO;
746 }
747
748 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
749 data & ~ABX8XX_CTRL2_RSVD);
750 if (err < 0) {
751 dev_err(&client->dev,
752 "Unable to write control2 register\n");
753 return -EIO;
754 }
755
756 /*
757 * Avoid extra power leakage. The RV1805 uses smaller
758 * 10pin package and the EXTI input is not present.
759 * Disable it to avoid leakage.
760 */
761 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
762 if (data < 0) {
763 dev_err(&client->dev,
764 "Unable to read output control register\n");
765 return -EIO;
766 }
767
768 /*
769 * Write the configuration key register to enable access to
770 * the config2 register
771 */
772 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
773 ABX8XX_CFG_KEY_MISC);
774 if (err < 0) {
775 dev_err(&client->dev,
776 "Unable to write configuration key\n");
777 return -EIO;
778 }
779
780 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
781 data | ABX8XX_OUT_CTRL_EXDS);
782 if (err < 0) {
783 dev_err(&client->dev,
784 "Unable to write output control register\n");
785 return -EIO;
786 }
787 }
788
726 /* part autodetection */ 789 /* part autodetection */
727 if (part == ABX80X) { 790 if (part == ABX80X) {
728 for (i = 0; abx80x_caps[i].pn; i++) 791 for (i = 0; abx80x_caps[i].pn; i++)
@@ -826,7 +889,7 @@ static const struct i2c_device_id abx80x_id[] = {
826 { "ab1803", AB1803 }, 889 { "ab1803", AB1803 },
827 { "ab1804", AB1804 }, 890 { "ab1804", AB1804 },
828 { "ab1805", AB1805 }, 891 { "ab1805", AB1805 },
829 { "rv1805", AB1805 }, 892 { "rv1805", RV1805 },
830 { } 893 { }
831}; 894};
832MODULE_DEVICE_TABLE(i2c, abx80x_id); 895MODULE_DEVICE_TABLE(i2c, abx80x_id);
@@ -843,6 +906,6 @@ static struct i2c_driver abx80x_driver = {
843module_i2c_driver(abx80x_driver); 906module_i2c_driver(abx80x_driver);
844 907
845MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>"); 908MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
846MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@free-electrons.com>"); 909MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
847MODULE_DESCRIPTION("Abracon ABX80X RTC driver"); 910MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
848MODULE_LICENSE("GPL v2"); 911MODULE_LICENSE("GPL v2");
diff --git a/drivers/rtc/rtc-cadence.c b/drivers/rtc/rtc-cadence.c
new file mode 100644
index 000000000000..3b7d643c8a63
--- /dev/null
+++ b/drivers/rtc/rtc-cadence.c
@@ -0,0 +1,423 @@
1// SPDX-License-Identifier: GPL-2.0
2
3/*
4 * Copyright 2019 Cadence
5 *
6 * Authors:
7 * Jan Kotas <jank@cadence.com>
8 */
9
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/of.h>
13#include <linux/io.h>
14#include <linux/rtc.h>
15#include <linux/clk.h>
16#include <linux/bcd.h>
17#include <linux/bitfield.h>
18#include <linux/interrupt.h>
19#include <linux/pm_wakeirq.h>
20
21/* Registers */
22#define CDNS_RTC_CTLR 0x00
23#define CDNS_RTC_HMR 0x04
24#define CDNS_RTC_TIMR 0x08
25#define CDNS_RTC_CALR 0x0C
26#define CDNS_RTC_TIMAR 0x10
27#define CDNS_RTC_CALAR 0x14
28#define CDNS_RTC_AENR 0x18
29#define CDNS_RTC_EFLR 0x1C
30#define CDNS_RTC_IENR 0x20
31#define CDNS_RTC_IDISR 0x24
32#define CDNS_RTC_IMSKR 0x28
33#define CDNS_RTC_STSR 0x2C
34#define CDNS_RTC_KRTCR 0x30
35
36/* Control */
37#define CDNS_RTC_CTLR_TIME BIT(0)
38#define CDNS_RTC_CTLR_CAL BIT(1)
39#define CDNS_RTC_CTLR_TIME_CAL (CDNS_RTC_CTLR_TIME | CDNS_RTC_CTLR_CAL)
40
41/* Status */
42#define CDNS_RTC_STSR_VT BIT(0)
43#define CDNS_RTC_STSR_VC BIT(1)
44#define CDNS_RTC_STSR_VTA BIT(2)
45#define CDNS_RTC_STSR_VCA BIT(3)
46#define CDNS_RTC_STSR_VT_VC (CDNS_RTC_STSR_VT | CDNS_RTC_STSR_VC)
47#define CDNS_RTC_STSR_VTA_VCA (CDNS_RTC_STSR_VTA | CDNS_RTC_STSR_VCA)
48
49/* Keep RTC */
50#define CDNS_RTC_KRTCR_KRTC BIT(0)
51
52/* Alarm, Event, Interrupt */
53#define CDNS_RTC_AEI_HOS BIT(0)
54#define CDNS_RTC_AEI_SEC BIT(1)
55#define CDNS_RTC_AEI_MIN BIT(2)
56#define CDNS_RTC_AEI_HOUR BIT(3)
57#define CDNS_RTC_AEI_DATE BIT(4)
58#define CDNS_RTC_AEI_MNTH BIT(5)
59#define CDNS_RTC_AEI_ALRM BIT(6)
60
61/* Time */
62#define CDNS_RTC_TIME_H GENMASK(7, 0)
63#define CDNS_RTC_TIME_S GENMASK(14, 8)
64#define CDNS_RTC_TIME_M GENMASK(22, 16)
65#define CDNS_RTC_TIME_HR GENMASK(29, 24)
66#define CDNS_RTC_TIME_PM BIT(30)
67#define CDNS_RTC_TIME_CH BIT(31)
68
69/* Calendar */
70#define CDNS_RTC_CAL_DAY GENMASK(2, 0)
71#define CDNS_RTC_CAL_M GENMASK(7, 3)
72#define CDNS_RTC_CAL_D GENMASK(13, 8)
73#define CDNS_RTC_CAL_Y GENMASK(23, 16)
74#define CDNS_RTC_CAL_C GENMASK(29, 24)
75#define CDNS_RTC_CAL_CH BIT(31)
76
77#define CDNS_RTC_MAX_REGS_TRIES 3
78
79struct cdns_rtc {
80 struct rtc_device *rtc_dev;
81 struct clk *pclk;
82 struct clk *ref_clk;
83 void __iomem *regs;
84 int irq;
85};
86
87static void cdns_rtc_set_enabled(struct cdns_rtc *crtc, bool enabled)
88{
89 u32 reg = enabled ? 0x0 : CDNS_RTC_CTLR_TIME_CAL;
90
91 writel(reg, crtc->regs + CDNS_RTC_CTLR);
92}
93
94static bool cdns_rtc_get_enabled(struct cdns_rtc *crtc)
95{
96 return !(readl(crtc->regs + CDNS_RTC_CTLR) & CDNS_RTC_CTLR_TIME_CAL);
97}
98
99static irqreturn_t cdns_rtc_irq_handler(int irq, void *id)
100{
101 struct device *dev = id;
102 struct cdns_rtc *crtc = dev_get_drvdata(dev);
103
104 /* Reading the register clears it */
105 if (!(readl(crtc->regs + CDNS_RTC_EFLR) & CDNS_RTC_AEI_ALRM))
106 return IRQ_NONE;
107
108 rtc_update_irq(crtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
109 return IRQ_HANDLED;
110}
111
112static u32 cdns_rtc_time2reg(struct rtc_time *tm)
113{
114 return FIELD_PREP(CDNS_RTC_TIME_S, bin2bcd(tm->tm_sec))
115 | FIELD_PREP(CDNS_RTC_TIME_M, bin2bcd(tm->tm_min))
116 | FIELD_PREP(CDNS_RTC_TIME_HR, bin2bcd(tm->tm_hour));
117}
118
119static void cdns_rtc_reg2time(u32 reg, struct rtc_time *tm)
120{
121 tm->tm_sec = bcd2bin(FIELD_GET(CDNS_RTC_TIME_S, reg));
122 tm->tm_min = bcd2bin(FIELD_GET(CDNS_RTC_TIME_M, reg));
123 tm->tm_hour = bcd2bin(FIELD_GET(CDNS_RTC_TIME_HR, reg));
124}
125
126static int cdns_rtc_read_time(struct device *dev, struct rtc_time *tm)
127{
128 struct cdns_rtc *crtc = dev_get_drvdata(dev);
129 u32 reg;
130
131 /* If the RTC is disabled, assume the values are invalid */
132 if (!cdns_rtc_get_enabled(crtc))
133 return -EINVAL;
134
135 cdns_rtc_set_enabled(crtc, false);
136
137 reg = readl(crtc->regs + CDNS_RTC_TIMR);
138 cdns_rtc_reg2time(reg, tm);
139
140 reg = readl(crtc->regs + CDNS_RTC_CALR);
141 tm->tm_mday = bcd2bin(FIELD_GET(CDNS_RTC_CAL_D, reg));
142 tm->tm_mon = bcd2bin(FIELD_GET(CDNS_RTC_CAL_M, reg)) - 1;
143 tm->tm_year = bcd2bin(FIELD_GET(CDNS_RTC_CAL_Y, reg))
144 + bcd2bin(FIELD_GET(CDNS_RTC_CAL_C, reg)) * 100 - 1900;
145 tm->tm_wday = bcd2bin(FIELD_GET(CDNS_RTC_CAL_DAY, reg)) - 1;
146
147 cdns_rtc_set_enabled(crtc, true);
148 return 0;
149}
150
151static int cdns_rtc_set_time(struct device *dev, struct rtc_time *tm)
152{
153 struct cdns_rtc *crtc = dev_get_drvdata(dev);
154 u32 timr, calr, stsr;
155 int ret = -EIO;
156 int year = tm->tm_year + 1900;
157 int tries;
158
159 cdns_rtc_set_enabled(crtc, false);
160
161 timr = cdns_rtc_time2reg(tm);
162
163 calr = FIELD_PREP(CDNS_RTC_CAL_D, bin2bcd(tm->tm_mday))
164 | FIELD_PREP(CDNS_RTC_CAL_M, bin2bcd(tm->tm_mon + 1))
165 | FIELD_PREP(CDNS_RTC_CAL_Y, bin2bcd(year % 100))
166 | FIELD_PREP(CDNS_RTC_CAL_C, bin2bcd(year / 100))
167 | FIELD_PREP(CDNS_RTC_CAL_DAY, tm->tm_wday + 1);
168
169 /* Update registers, check valid flags */
170 for (tries = 0; tries < CDNS_RTC_MAX_REGS_TRIES; tries++) {
171 writel(timr, crtc->regs + CDNS_RTC_TIMR);
172 writel(calr, crtc->regs + CDNS_RTC_CALR);
173 stsr = readl(crtc->regs + CDNS_RTC_STSR);
174
175 if ((stsr & CDNS_RTC_STSR_VT_VC) == CDNS_RTC_STSR_VT_VC) {
176 ret = 0;
177 break;
178 }
179 }
180
181 cdns_rtc_set_enabled(crtc, true);
182 return ret;
183}
184
185static int cdns_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
186{
187 struct cdns_rtc *crtc = dev_get_drvdata(dev);
188
189 if (enabled) {
190 writel((CDNS_RTC_AEI_SEC | CDNS_RTC_AEI_MIN | CDNS_RTC_AEI_HOUR
191 | CDNS_RTC_AEI_DATE | CDNS_RTC_AEI_MNTH),
192 crtc->regs + CDNS_RTC_AENR);
193 writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IENR);
194 } else {
195 writel(0, crtc->regs + CDNS_RTC_AENR);
196 writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IDISR);
197 }
198
199 return 0;
200}
201
202static int cdns_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
203{
204 struct cdns_rtc *crtc = dev_get_drvdata(dev);
205 u32 reg;
206
207 reg = readl(crtc->regs + CDNS_RTC_TIMAR);
208 cdns_rtc_reg2time(reg, &alarm->time);
209
210 reg = readl(crtc->regs + CDNS_RTC_CALAR);
211 alarm->time.tm_mday = bcd2bin(FIELD_GET(CDNS_RTC_CAL_D, reg));
212 alarm->time.tm_mon = bcd2bin(FIELD_GET(CDNS_RTC_CAL_M, reg)) - 1;
213
214 return 0;
215}
216
217static int cdns_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
218{
219 struct cdns_rtc *crtc = dev_get_drvdata(dev);
220 int ret = -EIO;
221 int tries;
222 u32 timar, calar, stsr;
223
224 cdns_rtc_alarm_irq_enable(dev, 0);
225
226 timar = cdns_rtc_time2reg(&alarm->time);
227 calar = FIELD_PREP(CDNS_RTC_CAL_D, bin2bcd(alarm->time.tm_mday))
228 | FIELD_PREP(CDNS_RTC_CAL_M, bin2bcd(alarm->time.tm_mon + 1));
229
230 /* Update registers, check valid alarm flags */
231 for (tries = 0; tries < CDNS_RTC_MAX_REGS_TRIES; tries++) {
232 writel(timar, crtc->regs + CDNS_RTC_TIMAR);
233 writel(calar, crtc->regs + CDNS_RTC_CALAR);
234 stsr = readl(crtc->regs + CDNS_RTC_STSR);
235
236 if ((stsr & CDNS_RTC_STSR_VTA_VCA) == CDNS_RTC_STSR_VTA_VCA) {
237 ret = 0;
238 break;
239 }
240 }
241
242 if (!ret)
243 cdns_rtc_alarm_irq_enable(dev, alarm->enabled);
244 return ret;
245}
246
247static const struct rtc_class_ops cdns_rtc_ops = {
248 .read_time = cdns_rtc_read_time,
249 .set_time = cdns_rtc_set_time,
250 .read_alarm = cdns_rtc_read_alarm,
251 .set_alarm = cdns_rtc_set_alarm,
252 .alarm_irq_enable = cdns_rtc_alarm_irq_enable,
253};
254
255static int cdns_rtc_probe(struct platform_device *pdev)
256{
257 struct cdns_rtc *crtc;
258 struct resource *res;
259 int ret;
260 unsigned long ref_clk_freq;
261
262 crtc = devm_kzalloc(&pdev->dev, sizeof(*crtc), GFP_KERNEL);
263 if (!crtc)
264 return -ENOMEM;
265
266 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
267 crtc->regs = devm_ioremap_resource(&pdev->dev, res);
268 if (IS_ERR(crtc->regs))
269 return PTR_ERR(crtc->regs);
270
271 crtc->irq = platform_get_irq(pdev, 0);
272 if (crtc->irq < 0)
273 return -EINVAL;
274
275 crtc->pclk = devm_clk_get(&pdev->dev, "pclk");
276 if (IS_ERR(crtc->pclk)) {
277 ret = PTR_ERR(crtc->pclk);
278 dev_err(&pdev->dev,
279 "Failed to retrieve the peripheral clock, %d\n", ret);
280 return ret;
281 }
282
283 crtc->ref_clk = devm_clk_get(&pdev->dev, "ref_clk");
284 if (IS_ERR(crtc->ref_clk)) {
285 ret = PTR_ERR(crtc->ref_clk);
286 dev_err(&pdev->dev,
287 "Failed to retrieve the reference clock, %d\n", ret);
288 return ret;
289 }
290
291 crtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
292 if (IS_ERR(crtc->rtc_dev)) {
293 ret = PTR_ERR(crtc->rtc_dev);
294 dev_err(&pdev->dev,
295 "Failed to allocate the RTC device, %d\n", ret);
296 return ret;
297 }
298
299 platform_set_drvdata(pdev, crtc);
300
301 ret = clk_prepare_enable(crtc->pclk);
302 if (ret) {
303 dev_err(&pdev->dev,
304 "Failed to enable the peripheral clock, %d\n", ret);
305 return ret;
306 }
307
308 ret = clk_prepare_enable(crtc->ref_clk);
309 if (ret) {
310 dev_err(&pdev->dev,
311 "Failed to enable the reference clock, %d\n", ret);
312 goto err_disable_pclk;
313 }
314
315 ref_clk_freq = clk_get_rate(crtc->ref_clk);
316 if ((ref_clk_freq != 1) && (ref_clk_freq != 100)) {
317 dev_err(&pdev->dev,
318 "Invalid reference clock frequency %lu Hz.\n",
319 ref_clk_freq);
320 ret = -EINVAL;
321 goto err_disable_ref_clk;
322 }
323
324 ret = devm_request_irq(&pdev->dev, crtc->irq,
325 cdns_rtc_irq_handler, 0,
326 dev_name(&pdev->dev), &pdev->dev);
327 if (ret) {
328 dev_err(&pdev->dev,
329 "Failed to request interrupt for the device, %d\n",
330 ret);
331 goto err_disable_ref_clk;
332 }
333
334 /* The RTC supports 01.01.1900 - 31.12.2999 */
335 crtc->rtc_dev->range_min = mktime64(1900, 1, 1, 0, 0, 0);
336 crtc->rtc_dev->range_max = mktime64(2999, 12, 31, 23, 59, 59);
337
338 crtc->rtc_dev->ops = &cdns_rtc_ops;
339 device_init_wakeup(&pdev->dev, true);
340
341 /* Always use 24-hour mode and keep the RTC values */
342 writel(0, crtc->regs + CDNS_RTC_HMR);
343 writel(CDNS_RTC_KRTCR_KRTC, crtc->regs + CDNS_RTC_KRTCR);
344
345 ret = rtc_register_device(crtc->rtc_dev);
346 if (ret) {
347 dev_err(&pdev->dev,
348 "Failed to register the RTC device, %d\n", ret);
349 goto err_disable_wakeup;
350 }
351
352 return 0;
353
354err_disable_wakeup:
355 device_init_wakeup(&pdev->dev, false);
356
357err_disable_ref_clk:
358 clk_disable_unprepare(crtc->ref_clk);
359
360err_disable_pclk:
361 clk_disable_unprepare(crtc->pclk);
362
363 return ret;
364}
365
366static int cdns_rtc_remove(struct platform_device *pdev)
367{
368 struct cdns_rtc *crtc = platform_get_drvdata(pdev);
369
370 cdns_rtc_alarm_irq_enable(&pdev->dev, 0);
371 device_init_wakeup(&pdev->dev, 0);
372
373 clk_disable_unprepare(crtc->pclk);
374 clk_disable_unprepare(crtc->ref_clk);
375
376 return 0;
377}
378
379#ifdef CONFIG_PM_SLEEP
380static int cdns_rtc_suspend(struct device *dev)
381{
382 struct cdns_rtc *crtc = dev_get_drvdata(dev);
383
384 if (device_may_wakeup(dev))
385 enable_irq_wake(crtc->irq);
386
387 return 0;
388}
389
390static int cdns_rtc_resume(struct device *dev)
391{
392 struct cdns_rtc *crtc = dev_get_drvdata(dev);
393
394 if (device_may_wakeup(dev))
395 disable_irq_wake(crtc->irq);
396
397 return 0;
398}
399#endif
400
401static SIMPLE_DEV_PM_OPS(cdns_rtc_pm_ops, cdns_rtc_suspend, cdns_rtc_resume);
402
403static const struct of_device_id cdns_rtc_of_match[] = {
404 { .compatible = "cdns,rtc-r109v3" },
405 { },
406};
407MODULE_DEVICE_TABLE(of, cdns_rtc_of_match);
408
409static struct platform_driver cdns_rtc_driver = {
410 .driver = {
411 .name = "cdns-rtc",
412 .of_match_table = cdns_rtc_of_match,
413 .pm = &cdns_rtc_pm_ops,
414 },
415 .probe = cdns_rtc_probe,
416 .remove = cdns_rtc_remove,
417};
418module_platform_driver(cdns_rtc_driver);
419
420MODULE_AUTHOR("Jan Kotas <jank@cadence.com>");
421MODULE_DESCRIPTION("Cadence RTC driver");
422MODULE_LICENSE("GPL v2");
423MODULE_ALIAS("platform:cdns-rtc");
diff --git a/drivers/rtc/rtc-coh901331.c b/drivers/rtc/rtc-coh901331.c
index fc5cf5c44ae7..0b232c84f674 100644
--- a/drivers/rtc/rtc-coh901331.c
+++ b/drivers/rtc/rtc-coh901331.c
@@ -235,9 +235,13 @@ static int coh901331_suspend(struct device *dev)
235 235
236static int coh901331_resume(struct device *dev) 236static int coh901331_resume(struct device *dev)
237{ 237{
238 int ret;
238 struct coh901331_port *rtap = dev_get_drvdata(dev); 239 struct coh901331_port *rtap = dev_get_drvdata(dev);
239 240
240 clk_prepare(rtap->clk); 241 ret = clk_prepare(rtap->clk);
242 if (ret)
243 return ret;
244
241 if (device_may_wakeup(dev)) { 245 if (device_may_wakeup(dev)) {
242 disable_irq_wake(rtap->irq); 246 disable_irq_wake(rtap->irq);
243 } else { 247 } else {
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 74b31dce484f..07530fe1da2a 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -114,6 +114,33 @@ enum ds_type {
114# define RX8025_BIT_VDET 0x40 114# define RX8025_BIT_VDET 0x40
115# define RX8025_BIT_XST 0x20 115# define RX8025_BIT_XST 0x20
116 116
117#define RX8130_REG_ALARM_MIN 0x17
118#define RX8130_REG_ALARM_HOUR 0x18
119#define RX8130_REG_ALARM_WEEK_OR_DAY 0x19
120#define RX8130_REG_EXTENSION 0x1c
121#define RX8130_REG_EXTENSION_WADA BIT(3)
122#define RX8130_REG_FLAG 0x1d
123#define RX8130_REG_FLAG_VLF BIT(1)
124#define RX8130_REG_FLAG_AF BIT(3)
125#define RX8130_REG_CONTROL0 0x1e
126#define RX8130_REG_CONTROL0_AIE BIT(3)
127
128#define MCP794XX_REG_CONTROL 0x07
129# define MCP794XX_BIT_ALM0_EN 0x10
130# define MCP794XX_BIT_ALM1_EN 0x20
131#define MCP794XX_REG_ALARM0_BASE 0x0a
132#define MCP794XX_REG_ALARM0_CTRL 0x0d
133#define MCP794XX_REG_ALARM1_BASE 0x11
134#define MCP794XX_REG_ALARM1_CTRL 0x14
135# define MCP794XX_BIT_ALMX_IF BIT(3)
136# define MCP794XX_BIT_ALMX_C0 BIT(4)
137# define MCP794XX_BIT_ALMX_C1 BIT(5)
138# define MCP794XX_BIT_ALMX_C2 BIT(6)
139# define MCP794XX_BIT_ALMX_POL BIT(7)
140# define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
141 MCP794XX_BIT_ALMX_C1 | \
142 MCP794XX_BIT_ALMX_C2)
143
117#define M41TXX_REG_CONTROL 0x07 144#define M41TXX_REG_CONTROL 0x07
118# define M41TXX_BIT_OUT BIT(7) 145# define M41TXX_BIT_OUT BIT(7)
119# define M41TXX_BIT_FT BIT(6) 146# define M41TXX_BIT_FT BIT(6)
@@ -158,289 +185,7 @@ struct chip_desc {
158 bool); 185 bool);
159}; 186};
160 187
161static int ds1307_get_time(struct device *dev, struct rtc_time *t); 188static const struct chip_desc chips[last_ds_type];
162static int ds1307_set_time(struct device *dev, struct rtc_time *t);
163static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t);
164static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t);
165static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled);
166static u8 do_trickle_setup_ds1339(struct ds1307 *, u32 ohms, bool diode);
167static irqreturn_t rx8130_irq(int irq, void *dev_id);
168static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t);
169static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t);
170static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled);
171static irqreturn_t mcp794xx_irq(int irq, void *dev_id);
172static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t);
173static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t);
174static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled);
175static int m41txx_rtc_read_offset(struct device *dev, long *offset);
176static int m41txx_rtc_set_offset(struct device *dev, long offset);
177
178static const struct rtc_class_ops rx8130_rtc_ops = {
179 .read_time = ds1307_get_time,
180 .set_time = ds1307_set_time,
181 .read_alarm = rx8130_read_alarm,
182 .set_alarm = rx8130_set_alarm,
183 .alarm_irq_enable = rx8130_alarm_irq_enable,
184};
185
186static const struct rtc_class_ops mcp794xx_rtc_ops = {
187 .read_time = ds1307_get_time,
188 .set_time = ds1307_set_time,
189 .read_alarm = mcp794xx_read_alarm,
190 .set_alarm = mcp794xx_set_alarm,
191 .alarm_irq_enable = mcp794xx_alarm_irq_enable,
192};
193
194static const struct rtc_class_ops m41txx_rtc_ops = {
195 .read_time = ds1307_get_time,
196 .set_time = ds1307_set_time,
197 .read_alarm = ds1337_read_alarm,
198 .set_alarm = ds1337_set_alarm,
199 .alarm_irq_enable = ds1307_alarm_irq_enable,
200 .read_offset = m41txx_rtc_read_offset,
201 .set_offset = m41txx_rtc_set_offset,
202};
203
204static const struct chip_desc chips[last_ds_type] = {
205 [ds_1307] = {
206 .nvram_offset = 8,
207 .nvram_size = 56,
208 },
209 [ds_1308] = {
210 .nvram_offset = 8,
211 .nvram_size = 56,
212 },
213 [ds_1337] = {
214 .alarm = 1,
215 .century_reg = DS1307_REG_MONTH,
216 .century_bit = DS1337_BIT_CENTURY,
217 },
218 [ds_1338] = {
219 .nvram_offset = 8,
220 .nvram_size = 56,
221 },
222 [ds_1339] = {
223 .alarm = 1,
224 .century_reg = DS1307_REG_MONTH,
225 .century_bit = DS1337_BIT_CENTURY,
226 .bbsqi_bit = DS1339_BIT_BBSQI,
227 .trickle_charger_reg = 0x10,
228 .do_trickle_setup = &do_trickle_setup_ds1339,
229 },
230 [ds_1340] = {
231 .century_reg = DS1307_REG_HOUR,
232 .century_enable_bit = DS1340_BIT_CENTURY_EN,
233 .century_bit = DS1340_BIT_CENTURY,
234 .do_trickle_setup = &do_trickle_setup_ds1339,
235 .trickle_charger_reg = 0x08,
236 },
237 [ds_1341] = {
238 .century_reg = DS1307_REG_MONTH,
239 .century_bit = DS1337_BIT_CENTURY,
240 },
241 [ds_1388] = {
242 .offset = 1,
243 .trickle_charger_reg = 0x0a,
244 },
245 [ds_3231] = {
246 .alarm = 1,
247 .century_reg = DS1307_REG_MONTH,
248 .century_bit = DS1337_BIT_CENTURY,
249 .bbsqi_bit = DS3231_BIT_BBSQW,
250 },
251 [rx_8130] = {
252 .alarm = 1,
253 /* this is battery backed SRAM */
254 .nvram_offset = 0x20,
255 .nvram_size = 4, /* 32bit (4 word x 8 bit) */
256 .offset = 0x10,
257 .irq_handler = rx8130_irq,
258 .rtc_ops = &rx8130_rtc_ops,
259 },
260 [m41t0] = {
261 .rtc_ops = &m41txx_rtc_ops,
262 },
263 [m41t00] = {
264 .rtc_ops = &m41txx_rtc_ops,
265 },
266 [m41t11] = {
267 /* this is battery backed SRAM */
268 .nvram_offset = 8,
269 .nvram_size = 56,
270 .rtc_ops = &m41txx_rtc_ops,
271 },
272 [mcp794xx] = {
273 .alarm = 1,
274 /* this is battery backed SRAM */
275 .nvram_offset = 0x20,
276 .nvram_size = 0x40,
277 .irq_handler = mcp794xx_irq,
278 .rtc_ops = &mcp794xx_rtc_ops,
279 },
280};
281
282static const struct i2c_device_id ds1307_id[] = {
283 { "ds1307", ds_1307 },
284 { "ds1308", ds_1308 },
285 { "ds1337", ds_1337 },
286 { "ds1338", ds_1338 },
287 { "ds1339", ds_1339 },
288 { "ds1388", ds_1388 },
289 { "ds1340", ds_1340 },
290 { "ds1341", ds_1341 },
291 { "ds3231", ds_3231 },
292 { "m41t0", m41t0 },
293 { "m41t00", m41t00 },
294 { "m41t11", m41t11 },
295 { "mcp7940x", mcp794xx },
296 { "mcp7941x", mcp794xx },
297 { "pt7c4338", ds_1307 },
298 { "rx8025", rx_8025 },
299 { "isl12057", ds_1337 },
300 { "rx8130", rx_8130 },
301 { }
302};
303MODULE_DEVICE_TABLE(i2c, ds1307_id);
304
305#ifdef CONFIG_OF
306static const struct of_device_id ds1307_of_match[] = {
307 {
308 .compatible = "dallas,ds1307",
309 .data = (void *)ds_1307
310 },
311 {
312 .compatible = "dallas,ds1308",
313 .data = (void *)ds_1308
314 },
315 {
316 .compatible = "dallas,ds1337",
317 .data = (void *)ds_1337
318 },
319 {
320 .compatible = "dallas,ds1338",
321 .data = (void *)ds_1338
322 },
323 {
324 .compatible = "dallas,ds1339",
325 .data = (void *)ds_1339
326 },
327 {
328 .compatible = "dallas,ds1388",
329 .data = (void *)ds_1388
330 },
331 {
332 .compatible = "dallas,ds1340",
333 .data = (void *)ds_1340
334 },
335 {
336 .compatible = "dallas,ds1341",
337 .data = (void *)ds_1341
338 },
339 {
340 .compatible = "maxim,ds3231",
341 .data = (void *)ds_3231
342 },
343 {
344 .compatible = "st,m41t0",
345 .data = (void *)m41t0
346 },
347 {
348 .compatible = "st,m41t00",
349 .data = (void *)m41t00
350 },
351 {
352 .compatible = "st,m41t11",
353 .data = (void *)m41t11
354 },
355 {
356 .compatible = "microchip,mcp7940x",
357 .data = (void *)mcp794xx
358 },
359 {
360 .compatible = "microchip,mcp7941x",
361 .data = (void *)mcp794xx
362 },
363 {
364 .compatible = "pericom,pt7c4338",
365 .data = (void *)ds_1307
366 },
367 {
368 .compatible = "epson,rx8025",
369 .data = (void *)rx_8025
370 },
371 {
372 .compatible = "isil,isl12057",
373 .data = (void *)ds_1337
374 },
375 {
376 .compatible = "epson,rx8130",
377 .data = (void *)rx_8130
378 },
379 { }
380};
381MODULE_DEVICE_TABLE(of, ds1307_of_match);
382#endif
383
384#ifdef CONFIG_ACPI
385static const struct acpi_device_id ds1307_acpi_ids[] = {
386 { .id = "DS1307", .driver_data = ds_1307 },
387 { .id = "DS1308", .driver_data = ds_1308 },
388 { .id = "DS1337", .driver_data = ds_1337 },
389 { .id = "DS1338", .driver_data = ds_1338 },
390 { .id = "DS1339", .driver_data = ds_1339 },
391 { .id = "DS1388", .driver_data = ds_1388 },
392 { .id = "DS1340", .driver_data = ds_1340 },
393 { .id = "DS1341", .driver_data = ds_1341 },
394 { .id = "DS3231", .driver_data = ds_3231 },
395 { .id = "M41T0", .driver_data = m41t0 },
396 { .id = "M41T00", .driver_data = m41t00 },
397 { .id = "M41T11", .driver_data = m41t11 },
398 { .id = "MCP7940X", .driver_data = mcp794xx },
399 { .id = "MCP7941X", .driver_data = mcp794xx },
400 { .id = "PT7C4338", .driver_data = ds_1307 },
401 { .id = "RX8025", .driver_data = rx_8025 },
402 { .id = "ISL12057", .driver_data = ds_1337 },
403 { .id = "RX8130", .driver_data = rx_8130 },
404 { }
405};
406MODULE_DEVICE_TABLE(acpi, ds1307_acpi_ids);
407#endif
408
409/*
410 * The ds1337 and ds1339 both have two alarms, but we only use the first
411 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
412 * signal; ds1339 chips have only one alarm signal.
413 */
414static irqreturn_t ds1307_irq(int irq, void *dev_id)
415{
416 struct ds1307 *ds1307 = dev_id;
417 struct mutex *lock = &ds1307->rtc->ops_lock;
418 int stat, ret;
419
420 mutex_lock(lock);
421 ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &stat);
422 if (ret)
423 goto out;
424
425 if (stat & DS1337_BIT_A1I) {
426 stat &= ~DS1337_BIT_A1I;
427 regmap_write(ds1307->regmap, DS1337_REG_STATUS, stat);
428
429 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL,
430 DS1337_BIT_A1IE, 0);
431 if (ret)
432 goto out;
433
434 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
435 }
436
437out:
438 mutex_unlock(lock);
439
440 return IRQ_HANDLED;
441}
442
443/*----------------------------------------------------------------------*/
444 189
445static int ds1307_get_time(struct device *dev, struct rtc_time *t) 190static int ds1307_get_time(struct device *dev, struct rtc_time *t)
446{ 191{
@@ -449,6 +194,20 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
449 const struct chip_desc *chip = &chips[ds1307->type]; 194 const struct chip_desc *chip = &chips[ds1307->type];
450 u8 regs[7]; 195 u8 regs[7];
451 196
197 if (ds1307->type == rx_8130) {
198 unsigned int regflag;
199 ret = regmap_read(ds1307->regmap, RX8130_REG_FLAG, &regflag);
200 if (ret) {
201 dev_err(dev, "%s error %d\n", "read", ret);
202 return ret;
203 }
204
205 if (regflag & RX8130_REG_FLAG_VLF) {
206 dev_warn_once(dev, "oscillator failed, set time!\n");
207 return -EINVAL;
208 }
209 }
210
452 /* read the RTC date and time registers all at once */ 211 /* read the RTC date and time registers all at once */
453 ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs, 212 ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs,
454 sizeof(regs)); 213 sizeof(regs));
@@ -548,6 +307,17 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t)
548 dev_err(dev, "%s error %d\n", "write", result); 307 dev_err(dev, "%s error %d\n", "write", result);
549 return result; 308 return result;
550 } 309 }
310
311 if (ds1307->type == rx_8130) {
312 /* clear Voltage Loss Flag as data is available now */
313 result = regmap_write(ds1307->regmap, RX8130_REG_FLAG,
314 ~(u8)RX8130_REG_FLAG_VLF);
315 if (result) {
316 dev_err(dev, "%s error %d\n", "write", result);
317 return result;
318 }
319 }
320
551 return 0; 321 return 0;
552} 322}
553 323
@@ -666,29 +436,28 @@ static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
666 enabled ? DS1337_BIT_A1IE : 0); 436 enabled ? DS1337_BIT_A1IE : 0);
667} 437}
668 438
669static const struct rtc_class_ops ds13xx_rtc_ops = { 439static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, u32 ohms, bool diode)
670 .read_time = ds1307_get_time, 440{
671 .set_time = ds1307_set_time, 441 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
672 .read_alarm = ds1337_read_alarm, 442 DS1307_TRICKLE_CHARGER_NO_DIODE;
673 .set_alarm = ds1337_set_alarm,
674 .alarm_irq_enable = ds1307_alarm_irq_enable,
675};
676
677/*----------------------------------------------------------------------*/
678
679/*
680 * Alarm support for rx8130 devices.
681 */
682 443
683#define RX8130_REG_ALARM_MIN 0x07 444 switch (ohms) {
684#define RX8130_REG_ALARM_HOUR 0x08 445 case 250:
685#define RX8130_REG_ALARM_WEEK_OR_DAY 0x09 446 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
686#define RX8130_REG_EXTENSION 0x0c 447 break;
687#define RX8130_REG_EXTENSION_WADA BIT(3) 448 case 2000:
688#define RX8130_REG_FLAG 0x0d 449 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
689#define RX8130_REG_FLAG_AF BIT(3) 450 break;
690#define RX8130_REG_CONTROL0 0x0e 451 case 4000:
691#define RX8130_REG_CONTROL0_AIE BIT(3) 452 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
453 break;
454 default:
455 dev_warn(ds1307->dev,
456 "Unsupported ohm value %u in dt\n", ohms);
457 return 0;
458 }
459 return setup;
460}
692 461
693static irqreturn_t rx8130_irq(int irq, void *dev_id) 462static irqreturn_t rx8130_irq(int irq, void *dev_id)
694{ 463{
@@ -785,8 +554,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
785 if (ret < 0) 554 if (ret < 0)
786 return ret; 555 return ret;
787 556
788 ctl[0] &= ~RX8130_REG_EXTENSION_WADA; 557 ctl[0] &= RX8130_REG_EXTENSION_WADA;
789 ctl[1] |= RX8130_REG_FLAG_AF; 558 ctl[1] &= ~RX8130_REG_FLAG_AF;
790 ctl[2] &= ~RX8130_REG_CONTROL0_AIE; 559 ctl[2] &= ~RX8130_REG_CONTROL0_AIE;
791 560
792 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 561 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
@@ -809,8 +578,7 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
809 578
810 ctl[2] |= RX8130_REG_CONTROL0_AIE; 579 ctl[2] |= RX8130_REG_CONTROL0_AIE;
811 580
812 return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 581 return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, ctl[2]);
813 sizeof(ctl));
814} 582}
815 583
816static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled) 584static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled)
@@ -833,28 +601,6 @@ static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled)
833 return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg); 601 return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg);
834} 602}
835 603
836/*----------------------------------------------------------------------*/
837
838/*
839 * Alarm support for mcp794xx devices.
840 */
841
842#define MCP794XX_REG_CONTROL 0x07
843# define MCP794XX_BIT_ALM0_EN 0x10
844# define MCP794XX_BIT_ALM1_EN 0x20
845#define MCP794XX_REG_ALARM0_BASE 0x0a
846#define MCP794XX_REG_ALARM0_CTRL 0x0d
847#define MCP794XX_REG_ALARM1_BASE 0x11
848#define MCP794XX_REG_ALARM1_CTRL 0x14
849# define MCP794XX_BIT_ALMX_IF BIT(3)
850# define MCP794XX_BIT_ALMX_C0 BIT(4)
851# define MCP794XX_BIT_ALMX_C1 BIT(5)
852# define MCP794XX_BIT_ALMX_C2 BIT(6)
853# define MCP794XX_BIT_ALMX_POL BIT(7)
854# define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
855 MCP794XX_BIT_ALMX_C1 | \
856 MCP794XX_BIT_ALMX_C2)
857
858static irqreturn_t mcp794xx_irq(int irq, void *dev_id) 604static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
859{ 605{
860 struct ds1307 *ds1307 = dev_id; 606 struct ds1307 *ds1307 = dev_id;
@@ -1050,6 +796,281 @@ static int m41txx_rtc_set_offset(struct device *dev, long offset)
1050 ctrl_reg); 796 ctrl_reg);
1051} 797}
1052 798
799static const struct rtc_class_ops rx8130_rtc_ops = {
800 .read_time = ds1307_get_time,
801 .set_time = ds1307_set_time,
802 .read_alarm = rx8130_read_alarm,
803 .set_alarm = rx8130_set_alarm,
804 .alarm_irq_enable = rx8130_alarm_irq_enable,
805};
806
807static const struct rtc_class_ops mcp794xx_rtc_ops = {
808 .read_time = ds1307_get_time,
809 .set_time = ds1307_set_time,
810 .read_alarm = mcp794xx_read_alarm,
811 .set_alarm = mcp794xx_set_alarm,
812 .alarm_irq_enable = mcp794xx_alarm_irq_enable,
813};
814
815static const struct rtc_class_ops m41txx_rtc_ops = {
816 .read_time = ds1307_get_time,
817 .set_time = ds1307_set_time,
818 .read_alarm = ds1337_read_alarm,
819 .set_alarm = ds1337_set_alarm,
820 .alarm_irq_enable = ds1307_alarm_irq_enable,
821 .read_offset = m41txx_rtc_read_offset,
822 .set_offset = m41txx_rtc_set_offset,
823};
824
825static const struct chip_desc chips[last_ds_type] = {
826 [ds_1307] = {
827 .nvram_offset = 8,
828 .nvram_size = 56,
829 },
830 [ds_1308] = {
831 .nvram_offset = 8,
832 .nvram_size = 56,
833 },
834 [ds_1337] = {
835 .alarm = 1,
836 .century_reg = DS1307_REG_MONTH,
837 .century_bit = DS1337_BIT_CENTURY,
838 },
839 [ds_1338] = {
840 .nvram_offset = 8,
841 .nvram_size = 56,
842 },
843 [ds_1339] = {
844 .alarm = 1,
845 .century_reg = DS1307_REG_MONTH,
846 .century_bit = DS1337_BIT_CENTURY,
847 .bbsqi_bit = DS1339_BIT_BBSQI,
848 .trickle_charger_reg = 0x10,
849 .do_trickle_setup = &do_trickle_setup_ds1339,
850 },
851 [ds_1340] = {
852 .century_reg = DS1307_REG_HOUR,
853 .century_enable_bit = DS1340_BIT_CENTURY_EN,
854 .century_bit = DS1340_BIT_CENTURY,
855 .do_trickle_setup = &do_trickle_setup_ds1339,
856 .trickle_charger_reg = 0x08,
857 },
858 [ds_1341] = {
859 .century_reg = DS1307_REG_MONTH,
860 .century_bit = DS1337_BIT_CENTURY,
861 },
862 [ds_1388] = {
863 .offset = 1,
864 .trickle_charger_reg = 0x0a,
865 },
866 [ds_3231] = {
867 .alarm = 1,
868 .century_reg = DS1307_REG_MONTH,
869 .century_bit = DS1337_BIT_CENTURY,
870 .bbsqi_bit = DS3231_BIT_BBSQW,
871 },
872 [rx_8130] = {
873 .alarm = 1,
874 /* this is battery backed SRAM */
875 .nvram_offset = 0x20,
876 .nvram_size = 4, /* 32bit (4 word x 8 bit) */
877 .offset = 0x10,
878 .irq_handler = rx8130_irq,
879 .rtc_ops = &rx8130_rtc_ops,
880 },
881 [m41t0] = {
882 .rtc_ops = &m41txx_rtc_ops,
883 },
884 [m41t00] = {
885 .rtc_ops = &m41txx_rtc_ops,
886 },
887 [m41t11] = {
888 /* this is battery backed SRAM */
889 .nvram_offset = 8,
890 .nvram_size = 56,
891 .rtc_ops = &m41txx_rtc_ops,
892 },
893 [mcp794xx] = {
894 .alarm = 1,
895 /* this is battery backed SRAM */
896 .nvram_offset = 0x20,
897 .nvram_size = 0x40,
898 .irq_handler = mcp794xx_irq,
899 .rtc_ops = &mcp794xx_rtc_ops,
900 },
901};
902
903static const struct i2c_device_id ds1307_id[] = {
904 { "ds1307", ds_1307 },
905 { "ds1308", ds_1308 },
906 { "ds1337", ds_1337 },
907 { "ds1338", ds_1338 },
908 { "ds1339", ds_1339 },
909 { "ds1388", ds_1388 },
910 { "ds1340", ds_1340 },
911 { "ds1341", ds_1341 },
912 { "ds3231", ds_3231 },
913 { "m41t0", m41t0 },
914 { "m41t00", m41t00 },
915 { "m41t11", m41t11 },
916 { "mcp7940x", mcp794xx },
917 { "mcp7941x", mcp794xx },
918 { "pt7c4338", ds_1307 },
919 { "rx8025", rx_8025 },
920 { "isl12057", ds_1337 },
921 { "rx8130", rx_8130 },
922 { }
923};
924MODULE_DEVICE_TABLE(i2c, ds1307_id);
925
926#ifdef CONFIG_OF
927static const struct of_device_id ds1307_of_match[] = {
928 {
929 .compatible = "dallas,ds1307",
930 .data = (void *)ds_1307
931 },
932 {
933 .compatible = "dallas,ds1308",
934 .data = (void *)ds_1308
935 },
936 {
937 .compatible = "dallas,ds1337",
938 .data = (void *)ds_1337
939 },
940 {
941 .compatible = "dallas,ds1338",
942 .data = (void *)ds_1338
943 },
944 {
945 .compatible = "dallas,ds1339",
946 .data = (void *)ds_1339
947 },
948 {
949 .compatible = "dallas,ds1388",
950 .data = (void *)ds_1388
951 },
952 {
953 .compatible = "dallas,ds1340",
954 .data = (void *)ds_1340
955 },
956 {
957 .compatible = "dallas,ds1341",
958 .data = (void *)ds_1341
959 },
960 {
961 .compatible = "maxim,ds3231",
962 .data = (void *)ds_3231
963 },
964 {
965 .compatible = "st,m41t0",
966 .data = (void *)m41t0
967 },
968 {
969 .compatible = "st,m41t00",
970 .data = (void *)m41t00
971 },
972 {
973 .compatible = "st,m41t11",
974 .data = (void *)m41t11
975 },
976 {
977 .compatible = "microchip,mcp7940x",
978 .data = (void *)mcp794xx
979 },
980 {
981 .compatible = "microchip,mcp7941x",
982 .data = (void *)mcp794xx
983 },
984 {
985 .compatible = "pericom,pt7c4338",
986 .data = (void *)ds_1307
987 },
988 {
989 .compatible = "epson,rx8025",
990 .data = (void *)rx_8025
991 },
992 {
993 .compatible = "isil,isl12057",
994 .data = (void *)ds_1337
995 },
996 {
997 .compatible = "epson,rx8130",
998 .data = (void *)rx_8130
999 },
1000 { }
1001};
1002MODULE_DEVICE_TABLE(of, ds1307_of_match);
1003#endif
1004
1005#ifdef CONFIG_ACPI
1006static const struct acpi_device_id ds1307_acpi_ids[] = {
1007 { .id = "DS1307", .driver_data = ds_1307 },
1008 { .id = "DS1308", .driver_data = ds_1308 },
1009 { .id = "DS1337", .driver_data = ds_1337 },
1010 { .id = "DS1338", .driver_data = ds_1338 },
1011 { .id = "DS1339", .driver_data = ds_1339 },
1012 { .id = "DS1388", .driver_data = ds_1388 },
1013 { .id = "DS1340", .driver_data = ds_1340 },
1014 { .id = "DS1341", .driver_data = ds_1341 },
1015 { .id = "DS3231", .driver_data = ds_3231 },
1016 { .id = "M41T0", .driver_data = m41t0 },
1017 { .id = "M41T00", .driver_data = m41t00 },
1018 { .id = "M41T11", .driver_data = m41t11 },
1019 { .id = "MCP7940X", .driver_data = mcp794xx },
1020 { .id = "MCP7941X", .driver_data = mcp794xx },
1021 { .id = "PT7C4338", .driver_data = ds_1307 },
1022 { .id = "RX8025", .driver_data = rx_8025 },
1023 { .id = "ISL12057", .driver_data = ds_1337 },
1024 { .id = "RX8130", .driver_data = rx_8130 },
1025 { }
1026};
1027MODULE_DEVICE_TABLE(acpi, ds1307_acpi_ids);
1028#endif
1029
1030/*
1031 * The ds1337 and ds1339 both have two alarms, but we only use the first
1032 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
1033 * signal; ds1339 chips have only one alarm signal.
1034 */
1035static irqreturn_t ds1307_irq(int irq, void *dev_id)
1036{
1037 struct ds1307 *ds1307 = dev_id;
1038 struct mutex *lock = &ds1307->rtc->ops_lock;
1039 int stat, ret;
1040
1041 mutex_lock(lock);
1042 ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &stat);
1043 if (ret)
1044 goto out;
1045
1046 if (stat & DS1337_BIT_A1I) {
1047 stat &= ~DS1337_BIT_A1I;
1048 regmap_write(ds1307->regmap, DS1337_REG_STATUS, stat);
1049
1050 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL,
1051 DS1337_BIT_A1IE, 0);
1052 if (ret)
1053 goto out;
1054
1055 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
1056 }
1057
1058out:
1059 mutex_unlock(lock);
1060
1061 return IRQ_HANDLED;
1062}
1063
1064/*----------------------------------------------------------------------*/
1065
1066static const struct rtc_class_ops ds13xx_rtc_ops = {
1067 .read_time = ds1307_get_time,
1068 .set_time = ds1307_set_time,
1069 .read_alarm = ds1337_read_alarm,
1070 .set_alarm = ds1337_set_alarm,
1071 .alarm_irq_enable = ds1307_alarm_irq_enable,
1072};
1073
1053static ssize_t frequency_test_store(struct device *dev, 1074static ssize_t frequency_test_store(struct device *dev,
1054 struct device_attribute *attr, 1075 struct device_attribute *attr,
1055 const char *buf, size_t count) 1076 const char *buf, size_t count)
@@ -1137,30 +1158,6 @@ static int ds1307_nvram_write(void *priv, unsigned int offset, void *val,
1137 1158
1138/*----------------------------------------------------------------------*/ 1159/*----------------------------------------------------------------------*/
1139 1160
1140static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307,
1141 u32 ohms, bool diode)
1142{
1143 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
1144 DS1307_TRICKLE_CHARGER_NO_DIODE;
1145
1146 switch (ohms) {
1147 case 250:
1148 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
1149 break;
1150 case 2000:
1151 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
1152 break;
1153 case 4000:
1154 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
1155 break;
1156 default:
1157 dev_warn(ds1307->dev,
1158 "Unsupported ohm value %u in dt\n", ohms);
1159 return 0;
1160 }
1161 return setup;
1162}
1163
1164static u8 ds1307_trickle_init(struct ds1307 *ds1307, 1161static u8 ds1307_trickle_init(struct ds1307 *ds1307,
1165 const struct chip_desc *chip) 1162 const struct chip_desc *chip)
1166{ 1163{
diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c
index 9caaccccaa57..b1ebca099b0d 100644
--- a/drivers/rtc/rtc-ds1672.c
+++ b/drivers/rtc/rtc-ds1672.c
@@ -58,7 +58,8 @@ static int ds1672_get_datetime(struct i2c_client *client, struct rtc_time *tm)
58 "%s: raw read data - counters=%02x,%02x,%02x,%02x\n", 58 "%s: raw read data - counters=%02x,%02x,%02x,%02x\n",
59 __func__, buf[0], buf[1], buf[2], buf[3]); 59 __func__, buf[0], buf[1], buf[2], buf[3]);
60 60
61 time = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; 61 time = ((unsigned long)buf[3] << 24) | (buf[2] << 16) |
62 (buf[1] << 8) | buf[0];
62 63
63 rtc_time_to_tm(time, tm); 64 rtc_time_to_tm(time, tm);
64 65
diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
index e5ad527cb75e..d03f5d212eea 100644
--- a/drivers/rtc/rtc-hym8563.c
+++ b/drivers/rtc/rtc-hym8563.c
@@ -109,6 +109,8 @@ static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
109 } 109 }
110 110
111 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf); 111 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
112 if (ret < 0)
113 return ret;
112 114
113 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK); 115 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
114 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK); 116 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
diff --git a/drivers/rtc/rtc-imx-sc.c b/drivers/rtc/rtc-imx-sc.c
index 7ff08544532a..19642bfd913a 100644
--- a/drivers/rtc/rtc-imx-sc.c
+++ b/drivers/rtc/rtc-imx-sc.c
@@ -3,6 +3,7 @@
3 * Copyright 2018 NXP. 3 * Copyright 2018 NXP.
4 */ 4 */
5 5
6#include <linux/arm-smccc.h>
6#include <linux/firmware/imx/sci.h> 7#include <linux/firmware/imx/sci.h>
7#include <linux/module.h> 8#include <linux/module.h>
8#include <linux/of.h> 9#include <linux/of.h>
@@ -12,6 +13,9 @@
12#define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970 9 13#define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970 9
13#define IMX_SC_TIMER_FUNC_SET_RTC_TIME 6 14#define IMX_SC_TIMER_FUNC_SET_RTC_TIME 6
14 15
16#define IMX_SIP_SRTC 0xC2000002
17#define IMX_SIP_SRTC_SET_TIME 0x0
18
15static struct imx_sc_ipc *rtc_ipc_handle; 19static struct imx_sc_ipc *rtc_ipc_handle;
16static struct rtc_device *imx_sc_rtc; 20static struct rtc_device *imx_sc_rtc;
17 21
@@ -37,13 +41,28 @@ static int imx_sc_rtc_read_time(struct device *dev, struct rtc_time *tm)
37 return ret; 41 return ret;
38 } 42 }
39 43
40 rtc_time_to_tm(msg.time, tm); 44 rtc_time64_to_tm(msg.time, tm);
41 45
42 return 0; 46 return 0;
43} 47}
44 48
49static int imx_sc_rtc_set_time(struct device *dev, struct rtc_time *tm)
50{
51 struct arm_smccc_res res;
52
53 /* pack 2 time parameters into 1 register, 16 bits for each */
54 arm_smccc_smc(IMX_SIP_SRTC, IMX_SIP_SRTC_SET_TIME,
55 ((tm->tm_year + 1900) << 16) | (tm->tm_mon + 1),
56 (tm->tm_mday << 16) | tm->tm_hour,
57 (tm->tm_min << 16) | tm->tm_sec,
58 0, 0, 0, &res);
59
60 return res.a0;
61}
62
45static const struct rtc_class_ops imx_sc_rtc_ops = { 63static const struct rtc_class_ops imx_sc_rtc_ops = {
46 .read_time = imx_sc_rtc_read_time, 64 .read_time = imx_sc_rtc_read_time,
65 .set_time = imx_sc_rtc_set_time,
47}; 66};
48 67
49static int imx_sc_rtc_probe(struct platform_device *pdev) 68static int imx_sc_rtc_probe(struct platform_device *pdev)
diff --git a/drivers/rtc/rtc-isl1208.c b/drivers/rtc/rtc-isl1208.c
index 37ab3e1d25f5..471e395b20db 100644
--- a/drivers/rtc/rtc-isl1208.c
+++ b/drivers/rtc/rtc-isl1208.c
@@ -13,6 +13,7 @@
13#include <linux/bcd.h> 13#include <linux/bcd.h>
14#include <linux/i2c.h> 14#include <linux/i2c.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/of_device.h>
16#include <linux/of_irq.h> 17#include <linux/of_irq.h>
17#include <linux/rtc.h> 18#include <linux/rtc.h>
18 19
@@ -73,10 +74,50 @@
73static struct i2c_driver isl1208_driver; 74static struct i2c_driver isl1208_driver;
74 75
75/* ISL1208 various variants */ 76/* ISL1208 various variants */
76enum { 77enum isl1208_id {
77 TYPE_ISL1208 = 0, 78 TYPE_ISL1208 = 0,
79 TYPE_ISL1209,
78 TYPE_ISL1218, 80 TYPE_ISL1218,
79 TYPE_ISL1219, 81 TYPE_ISL1219,
82 ISL_LAST_ID
83};
84
85/* Chip capabilities table */
86static const struct isl1208_config {
87 const char name[8];
88 unsigned int nvmem_length;
89 unsigned has_tamper:1;
90 unsigned has_timestamp:1;
91} isl1208_configs[] = {
92 [TYPE_ISL1208] = { "isl1208", 2, false, false },
93 [TYPE_ISL1209] = { "isl1209", 2, true, false },
94 [TYPE_ISL1218] = { "isl1218", 8, false, false },
95 [TYPE_ISL1219] = { "isl1219", 2, true, true },
96};
97
98static const struct i2c_device_id isl1208_id[] = {
99 { "isl1208", TYPE_ISL1208 },
100 { "isl1209", TYPE_ISL1209 },
101 { "isl1218", TYPE_ISL1218 },
102 { "isl1219", TYPE_ISL1219 },
103 { }
104};
105MODULE_DEVICE_TABLE(i2c, isl1208_id);
106
107static const struct of_device_id isl1208_of_match[] = {
108 { .compatible = "isil,isl1208", .data = &isl1208_configs[TYPE_ISL1208] },
109 { .compatible = "isil,isl1209", .data = &isl1208_configs[TYPE_ISL1209] },
110 { .compatible = "isil,isl1218", .data = &isl1208_configs[TYPE_ISL1218] },
111 { .compatible = "isil,isl1219", .data = &isl1208_configs[TYPE_ISL1219] },
112 { }
113};
114MODULE_DEVICE_TABLE(of, isl1208_of_match);
115
116/* Device state */
117struct isl1208_state {
118 struct nvmem_config nvmem_config;
119 struct rtc_device *rtc;
120 const struct isl1208_config *config;
80}; 121};
81 122
82/* block read */ 123/* block read */
@@ -161,6 +202,7 @@ isl1208_i2c_get_atr(struct i2c_client *client)
161 return atr; 202 return atr;
162} 203}
163 204
205/* returns adjustment value + 100 */
164static int 206static int
165isl1208_i2c_get_dtr(struct i2c_client *client) 207isl1208_i2c_get_dtr(struct i2c_client *client)
166{ 208{
@@ -171,7 +213,7 @@ isl1208_i2c_get_dtr(struct i2c_client *client)
171 /* dtr encodes adjustments of {-60,-40,-20,0,20,40,60} ppm */ 213 /* dtr encodes adjustments of {-60,-40,-20,0,20,40,60} ppm */
172 dtr = ((dtr & 0x3) * 20) * (dtr & (1 << 2) ? -1 : 1); 214 dtr = ((dtr & 0x3) * 20) * (dtr & (1 << 2) ? -1 : 1);
173 215
174 return dtr; 216 return dtr + 100;
175} 217}
176 218
177static int 219static int
@@ -248,8 +290,8 @@ isl1208_rtc_proc(struct device *dev, struct seq_file *seq)
248 (sr & ISL1208_REG_SR_RTCF) ? "bad" : "okay"); 290 (sr & ISL1208_REG_SR_RTCF) ? "bad" : "okay");
249 291
250 dtr = isl1208_i2c_get_dtr(client); 292 dtr = isl1208_i2c_get_dtr(client);
251 if (dtr >= 0 - 1) 293 if (dtr >= 0)
252 seq_printf(seq, "digital_trim\t: %d ppm\n", dtr); 294 seq_printf(seq, "digital_trim\t: %d ppm\n", dtr - 100);
253 295
254 atr = isl1208_i2c_get_atr(client); 296 atr = isl1208_i2c_get_atr(client);
255 if (atr >= 0) 297 if (atr >= 0)
@@ -556,7 +598,7 @@ isl1208_rtc_interrupt(int irq, void *data)
556{ 598{
557 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 599 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
558 struct i2c_client *client = data; 600 struct i2c_client *client = data;
559 struct rtc_device *rtc = i2c_get_clientdata(client); 601 struct isl1208_state *isl1208 = i2c_get_clientdata(client);
560 int handled = 0, sr, err; 602 int handled = 0, sr, err;
561 603
562 /* 604 /*
@@ -579,7 +621,7 @@ isl1208_rtc_interrupt(int irq, void *data)
579 if (sr & ISL1208_REG_SR_ALM) { 621 if (sr & ISL1208_REG_SR_ALM) {
580 dev_dbg(&client->dev, "alarm!\n"); 622 dev_dbg(&client->dev, "alarm!\n");
581 623
582 rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF); 624 rtc_update_irq(isl1208->rtc, 1, RTC_IRQF | RTC_AF);
583 625
584 /* Clear the alarm */ 626 /* Clear the alarm */
585 sr &= ~ISL1208_REG_SR_ALM; 627 sr &= ~ISL1208_REG_SR_ALM;
@@ -596,11 +638,12 @@ isl1208_rtc_interrupt(int irq, void *data)
596 return err; 638 return err;
597 } 639 }
598 640
599 if (sr & ISL1208_REG_SR_EVT) { 641 if (isl1208->config->has_tamper && (sr & ISL1208_REG_SR_EVT)) {
600 sysfs_notify(&rtc->dev.kobj, NULL,
601 dev_attr_timestamp0.attr.name);
602 dev_warn(&client->dev, "event detected"); 642 dev_warn(&client->dev, "event detected");
603 handled = 1; 643 handled = 1;
644 if (isl1208->config->has_timestamp)
645 sysfs_notify(&isl1208->rtc->dev.kobj, NULL,
646 dev_attr_timestamp0.attr.name);
604 } 647 }
605 648
606 return handled ? IRQ_HANDLED : IRQ_NONE; 649 return handled ? IRQ_HANDLED : IRQ_NONE;
@@ -637,7 +680,7 @@ isl1208_sysfs_show_dtrim(struct device *dev,
637 if (dtr < 0) 680 if (dtr < 0)
638 return dtr; 681 return dtr;
639 682
640 return sprintf(buf, "%d ppm\n", dtr); 683 return sprintf(buf, "%d ppm\n", dtr - 100);
641} 684}
642 685
643static DEVICE_ATTR(dtrim, S_IRUGO, isl1208_sysfs_show_dtrim, NULL); 686static DEVICE_ATTR(dtrim, S_IRUGO, isl1208_sysfs_show_dtrim, NULL);
@@ -700,6 +743,46 @@ static const struct attribute_group isl1219_rtc_sysfs_files = {
700 .attrs = isl1219_rtc_attrs, 743 .attrs = isl1219_rtc_attrs,
701}; 744};
702 745
746static int isl1208_nvmem_read(void *priv, unsigned int off, void *buf,
747 size_t count)
748{
749 struct isl1208_state *isl1208 = priv;
750 struct i2c_client *client = to_i2c_client(isl1208->rtc->dev.parent);
751 int ret;
752
753 /* nvmem sanitizes offset/count for us, but count==0 is possible */
754 if (!count)
755 return count;
756 ret = isl1208_i2c_read_regs(client, ISL1208_REG_USR1 + off, buf,
757 count);
758 return ret == 0 ? count : ret;
759}
760
761static int isl1208_nvmem_write(void *priv, unsigned int off, void *buf,
762 size_t count)
763{
764 struct isl1208_state *isl1208 = priv;
765 struct i2c_client *client = to_i2c_client(isl1208->rtc->dev.parent);
766 int ret;
767
768 /* nvmem sanitizes off/count for us, but count==0 is possible */
769 if (!count)
770 return count;
771 ret = isl1208_i2c_set_regs(client, ISL1208_REG_USR1 + off, buf,
772 count);
773
774 return ret == 0 ? count : ret;
775}
776
777static const struct nvmem_config isl1208_nvmem_config = {
778 .name = "isl1208_nvram",
779 .word_size = 1,
780 .stride = 1,
781 /* .size from chip specific config */
782 .reg_read = isl1208_nvmem_read,
783 .reg_write = isl1208_nvmem_write,
784};
785
703static int isl1208_setup_irq(struct i2c_client *client, int irq) 786static int isl1208_setup_irq(struct i2c_client *client, int irq)
704{ 787{
705 int rc = devm_request_threaded_irq(&client->dev, irq, NULL, 788 int rc = devm_request_threaded_irq(&client->dev, irq, NULL,
@@ -722,7 +805,7 @@ static int
722isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id) 805isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
723{ 806{
724 int rc = 0; 807 int rc = 0;
725 struct rtc_device *rtc; 808 struct isl1208_state *isl1208;
726 int evdet_irq = -1; 809 int evdet_irq = -1;
727 810
728 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 811 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
@@ -731,13 +814,33 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
731 if (isl1208_i2c_validate_client(client) < 0) 814 if (isl1208_i2c_validate_client(client) < 0)
732 return -ENODEV; 815 return -ENODEV;
733 816
734 rtc = devm_rtc_allocate_device(&client->dev); 817 /* Allocate driver state, point i2c client data to it */
735 if (IS_ERR(rtc)) 818 isl1208 = devm_kzalloc(&client->dev, sizeof(*isl1208), GFP_KERNEL);
736 return PTR_ERR(rtc); 819 if (!isl1208)
820 return -ENOMEM;
821 i2c_set_clientdata(client, isl1208);
822
823 /* Determine which chip we have */
824 if (client->dev.of_node) {
825 isl1208->config = of_device_get_match_data(&client->dev);
826 if (!isl1208->config)
827 return -ENODEV;
828 } else {
829 if (id->driver_data >= ISL_LAST_ID)
830 return -ENODEV;
831 isl1208->config = &isl1208_configs[id->driver_data];
832 }
833
834 isl1208->rtc = devm_rtc_allocate_device(&client->dev);
835 if (IS_ERR(isl1208->rtc))
836 return PTR_ERR(isl1208->rtc);
737 837
738 rtc->ops = &isl1208_rtc_ops; 838 isl1208->rtc->ops = &isl1208_rtc_ops;
739 839
740 i2c_set_clientdata(client, rtc); 840 /* Setup nvmem configuration in driver state struct */
841 isl1208->nvmem_config = isl1208_nvmem_config;
842 isl1208->nvmem_config.size = isl1208->config->nvmem_length;
843 isl1208->nvmem_config.priv = isl1208;
741 844
742 rc = isl1208_i2c_get_sr(client); 845 rc = isl1208_i2c_get_sr(client);
743 if (rc < 0) { 846 if (rc < 0) {
@@ -749,7 +852,7 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
749 dev_warn(&client->dev, "rtc power failure detected, " 852 dev_warn(&client->dev, "rtc power failure detected, "
750 "please set clock.\n"); 853 "please set clock.\n");
751 854
752 if (id->driver_data == TYPE_ISL1219) { 855 if (isl1208->config->has_tamper) {
753 struct device_node *np = client->dev.of_node; 856 struct device_node *np = client->dev.of_node;
754 u32 evienb; 857 u32 evienb;
755 858
@@ -770,13 +873,15 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
770 dev_err(&client->dev, "could not enable tamper detection\n"); 873 dev_err(&client->dev, "could not enable tamper detection\n");
771 return rc; 874 return rc;
772 } 875 }
773 rc = rtc_add_group(rtc, &isl1219_rtc_sysfs_files); 876 evdet_irq = of_irq_get_byname(np, "evdet");
877 }
878 if (isl1208->config->has_timestamp) {
879 rc = rtc_add_group(isl1208->rtc, &isl1219_rtc_sysfs_files);
774 if (rc) 880 if (rc)
775 return rc; 881 return rc;
776 evdet_irq = of_irq_get_byname(np, "evdet");
777 } 882 }
778 883
779 rc = rtc_add_group(rtc, &isl1208_rtc_sysfs_files); 884 rc = rtc_add_group(isl1208->rtc, &isl1208_rtc_sysfs_files);
780 if (rc) 885 if (rc)
781 return rc; 886 return rc;
782 887
@@ -790,24 +895,12 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
790 if (rc) 895 if (rc)
791 return rc; 896 return rc;
792 897
793 return rtc_register_device(rtc); 898 rc = rtc_nvmem_register(isl1208->rtc, &isl1208->nvmem_config);
794} 899 if (rc)
795 900 return rc;
796static const struct i2c_device_id isl1208_id[] = {
797 { "isl1208", TYPE_ISL1208 },
798 { "isl1218", TYPE_ISL1218 },
799 { "isl1219", TYPE_ISL1219 },
800 { }
801};
802MODULE_DEVICE_TABLE(i2c, isl1208_id);
803 901
804static const struct of_device_id isl1208_of_match[] = { 902 return rtc_register_device(isl1208->rtc);
805 { .compatible = "isil,isl1208" }, 903}
806 { .compatible = "isil,isl1218" },
807 { .compatible = "isil,isl1219" },
808 { }
809};
810MODULE_DEVICE_TABLE(of, isl1208_of_match);
811 904
812static struct i2c_driver isl1208_driver = { 905static struct i2c_driver isl1208_driver = {
813 .driver = { 906 .driver = {
diff --git a/drivers/rtc/rtc-mc146818-lib.c b/drivers/rtc/rtc-mc146818-lib.c
index 2f1772a358ca..18a6f15e313d 100644
--- a/drivers/rtc/rtc-mc146818-lib.c
+++ b/drivers/rtc/rtc-mc146818-lib.c
@@ -82,7 +82,7 @@ unsigned int mc146818_get_time(struct rtc_time *time)
82 time->tm_year += real_year - 72; 82 time->tm_year += real_year - 72;
83#endif 83#endif
84 84
85 if (century) 85 if (century > 20)
86 time->tm_year += (century - 19) * 100; 86 time->tm_year += (century - 19) * 100;
87 87
88 /* 88 /*
diff --git a/drivers/rtc/rtc-meson.c b/drivers/rtc/rtc-meson.c
new file mode 100644
index 000000000000..e08b981dfc21
--- /dev/null
+++ b/drivers/rtc/rtc-meson.c
@@ -0,0 +1,407 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * RTC driver for the interal RTC block in the Amlogic Meson6, Meson8,
4 * Meson8b and Meson8m2 SoCs.
5 *
6 * The RTC is split in to two parts, the AHB front end and a simple serial
7 * connection to the actual registers. This driver manages both parts.
8 *
9 * Copyright (c) 2018 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
10 * Copyright (c) 2015 Ben Dooks <ben.dooks@codethink.co.uk> for Codethink Ltd
11 * Based on origin by Carlo Caione <carlo@endlessm.com>
12 */
13
14#include <linux/bitfield.h>
15#include <linux/delay.h>
16#include <linux/io.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/nvmem-provider.h>
20#include <linux/of.h>
21#include <linux/platform_device.h>
22#include <linux/regmap.h>
23#include <linux/regulator/consumer.h>
24#include <linux/reset.h>
25#include <linux/rtc.h>
26
27/* registers accessed from cpu bus */
28#define RTC_ADDR0 0x00
29 #define RTC_ADDR0_LINE_SCLK BIT(0)
30 #define RTC_ADDR0_LINE_SEN BIT(1)
31 #define RTC_ADDR0_LINE_SDI BIT(2)
32 #define RTC_ADDR0_START_SER BIT(17)
33 #define RTC_ADDR0_WAIT_SER BIT(22)
34 #define RTC_ADDR0_DATA GENMASK(31, 24)
35
36#define RTC_ADDR1 0x04
37 #define RTC_ADDR1_SDO BIT(0)
38 #define RTC_ADDR1_S_READY BIT(1)
39
40#define RTC_ADDR2 0x08
41#define RTC_ADDR3 0x0c
42
43#define RTC_REG4 0x10
44 #define RTC_REG4_STATIC_VALUE GENMASK(7, 0)
45
46/* rtc registers accessed via rtc-serial interface */
47#define RTC_COUNTER (0)
48#define RTC_SEC_ADJ (2)
49#define RTC_REGMEM_0 (4)
50#define RTC_REGMEM_1 (5)
51#define RTC_REGMEM_2 (6)
52#define RTC_REGMEM_3 (7)
53
54#define RTC_ADDR_BITS (3) /* number of address bits to send */
55#define RTC_DATA_BITS (32) /* number of data bits to tx/rx */
56
57#define MESON_STATIC_BIAS_CUR (0x5 << 1)
58#define MESON_STATIC_VOLTAGE (0x3 << 11)
59#define MESON_STATIC_DEFAULT (MESON_STATIC_BIAS_CUR | MESON_STATIC_VOLTAGE)
60
61struct meson_rtc {
62 struct rtc_device *rtc; /* rtc device we created */
63 struct device *dev; /* device we bound from */
64 struct reset_control *reset; /* reset source */
65 struct regulator *vdd; /* voltage input */
66 struct regmap *peripheral; /* peripheral registers */
67 struct regmap *serial; /* serial registers */
68};
69
70static const struct regmap_config meson_rtc_peripheral_regmap_config = {
71 .name = "peripheral-registers",
72 .reg_bits = 8,
73 .val_bits = 32,
74 .reg_stride = 4,
75 .max_register = RTC_REG4,
76 .fast_io = true,
77};
78
79/* RTC front-end serialiser controls */
80
81static void meson_rtc_sclk_pulse(struct meson_rtc *rtc)
82{
83 udelay(5);
84 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0);
85 udelay(5);
86 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK,
87 RTC_ADDR0_LINE_SCLK);
88}
89
90static void meson_rtc_send_bit(struct meson_rtc *rtc, unsigned int bit)
91{
92 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI,
93 bit ? RTC_ADDR0_LINE_SDI : 0);
94 meson_rtc_sclk_pulse(rtc);
95}
96
97static void meson_rtc_send_bits(struct meson_rtc *rtc, u32 data,
98 unsigned int nr)
99{
100 u32 bit = 1 << (nr - 1);
101
102 while (bit) {
103 meson_rtc_send_bit(rtc, data & bit);
104 bit >>= 1;
105 }
106}
107
108static void meson_rtc_set_dir(struct meson_rtc *rtc, u32 mode)
109{
110 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN, 0);
111 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0);
112 meson_rtc_send_bit(rtc, mode);
113 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0);
114}
115
116static u32 meson_rtc_get_data(struct meson_rtc *rtc)
117{
118 u32 tmp, val = 0;
119 int bit;
120
121 for (bit = 0; bit < RTC_DATA_BITS; bit++) {
122 meson_rtc_sclk_pulse(rtc);
123 val <<= 1;
124
125 regmap_read(rtc->peripheral, RTC_ADDR1, &tmp);
126 val |= tmp & RTC_ADDR1_SDO;
127 }
128
129 return val;
130}
131
132static int meson_rtc_get_bus(struct meson_rtc *rtc)
133{
134 int ret, retries = 3;
135 u32 val;
136
137 /* prepare bus for transfers, set all lines low */
138 val = RTC_ADDR0_LINE_SDI | RTC_ADDR0_LINE_SEN | RTC_ADDR0_LINE_SCLK;
139 regmap_update_bits(rtc->peripheral, RTC_ADDR0, val, 0);
140
141 for (retries = 0; retries < 3; retries++) {
142 /* wait for the bus to be ready */
143 if (!regmap_read_poll_timeout(rtc->peripheral, RTC_ADDR1, val,
144 val & RTC_ADDR1_S_READY, 10,
145 10000))
146 return 0;
147
148 dev_warn(rtc->dev, "failed to get bus, resetting RTC\n");
149
150 ret = reset_control_reset(rtc->reset);
151 if (ret)
152 return ret;
153 }
154
155 dev_err(rtc->dev, "bus is not ready\n");
156 return -ETIMEDOUT;
157}
158
159static int meson_rtc_serial_bus_reg_read(void *context, unsigned int reg,
160 unsigned int *data)
161{
162 struct meson_rtc *rtc = context;
163 int ret;
164
165 ret = meson_rtc_get_bus(rtc);
166 if (ret)
167 return ret;
168
169 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN,
170 RTC_ADDR0_LINE_SEN);
171 meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
172 meson_rtc_set_dir(rtc, 0);
173 *data = meson_rtc_get_data(rtc);
174
175 return 0;
176}
177
178static int meson_rtc_serial_bus_reg_write(void *context, unsigned int reg,
179 unsigned int data)
180{
181 struct meson_rtc *rtc = context;
182 int ret;
183
184 ret = meson_rtc_get_bus(rtc);
185 if (ret)
186 return ret;
187
188 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN,
189 RTC_ADDR0_LINE_SEN);
190 meson_rtc_send_bits(rtc, data, RTC_DATA_BITS);
191 meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
192 meson_rtc_set_dir(rtc, 1);
193
194 return 0;
195}
196
197static const struct regmap_bus meson_rtc_serial_bus = {
198 .reg_read = meson_rtc_serial_bus_reg_read,
199 .reg_write = meson_rtc_serial_bus_reg_write,
200};
201
202static const struct regmap_config meson_rtc_serial_regmap_config = {
203 .name = "serial-registers",
204 .reg_bits = 4,
205 .reg_stride = 1,
206 .val_bits = 32,
207 .max_register = RTC_REGMEM_3,
208 .fast_io = false,
209};
210
211static int meson_rtc_write_static(struct meson_rtc *rtc, u32 data)
212{
213 u32 tmp;
214
215 regmap_write(rtc->peripheral, RTC_REG4,
216 FIELD_PREP(RTC_REG4_STATIC_VALUE, (data >> 8)));
217
218 /* write the static value and start the auto serializer */
219 tmp = FIELD_PREP(RTC_ADDR0_DATA, (data & 0xff)) | RTC_ADDR0_START_SER;
220 regmap_update_bits(rtc->peripheral, RTC_ADDR0,
221 RTC_ADDR0_DATA | RTC_ADDR0_START_SER, tmp);
222
223 /* wait for the auto serializer to complete */
224 return regmap_read_poll_timeout(rtc->peripheral, RTC_REG4, tmp,
225 !(tmp & RTC_ADDR0_WAIT_SER), 10,
226 10000);
227}
228
229/* RTC interface layer functions */
230
231static int meson_rtc_gettime(struct device *dev, struct rtc_time *tm)
232{
233 struct meson_rtc *rtc = dev_get_drvdata(dev);
234 u32 time;
235 int ret;
236
237 ret = regmap_read(rtc->serial, RTC_COUNTER, &time);
238 if (!ret)
239 rtc_time64_to_tm(time, tm);
240
241 return ret;
242}
243
244static int meson_rtc_settime(struct device *dev, struct rtc_time *tm)
245{
246 struct meson_rtc *rtc = dev_get_drvdata(dev);
247
248 return regmap_write(rtc->serial, RTC_COUNTER, rtc_tm_to_time64(tm));
249}
250
251static const struct rtc_class_ops meson_rtc_ops = {
252 .read_time = meson_rtc_gettime,
253 .set_time = meson_rtc_settime,
254};
255
256/* NVMEM interface layer functions */
257
258static int meson_rtc_regmem_read(void *context, unsigned int offset,
259 void *buf, size_t bytes)
260{
261 struct meson_rtc *rtc = context;
262 unsigned int read_offset, read_size;
263
264 read_offset = RTC_REGMEM_0 + (offset / 4);
265 read_size = bytes / 4;
266
267 return regmap_bulk_read(rtc->serial, read_offset, buf, read_size);
268}
269
270static int meson_rtc_regmem_write(void *context, unsigned int offset,
271 void *buf, size_t bytes)
272{
273 struct meson_rtc *rtc = context;
274 unsigned int write_offset, write_size;
275
276 write_offset = RTC_REGMEM_0 + (offset / 4);
277 write_size = bytes / 4;
278
279 return regmap_bulk_write(rtc->serial, write_offset, buf, write_size);
280}
281
282static int meson_rtc_probe(struct platform_device *pdev)
283{
284 struct nvmem_config meson_rtc_nvmem_config = {
285 .name = "meson-rtc-regmem",
286 .type = NVMEM_TYPE_BATTERY_BACKED,
287 .word_size = 4,
288 .stride = 4,
289 .size = 4 * 4,
290 .reg_read = meson_rtc_regmem_read,
291 .reg_write = meson_rtc_regmem_write,
292 };
293 struct device *dev = &pdev->dev;
294 struct meson_rtc *rtc;
295 struct resource *res;
296 void __iomem *base;
297 int ret;
298 u32 tm;
299
300 rtc = devm_kzalloc(dev, sizeof(struct meson_rtc), GFP_KERNEL);
301 if (!rtc)
302 return -ENOMEM;
303
304 rtc->rtc = devm_rtc_allocate_device(dev);
305 if (IS_ERR(rtc->rtc))
306 return PTR_ERR(rtc->rtc);
307
308 platform_set_drvdata(pdev, rtc);
309
310 rtc->dev = dev;
311
312 rtc->rtc->ops = &meson_rtc_ops;
313 rtc->rtc->range_max = U32_MAX;
314
315 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
316 base = devm_ioremap_resource(dev, res);
317 if (IS_ERR(base))
318 return PTR_ERR(base);
319
320 rtc->peripheral = devm_regmap_init_mmio(dev, base,
321 &meson_rtc_peripheral_regmap_config);
322 if (IS_ERR(rtc->peripheral)) {
323 dev_err(dev, "failed to create peripheral regmap\n");
324 return PTR_ERR(rtc->peripheral);
325 }
326
327 rtc->reset = devm_reset_control_get(dev, NULL);
328 if (IS_ERR(rtc->reset)) {
329 dev_err(dev, "missing reset line\n");
330 return PTR_ERR(rtc->reset);
331 }
332
333 rtc->vdd = devm_regulator_get(dev, "vdd");
334 if (IS_ERR(rtc->vdd)) {
335 dev_err(dev, "failed to get the vdd-supply\n");
336 return PTR_ERR(rtc->vdd);
337 }
338
339 ret = regulator_enable(rtc->vdd);
340 if (ret) {
341 dev_err(dev, "failed to enable vdd-supply\n");
342 return ret;
343 }
344
345 ret = meson_rtc_write_static(rtc, MESON_STATIC_DEFAULT);
346 if (ret) {
347 dev_err(dev, "failed to set static values\n");
348 goto out_disable_vdd;
349 }
350
351 rtc->serial = devm_regmap_init(dev, &meson_rtc_serial_bus, rtc,
352 &meson_rtc_serial_regmap_config);
353 if (IS_ERR(rtc->serial)) {
354 dev_err(dev, "failed to create serial regmap\n");
355 ret = PTR_ERR(rtc->serial);
356 goto out_disable_vdd;
357 }
358
359 /*
360 * check if we can read RTC counter, if not then the RTC is probably
361 * not functional. If it isn't probably best to not bind.
362 */
363 ret = regmap_read(rtc->serial, RTC_COUNTER, &tm);
364 if (ret) {
365 dev_err(dev, "cannot read RTC counter, RTC not functional\n");
366 goto out_disable_vdd;
367 }
368
369 meson_rtc_nvmem_config.priv = rtc;
370 ret = rtc_nvmem_register(rtc->rtc, &meson_rtc_nvmem_config);
371 if (ret)
372 goto out_disable_vdd;
373
374 ret = rtc_register_device(rtc->rtc);
375 if (ret)
376 goto out_disable_vdd;
377
378 return 0;
379
380out_disable_vdd:
381 regulator_disable(rtc->vdd);
382 return ret;
383}
384
385static const struct of_device_id meson_rtc_dt_match[] = {
386 { .compatible = "amlogic,meson6-rtc", },
387 { .compatible = "amlogic,meson8-rtc", },
388 { .compatible = "amlogic,meson8b-rtc", },
389 { .compatible = "amlogic,meson8m2-rtc", },
390 { },
391};
392MODULE_DEVICE_TABLE(of, meson_rtc_dt_match);
393
394static struct platform_driver meson_rtc_driver = {
395 .probe = meson_rtc_probe,
396 .driver = {
397 .name = "meson-rtc",
398 .of_match_table = of_match_ptr(meson_rtc_dt_match),
399 },
400};
401module_platform_driver(meson_rtc_driver);
402
403MODULE_DESCRIPTION("Amlogic Meson RTC Driver");
404MODULE_AUTHOR("Ben Dooks <ben.doosk@codethink.co.uk>");
405MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
406MODULE_LICENSE("GPL v2");
407MODULE_ALIAS("platform:meson-rtc");
diff --git a/drivers/rtc/rtc-pcf85063.c b/drivers/rtc/rtc-pcf85063.c
index 283c2335b01b..f6ce63c443a0 100644
--- a/drivers/rtc/rtc-pcf85063.c
+++ b/drivers/rtc/rtc-pcf85063.c
@@ -27,17 +27,11 @@
27*/ 27*/
28 28
29#define PCF85063_REG_CTRL1 0x00 /* status */ 29#define PCF85063_REG_CTRL1 0x00 /* status */
30#define PCF85063_REG_CTRL1_CAP_SEL BIT(0)
30#define PCF85063_REG_CTRL1_STOP BIT(5) 31#define PCF85063_REG_CTRL1_STOP BIT(5)
31#define PCF85063_REG_CTRL2 0x01
32 32
33#define PCF85063_REG_SC 0x04 /* datetime */ 33#define PCF85063_REG_SC 0x04 /* datetime */
34#define PCF85063_REG_SC_OS 0x80 34#define PCF85063_REG_SC_OS 0x80
35#define PCF85063_REG_MN 0x05
36#define PCF85063_REG_HR 0x06
37#define PCF85063_REG_DM 0x07
38#define PCF85063_REG_DW 0x08
39#define PCF85063_REG_MO 0x09
40#define PCF85063_REG_YR 0x0A
41 35
42static struct i2c_driver pcf85063_driver; 36static struct i2c_driver pcf85063_driver;
43 37
@@ -180,6 +174,39 @@ static const struct rtc_class_ops pcf85063_rtc_ops = {
180 .set_time = pcf85063_rtc_set_time 174 .set_time = pcf85063_rtc_set_time
181}; 175};
182 176
177static int pcf85063_load_capacitance(struct i2c_client *client)
178{
179 u32 load;
180 int rc;
181 u8 reg;
182
183 rc = i2c_smbus_read_byte_data(client, PCF85063_REG_CTRL1);
184 if (rc < 0)
185 return rc;
186
187 reg = rc;
188 load = 7000;
189 of_property_read_u32(client->dev.of_node, "quartz-load-femtofarads",
190 &load);
191
192 switch (load) {
193 default:
194 dev_warn(&client->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
195 load);
196 /* fall through */
197 case 7000:
198 reg &= ~PCF85063_REG_CTRL1_CAP_SEL;
199 break;
200 case 12500:
201 reg |= PCF85063_REG_CTRL1_CAP_SEL;
202 break;
203 }
204
205 rc = i2c_smbus_write_byte_data(client, PCF85063_REG_CTRL1, reg);
206
207 return rc;
208}
209
183static int pcf85063_probe(struct i2c_client *client, 210static int pcf85063_probe(struct i2c_client *client,
184 const struct i2c_device_id *id) 211 const struct i2c_device_id *id)
185{ 212{
@@ -197,6 +224,11 @@ static int pcf85063_probe(struct i2c_client *client,
197 return err; 224 return err;
198 } 225 }
199 226
227 err = pcf85063_load_capacitance(client);
228 if (err < 0)
229 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
230 err);
231
200 rtc = devm_rtc_device_register(&client->dev, 232 rtc = devm_rtc_device_register(&client->dev,
201 pcf85063_driver.driver.name, 233 pcf85063_driver.driver.name,
202 &pcf85063_rtc_ops, THIS_MODULE); 234 &pcf85063_rtc_ops, THIS_MODULE);
diff --git a/drivers/rtc/rtc-pcf8523.c b/drivers/rtc/rtc-pcf8523.c
index 3fcd2cbafc84..b5c61a70b5df 100644
--- a/drivers/rtc/rtc-pcf8523.c
+++ b/drivers/rtc/rtc-pcf8523.c
@@ -97,8 +97,9 @@ static int pcf8523_voltage_low(struct i2c_client *client)
97 return !!(value & REG_CONTROL3_BLF); 97 return !!(value & REG_CONTROL3_BLF);
98} 98}
99 99
100static int pcf8523_select_capacitance(struct i2c_client *client, bool high) 100static int pcf8523_load_capacitance(struct i2c_client *client)
101{ 101{
102 u32 load;
102 u8 value; 103 u8 value;
103 int err; 104 int err;
104 105
@@ -106,14 +107,24 @@ static int pcf8523_select_capacitance(struct i2c_client *client, bool high)
106 if (err < 0) 107 if (err < 0)
107 return err; 108 return err;
108 109
109 if (!high) 110 load = 12500;
110 value &= ~REG_CONTROL1_CAP_SEL; 111 of_property_read_u32(client->dev.of_node, "quartz-load-femtofarads",
111 else 112 &load);
113
114 switch (load) {
115 default:
116 dev_warn(&client->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
117 load);
118 /* fall through */
119 case 12500:
112 value |= REG_CONTROL1_CAP_SEL; 120 value |= REG_CONTROL1_CAP_SEL;
121 break;
122 case 7000:
123 value &= ~REG_CONTROL1_CAP_SEL;
124 break;
125 }
113 126
114 err = pcf8523_write(client, REG_CONTROL1, value); 127 err = pcf8523_write(client, REG_CONTROL1, value);
115 if (err < 0)
116 return err;
117 128
118 return err; 129 return err;
119} 130}
@@ -347,9 +358,10 @@ static int pcf8523_probe(struct i2c_client *client,
347 if (!pcf) 358 if (!pcf)
348 return -ENOMEM; 359 return -ENOMEM;
349 360
350 err = pcf8523_select_capacitance(client, true); 361 err = pcf8523_load_capacitance(client);
351 if (err < 0) 362 if (err < 0)
352 return err; 363 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
364 err);
353 365
354 err = pcf8523_set_pm(client, 0); 366 err = pcf8523_set_pm(client, 0);
355 if (err < 0) 367 if (err < 0)
@@ -374,6 +386,7 @@ MODULE_DEVICE_TABLE(i2c, pcf8523_id);
374#ifdef CONFIG_OF 386#ifdef CONFIG_OF
375static const struct of_device_id pcf8523_of_match[] = { 387static const struct of_device_id pcf8523_of_match[] = {
376 { .compatible = "nxp,pcf8523" }, 388 { .compatible = "nxp,pcf8523" },
389 { .compatible = "microcrystal,rv8523" },
377 { } 390 { }
378}; 391};
379MODULE_DEVICE_TABLE(of, pcf8523_of_match); 392MODULE_DEVICE_TABLE(of, pcf8523_of_match);
diff --git a/drivers/rtc/rtc-pic32.c b/drivers/rtc/rtc-pic32.c
index d7ef0a6f8931..1c4de6e90da0 100644
--- a/drivers/rtc/rtc-pic32.c
+++ b/drivers/rtc/rtc-pic32.c
@@ -1,18 +1,10 @@
1// SPDX-License-Identifier: GPL-2.0+
1/* 2/*
2 * PIC32 RTC driver 3 * PIC32 RTC driver
3 * 4 *
4 * Joshua Henderson <joshua.henderson@microchip.com> 5 * Joshua Henderson <joshua.henderson@microchip.com>
5 * Copyright (C) 2016 Microchip Technology Inc. All rights reserved. 6 * Copyright (C) 2016 Microchip Technology Inc. All rights reserved.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 */ 8 */
17#include <linux/init.h> 9#include <linux/init.h>
18#include <linux/module.h> 10#include <linux/module.h>
@@ -180,22 +172,16 @@ static int pic32_rtc_settime(struct device *dev, struct rtc_time *tm)
180{ 172{
181 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev); 173 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
182 void __iomem *base = pdata->reg_base; 174 void __iomem *base = pdata->reg_base;
183 int year = tm->tm_year - 100;
184 175
185 dev_dbg(dev, "set time %ptR\n", tm); 176 dev_dbg(dev, "set time %ptR\n", tm);
186 177
187 if (year < 0 || year >= 100) {
188 dev_err(dev, "rtc only supports 100 years\n");
189 return -EINVAL;
190 }
191
192 clk_enable(pdata->clk); 178 clk_enable(pdata->clk);
193 writeb(bin2bcd(tm->tm_sec), base + PIC32_RTCSEC); 179 writeb(bin2bcd(tm->tm_sec), base + PIC32_RTCSEC);
194 writeb(bin2bcd(tm->tm_min), base + PIC32_RTCMIN); 180 writeb(bin2bcd(tm->tm_min), base + PIC32_RTCMIN);
195 writeb(bin2bcd(tm->tm_hour), base + PIC32_RTCHOUR); 181 writeb(bin2bcd(tm->tm_hour), base + PIC32_RTCHOUR);
196 writeb(bin2bcd(tm->tm_mday), base + PIC32_RTCDAY); 182 writeb(bin2bcd(tm->tm_mday), base + PIC32_RTCDAY);
197 writeb(bin2bcd(tm->tm_mon + 1), base + PIC32_RTCMON); 183 writeb(bin2bcd(tm->tm_mon + 1), base + PIC32_RTCMON);
198 writeb(bin2bcd(year), base + PIC32_RTCYEAR); 184 writeb(bin2bcd(tm->tm_year - 100), base + PIC32_RTCYEAR);
199 clk_disable(pdata->clk); 185 clk_disable(pdata->clk);
200 186
201 return 0; 187 return 0;
@@ -348,13 +334,17 @@ static int pic32_rtc_probe(struct platform_device *pdev)
348 334
349 device_init_wakeup(&pdev->dev, 1); 335 device_init_wakeup(&pdev->dev, 1);
350 336
351 pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 337 pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
352 &pic32_rtcops, 338 if (IS_ERR(pdata->rtc))
353 THIS_MODULE); 339 return PTR_ERR(pdata->rtc);
354 if (IS_ERR(pdata->rtc)) { 340
355 ret = PTR_ERR(pdata->rtc); 341 pdata->rtc->ops = &pic32_rtcops;
342 pdata->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
343 pdata->rtc->range_max = RTC_TIMESTAMP_END_2099;
344
345 ret = rtc_register_device(pdata->rtc);
346 if (ret)
356 goto err_nortc; 347 goto err_nortc;
357 }
358 348
359 pdata->rtc->max_user_freq = 128; 349 pdata->rtc->max_user_freq = 128;
360 350
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 1074e3dbfc1d..cda020700744 100644
--- a/drivers/rtc/rtc-pm8xxx.c
+++ b/drivers/rtc/rtc-pm8xxx.c
@@ -213,7 +213,8 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
213 } 213 }
214 } 214 }
215 215
216 secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24); 216 secs = value[0] | (value[1] << 8) | (value[2] << 16) |
217 ((unsigned long)value[3] << 24);
217 218
218 rtc_time_to_tm(secs, tm); 219 rtc_time_to_tm(secs, tm);
219 220
@@ -284,7 +285,8 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
284 return rc; 285 return rc;
285 } 286 }
286 287
287 secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24); 288 secs = value[0] | (value[1] << 8) | (value[2] << 16) |
289 ((unsigned long)value[3] << 24);
288 290
289 rtc_time_to_tm(secs, &alarm->time); 291 rtc_time_to_tm(secs, &alarm->time);
290 292
diff --git a/drivers/rtc/rtc-rs5c372.c b/drivers/rtc/rtc-rs5c372.c
index c5038329058c..66a473a3c3fe 100644
--- a/drivers/rtc/rtc-rs5c372.c
+++ b/drivers/rtc/rtc-rs5c372.c
@@ -52,8 +52,10 @@
52# define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ 52# define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
53#define RS5C_REG_CTRL2 15 53#define RS5C_REG_CTRL2 15
54# define RS5C372_CTRL2_24 (1 << 5) 54# define RS5C372_CTRL2_24 (1 << 5)
55# define R2025_CTRL2_XST (1 << 5) 55# define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2x2x */
56# define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ 56# define R2x2x_CTRL2_VDET (1 << 6) /* only if R2x2x */
57# define R2x2x_CTRL2_XSTP (1 << 5) /* only if R2x2x */
58# define R2x2x_CTRL2_PON (1 << 4) /* only if R2x2x */
57# define RS5C_CTRL2_CTFG (1 << 2) 59# define RS5C_CTRL2_CTFG (1 << 2)
58# define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ 60# define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
59# define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ 61# define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
@@ -212,10 +214,27 @@ static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
212 struct i2c_client *client = to_i2c_client(dev); 214 struct i2c_client *client = to_i2c_client(dev);
213 struct rs5c372 *rs5c = i2c_get_clientdata(client); 215 struct rs5c372 *rs5c = i2c_get_clientdata(client);
214 int status = rs5c_get_regs(rs5c); 216 int status = rs5c_get_regs(rs5c);
217 unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2];
215 218
216 if (status < 0) 219 if (status < 0)
217 return status; 220 return status;
218 221
222 switch (rs5c->type) {
223 case rtc_r2025sd:
224 case rtc_r2221tl:
225 if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
226 (rs5c->type == rtc_r2221tl && (ctrl2 & R2x2x_CTRL2_XSTP))) {
227 dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
228 return -EINVAL;
229 }
230 break;
231 default:
232 if (ctrl2 & RS5C_CTRL2_XSTP) {
233 dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
234 return -EINVAL;
235 }
236 }
237
219 tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); 238 tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
220 tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); 239 tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
221 tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); 240 tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
@@ -243,6 +262,7 @@ static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
243 struct i2c_client *client = to_i2c_client(dev); 262 struct i2c_client *client = to_i2c_client(dev);
244 struct rs5c372 *rs5c = i2c_get_clientdata(client); 263 struct rs5c372 *rs5c = i2c_get_clientdata(client);
245 unsigned char buf[7]; 264 unsigned char buf[7];
265 unsigned char ctrl2;
246 int addr; 266 int addr;
247 267
248 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " 268 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
@@ -261,7 +281,32 @@ static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
261 buf[6] = bin2bcd(tm->tm_year - 100); 281 buf[6] = bin2bcd(tm->tm_year - 100);
262 282
263 if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { 283 if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
264 dev_err(&client->dev, "%s: write error\n", __func__); 284 dev_dbg(&client->dev, "%s: write error in line %i\n",
285 __func__, __LINE__);
286 return -EIO;
287 }
288
289 addr = RS5C_ADDR(RS5C_REG_CTRL2);
290 ctrl2 = i2c_smbus_read_byte_data(client, addr);
291
292 /* clear rtc warning bits */
293 switch (rs5c->type) {
294 case rtc_r2025sd:
295 case rtc_r2221tl:
296 ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON);
297 if (rs5c->type == rtc_r2025sd)
298 ctrl2 |= R2x2x_CTRL2_XSTP;
299 else
300 ctrl2 &= ~R2x2x_CTRL2_XSTP;
301 break;
302 default:
303 ctrl2 &= ~RS5C_CTRL2_XSTP;
304 break;
305 }
306
307 if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {
308 dev_dbg(&client->dev, "%s: write error in line %i\n",
309 __func__, __LINE__);
265 return -EIO; 310 return -EIO;
266 } 311 }
267 312
@@ -519,20 +564,25 @@ static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
519 unsigned char buf[2]; 564 unsigned char buf[2];
520 int addr, i, ret = 0; 565 int addr, i, ret = 0;
521 566
522 if (rs5c372->type == rtc_r2025sd) {
523 if (rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)
524 return ret;
525 rs5c372->regs[RS5C_REG_CTRL2] |= R2025_CTRL2_XST;
526 } else {
527 if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
528 return ret;
529 rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
530 }
531
532 addr = RS5C_ADDR(RS5C_REG_CTRL1); 567 addr = RS5C_ADDR(RS5C_REG_CTRL1);
533 buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; 568 buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
534 buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; 569 buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
535 570
571 switch (rs5c372->type) {
572 case rtc_r2025sd:
573 if (buf[1] & R2x2x_CTRL2_XSTP)
574 return ret;
575 break;
576 case rtc_r2221tl:
577 if (!(buf[1] & R2x2x_CTRL2_XSTP))
578 return ret;
579 break;
580 default:
581 if (!(buf[1] & RS5C_CTRL2_XSTP))
582 return ret;
583 break;
584 }
585
536 /* use 24hr mode */ 586 /* use 24hr mode */
537 switch (rs5c372->type) { 587 switch (rs5c372->type) {
538 case rtc_rs5c372a: 588 case rtc_rs5c372a:
diff --git a/drivers/rtc/rtc-rv3028.c b/drivers/rtc/rtc-rv3028.c
new file mode 100644
index 000000000000..06884ebb7a61
--- /dev/null
+++ b/drivers/rtc/rtc-rv3028.c
@@ -0,0 +1,732 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * RTC driver for the Micro Crystal RV3028
4 *
5 * Copyright (C) 2019 Micro Crystal SA
6 *
7 * Alexandre Belloni <alexandre.belloni@bootlin.com>
8 *
9 */
10
11#include <linux/bcd.h>
12#include <linux/bitops.h>
13#include <linux/i2c.h>
14#include <linux/interrupt.h>
15#include <linux/kernel.h>
16#include <linux/log2.h>
17#include <linux/module.h>
18#include <linux/of_device.h>
19#include <linux/regmap.h>
20#include <linux/rtc.h>
21
22#define RV3028_SEC 0x00
23#define RV3028_MIN 0x01
24#define RV3028_HOUR 0x02
25#define RV3028_WDAY 0x03
26#define RV3028_DAY 0x04
27#define RV3028_MONTH 0x05
28#define RV3028_YEAR 0x06
29#define RV3028_ALARM_MIN 0x07
30#define RV3028_ALARM_HOUR 0x08
31#define RV3028_ALARM_DAY 0x09
32#define RV3028_STATUS 0x0E
33#define RV3028_CTRL1 0x0F
34#define RV3028_CTRL2 0x10
35#define RV3028_EVT_CTRL 0x13
36#define RV3028_TS_COUNT 0x14
37#define RV3028_TS_SEC 0x15
38#define RV3028_RAM1 0x1F
39#define RV3028_EEPROM_ADDR 0x25
40#define RV3028_EEPROM_DATA 0x26
41#define RV3028_EEPROM_CMD 0x27
42#define RV3028_CLKOUT 0x35
43#define RV3028_OFFSET 0x36
44#define RV3028_BACKUP 0x37
45
46#define RV3028_STATUS_PORF BIT(0)
47#define RV3028_STATUS_EVF BIT(1)
48#define RV3028_STATUS_AF BIT(2)
49#define RV3028_STATUS_TF BIT(3)
50#define RV3028_STATUS_UF BIT(4)
51#define RV3028_STATUS_BSF BIT(5)
52#define RV3028_STATUS_CLKF BIT(6)
53#define RV3028_STATUS_EEBUSY BIT(7)
54
55#define RV3028_CTRL1_EERD BIT(3)
56#define RV3028_CTRL1_WADA BIT(5)
57
58#define RV3028_CTRL2_RESET BIT(0)
59#define RV3028_CTRL2_12_24 BIT(1)
60#define RV3028_CTRL2_EIE BIT(2)
61#define RV3028_CTRL2_AIE BIT(3)
62#define RV3028_CTRL2_TIE BIT(4)
63#define RV3028_CTRL2_UIE BIT(5)
64#define RV3028_CTRL2_TSE BIT(7)
65
66#define RV3028_EVT_CTRL_TSR BIT(2)
67
68#define RV3028_EEPROM_CMD_WRITE 0x21
69#define RV3028_EEPROM_CMD_READ 0x22
70
71#define RV3028_EEBUSY_POLL 10000
72#define RV3028_EEBUSY_TIMEOUT 100000
73
74#define RV3028_BACKUP_TCE BIT(5)
75#define RV3028_BACKUP_TCR_MASK GENMASK(1,0)
76
77#define OFFSET_STEP_PPT 953674
78
79enum rv3028_type {
80 rv_3028,
81};
82
83struct rv3028_data {
84 struct regmap *regmap;
85 struct rtc_device *rtc;
86 enum rv3028_type type;
87};
88
89static u16 rv3028_trickle_resistors[] = {1000, 3000, 6000, 11000};
90
91static ssize_t timestamp0_store(struct device *dev,
92 struct device_attribute *attr,
93 const char *buf, size_t count)
94{
95 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
96
97 regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR,
98 RV3028_EVT_CTRL_TSR);
99
100 return count;
101};
102
103static ssize_t timestamp0_show(struct device *dev,
104 struct device_attribute *attr, char *buf)
105{
106 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
107 struct rtc_time tm;
108 int ret, count;
109 u8 date[6];
110
111 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
112 if (ret)
113 return ret;
114
115 if (!count)
116 return 0;
117
118 ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date,
119 sizeof(date));
120 if (ret)
121 return ret;
122
123 tm.tm_sec = bcd2bin(date[0]);
124 tm.tm_min = bcd2bin(date[1]);
125 tm.tm_hour = bcd2bin(date[2]);
126 tm.tm_mday = bcd2bin(date[3]);
127 tm.tm_mon = bcd2bin(date[4]) - 1;
128 tm.tm_year = bcd2bin(date[5]) + 100;
129
130 ret = rtc_valid_tm(&tm);
131 if (ret)
132 return ret;
133
134 return sprintf(buf, "%llu\n",
135 (unsigned long long)rtc_tm_to_time64(&tm));
136};
137
138static DEVICE_ATTR_RW(timestamp0);
139
140static ssize_t timestamp0_count_show(struct device *dev,
141 struct device_attribute *attr, char *buf)
142{
143 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
144 int ret, count;
145
146 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
147 if (ret)
148 return ret;
149
150 return sprintf(buf, "%u\n", count);
151};
152
153static DEVICE_ATTR_RO(timestamp0_count);
154
155static struct attribute *rv3028_attrs[] = {
156 &dev_attr_timestamp0.attr,
157 &dev_attr_timestamp0_count.attr,
158 NULL
159};
160
161static const struct attribute_group rv3028_attr_group = {
162 .attrs = rv3028_attrs,
163};
164
165static irqreturn_t rv3028_handle_irq(int irq, void *dev_id)
166{
167 struct rv3028_data *rv3028 = dev_id;
168 unsigned long events = 0;
169 u32 status = 0, ctrl = 0;
170
171 if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 ||
172 status == 0) {
173 return IRQ_NONE;
174 }
175
176 if (status & RV3028_STATUS_PORF)
177 dev_warn(&rv3028->rtc->dev, "Voltage low, data loss detected.\n");
178
179 if (status & RV3028_STATUS_TF) {
180 status |= RV3028_STATUS_TF;
181 ctrl |= RV3028_CTRL2_TIE;
182 events |= RTC_PF;
183 }
184
185 if (status & RV3028_STATUS_AF) {
186 status |= RV3028_STATUS_AF;
187 ctrl |= RV3028_CTRL2_AIE;
188 events |= RTC_AF;
189 }
190
191 if (status & RV3028_STATUS_UF) {
192 status |= RV3028_STATUS_UF;
193 ctrl |= RV3028_CTRL2_UIE;
194 events |= RTC_UF;
195 }
196
197 if (events) {
198 rtc_update_irq(rv3028->rtc, 1, events);
199 regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0);
200 regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0);
201 }
202
203 if (status & RV3028_STATUS_EVF) {
204 sysfs_notify(&rv3028->rtc->dev.kobj, NULL,
205 dev_attr_timestamp0.attr.name);
206 dev_warn(&rv3028->rtc->dev, "event detected");
207 }
208
209 return IRQ_HANDLED;
210}
211
212static int rv3028_get_time(struct device *dev, struct rtc_time *tm)
213{
214 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
215 u8 date[7];
216 int ret, status;
217
218 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
219 if (ret < 0)
220 return ret;
221
222 if (status & RV3028_STATUS_PORF) {
223 dev_warn(dev, "Voltage low, data is invalid.\n");
224 return -EINVAL;
225 }
226
227 ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date));
228 if (ret)
229 return ret;
230
231 tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f);
232 tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f);
233 tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f);
234 tm->tm_wday = ilog2(date[RV3028_WDAY] & 0x7f);
235 tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f);
236 tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1;
237 tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100;
238
239 return 0;
240}
241
242static int rv3028_set_time(struct device *dev, struct rtc_time *tm)
243{
244 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
245 u8 date[7];
246 int ret;
247
248 date[RV3028_SEC] = bin2bcd(tm->tm_sec);
249 date[RV3028_MIN] = bin2bcd(tm->tm_min);
250 date[RV3028_HOUR] = bin2bcd(tm->tm_hour);
251 date[RV3028_WDAY] = 1 << (tm->tm_wday);
252 date[RV3028_DAY] = bin2bcd(tm->tm_mday);
253 date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1);
254 date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100);
255
256 /*
257 * Writing to the Seconds register has the same effect as setting RESET
258 * bit to 1
259 */
260 ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date,
261 sizeof(date));
262 if (ret)
263 return ret;
264
265 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
266 RV3028_STATUS_PORF, 0);
267
268 return ret;
269}
270
271static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
272{
273 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
274 u8 alarmvals[3];
275 int status, ctrl, ret;
276
277 ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
278 sizeof(alarmvals));
279 if (ret)
280 return ret;
281
282 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
283 if (ret < 0)
284 return ret;
285
286 ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl);
287 if (ret < 0)
288 return ret;
289
290 alrm->time.tm_sec = 0;
291 alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
292 alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
293 alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
294
295 alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE);
296 alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled;
297
298 return 0;
299}
300
301static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
302{
303 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
304 u8 alarmvals[3];
305 u8 ctrl = 0;
306 int ret;
307
308 /* The alarm has no seconds, round up to nearest minute */
309 if (alrm->time.tm_sec) {
310 time64_t alarm_time = rtc_tm_to_time64(&alrm->time);
311
312 alarm_time += 60 - alrm->time.tm_sec;
313 rtc_time64_to_tm(alarm_time, &alrm->time);
314 }
315
316 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
317 RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0);
318 if (ret)
319 return ret;
320
321 alarmvals[0] = bin2bcd(alrm->time.tm_min);
322 alarmvals[1] = bin2bcd(alrm->time.tm_hour);
323 alarmvals[2] = bin2bcd(alrm->time.tm_mday);
324
325 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
326 RV3028_STATUS_AF, 0);
327 if (ret)
328 return ret;
329
330 ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
331 sizeof(alarmvals));
332 if (ret)
333 return ret;
334
335 if (alrm->enabled) {
336 if (rv3028->rtc->uie_rtctimer.enabled)
337 ctrl |= RV3028_CTRL2_UIE;
338 if (rv3028->rtc->aie_timer.enabled)
339 ctrl |= RV3028_CTRL2_AIE;
340 }
341
342 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
343 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
344
345 return ret;
346}
347
348static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled)
349{
350 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
351 int ctrl = 0, ret;
352
353 if (enabled) {
354 if (rv3028->rtc->uie_rtctimer.enabled)
355 ctrl |= RV3028_CTRL2_UIE;
356 if (rv3028->rtc->aie_timer.enabled)
357 ctrl |= RV3028_CTRL2_AIE;
358 }
359
360 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
361 RV3028_STATUS_AF | RV3028_STATUS_UF, 0);
362 if (ret)
363 return ret;
364
365 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
366 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
367 if (ret)
368 return ret;
369
370 return 0;
371}
372
373static int rv3028_read_offset(struct device *dev, long *offset)
374{
375 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
376 int ret, value, steps;
377
378 ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value);
379 if (ret < 0)
380 return ret;
381
382 steps = sign_extend32(value << 1, 8);
383
384 ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
385 if (ret < 0)
386 return ret;
387
388 steps += value >> 7;
389
390 *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
391
392 return 0;
393}
394
395static int rv3028_set_offset(struct device *dev, long offset)
396{
397 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
398 int ret;
399
400 offset = clamp(offset, -244141L, 243187L) * 1000;
401 offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
402
403 ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1);
404 if (ret < 0)
405 return ret;
406
407 return regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7),
408 offset << 7);
409}
410
411static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
412{
413 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
414 int status, ret = 0;
415
416 switch (cmd) {
417 case RTC_VL_READ:
418 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
419 if (ret < 0)
420 return ret;
421
422 if (status & RV3028_STATUS_PORF)
423 dev_warn(&rv3028->rtc->dev, "Voltage low, data loss detected.\n");
424
425 status &= RV3028_STATUS_PORF;
426
427 if (copy_to_user((void __user *)arg, &status, sizeof(int)))
428 return -EFAULT;
429
430 return 0;
431
432 case RTC_VL_CLR:
433 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
434 RV3028_STATUS_PORF, 0);
435
436 return ret;
437
438 default:
439 return -ENOIOCTLCMD;
440 }
441}
442
443static int rv3028_nvram_write(void *priv, unsigned int offset, void *val,
444 size_t bytes)
445{
446 return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes);
447}
448
449static int rv3028_nvram_read(void *priv, unsigned int offset, void *val,
450 size_t bytes)
451{
452 return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes);
453}
454
455static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val,
456 size_t bytes)
457{
458 u32 status, ctrl1;
459 int i, ret, err;
460 u8 *buf = val;
461
462 ret = regmap_read(priv, RV3028_CTRL1, &ctrl1);
463 if (ret)
464 return ret;
465
466 if (!(ctrl1 & RV3028_CTRL1_EERD)) {
467 ret = regmap_update_bits(priv, RV3028_CTRL1,
468 RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
469 if (ret)
470 return ret;
471
472 ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status,
473 !(status & RV3028_STATUS_EEBUSY),
474 RV3028_EEBUSY_POLL,
475 RV3028_EEBUSY_TIMEOUT);
476 if (ret)
477 goto restore_eerd;
478 }
479
480 for (i = 0; i < bytes; i++) {
481 ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i);
482 if (ret)
483 goto restore_eerd;
484
485 ret = regmap_write(priv, RV3028_EEPROM_DATA, buf[i]);
486 if (ret)
487 goto restore_eerd;
488
489 ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0);
490 if (ret)
491 goto restore_eerd;
492
493 ret = regmap_write(priv, RV3028_EEPROM_CMD,
494 RV3028_EEPROM_CMD_WRITE);
495 if (ret)
496 goto restore_eerd;
497
498 usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
499
500 ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status,
501 !(status & RV3028_STATUS_EEBUSY),
502 RV3028_EEBUSY_POLL,
503 RV3028_EEBUSY_TIMEOUT);
504 if (ret)
505 goto restore_eerd;
506 }
507
508restore_eerd:
509 if (!(ctrl1 & RV3028_CTRL1_EERD))
510 {
511 err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD,
512 0);
513 if (err && !ret)
514 ret = err;
515 }
516
517 return ret;
518}
519
520static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val,
521 size_t bytes)
522{
523 u32 status, ctrl1, data;
524 int i, ret, err;
525 u8 *buf = val;
526
527 ret = regmap_read(priv, RV3028_CTRL1, &ctrl1);
528 if (ret)
529 return ret;
530
531 if (!(ctrl1 & RV3028_CTRL1_EERD)) {
532 ret = regmap_update_bits(priv, RV3028_CTRL1,
533 RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
534 if (ret)
535 return ret;
536
537 ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status,
538 !(status & RV3028_STATUS_EEBUSY),
539 RV3028_EEBUSY_POLL,
540 RV3028_EEBUSY_TIMEOUT);
541 if (ret)
542 goto restore_eerd;
543 }
544
545 for (i = 0; i < bytes; i++) {
546 ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i);
547 if (ret)
548 goto restore_eerd;
549
550 ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0);
551 if (ret)
552 goto restore_eerd;
553
554 ret = regmap_write(priv, RV3028_EEPROM_CMD,
555 RV3028_EEPROM_CMD_READ);
556 if (ret)
557 goto restore_eerd;
558
559 ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status,
560 !(status & RV3028_STATUS_EEBUSY),
561 RV3028_EEBUSY_POLL,
562 RV3028_EEBUSY_TIMEOUT);
563 if (ret)
564 goto restore_eerd;
565
566 ret = regmap_read(priv, RV3028_EEPROM_DATA, &data);
567 if (ret)
568 goto restore_eerd;
569 buf[i] = data;
570 }
571
572restore_eerd:
573 if (!(ctrl1 & RV3028_CTRL1_EERD))
574 {
575 err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD,
576 0);
577 if (err && !ret)
578 ret = err;
579 }
580
581 return ret;
582}
583
584static struct rtc_class_ops rv3028_rtc_ops = {
585 .read_time = rv3028_get_time,
586 .set_time = rv3028_set_time,
587 .read_offset = rv3028_read_offset,
588 .set_offset = rv3028_set_offset,
589 .ioctl = rv3028_ioctl,
590};
591
592static const struct regmap_config regmap_config = {
593 .reg_bits = 8,
594 .val_bits = 8,
595 .max_register = 0x37,
596};
597
598static int rv3028_probe(struct i2c_client *client)
599{
600 struct rv3028_data *rv3028;
601 int ret, status;
602 u32 ohms;
603 struct nvmem_config nvmem_cfg = {
604 .name = "rv3028_nvram",
605 .word_size = 1,
606 .stride = 1,
607 .size = 2,
608 .type = NVMEM_TYPE_BATTERY_BACKED,
609 .reg_read = rv3028_nvram_read,
610 .reg_write = rv3028_nvram_write,
611 };
612 struct nvmem_config eeprom_cfg = {
613 .name = "rv3028_eeprom",
614 .word_size = 1,
615 .stride = 1,
616 .size = 43,
617 .type = NVMEM_TYPE_EEPROM,
618 .reg_read = rv3028_eeprom_read,
619 .reg_write = rv3028_eeprom_write,
620 };
621
622 rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data),
623 GFP_KERNEL);
624 if (!rv3028)
625 return -ENOMEM;
626
627 rv3028->regmap = devm_regmap_init_i2c(client, &regmap_config);
628
629 i2c_set_clientdata(client, rv3028);
630
631 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
632 if (ret < 0)
633 return ret;
634
635 if (status & RV3028_STATUS_PORF)
636 dev_warn(&client->dev, "Voltage low, data loss detected.\n");
637
638 if (status & RV3028_STATUS_AF)
639 dev_warn(&client->dev, "An alarm may have been missed.\n");
640
641 rv3028->rtc = devm_rtc_allocate_device(&client->dev);
642 if (IS_ERR(rv3028->rtc)) {
643 return PTR_ERR(rv3028->rtc);
644 }
645
646 if (client->irq > 0) {
647 ret = devm_request_threaded_irq(&client->dev, client->irq,
648 NULL, rv3028_handle_irq,
649 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
650 "rv3028", rv3028);
651 if (ret) {
652 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
653 client->irq = 0;
654 } else {
655 rv3028_rtc_ops.read_alarm = rv3028_get_alarm;
656 rv3028_rtc_ops.set_alarm = rv3028_set_alarm;
657 rv3028_rtc_ops.alarm_irq_enable = rv3028_alarm_irq_enable;
658 }
659 }
660
661 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
662 RV3028_CTRL1_WADA, RV3028_CTRL1_WADA);
663 if (ret)
664 return ret;
665
666 /* setup timestamping */
667 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
668 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE,
669 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE);
670 if (ret)
671 return ret;
672
673 /* setup trickle charger */
674 if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms",
675 &ohms)) {
676 int i;
677
678 for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++)
679 if (ohms == rv3028_trickle_resistors[i])
680 break;
681
682 if (i < ARRAY_SIZE(rv3028_trickle_resistors)) {
683 ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP,
684 RV3028_BACKUP_TCE |
685 RV3028_BACKUP_TCR_MASK,
686 RV3028_BACKUP_TCE | i);
687 if (ret)
688 return ret;
689 } else {
690 dev_warn(&client->dev, "invalid trickle resistor value\n");
691 }
692 }
693
694 ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group);
695 if (ret)
696 return ret;
697
698 rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
699 rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099;
700 rv3028->rtc->ops = &rv3028_rtc_ops;
701 ret = rtc_register_device(rv3028->rtc);
702 if (ret)
703 return ret;
704
705 nvmem_cfg.priv = rv3028->regmap;
706 rtc_nvmem_register(rv3028->rtc, &nvmem_cfg);
707 eeprom_cfg.priv = rv3028->regmap;
708 rtc_nvmem_register(rv3028->rtc, &eeprom_cfg);
709
710 rv3028->rtc->max_user_freq = 1;
711
712 return 0;
713}
714
715static const struct of_device_id rv3028_of_match[] = {
716 { .compatible = "microcrystal,rv3028", },
717 { }
718};
719MODULE_DEVICE_TABLE(of, rv3028_of_match);
720
721static struct i2c_driver rv3028_driver = {
722 .driver = {
723 .name = "rtc-rv3028",
724 .of_match_table = of_match_ptr(rv3028_of_match),
725 },
726 .probe_new = rv3028_probe,
727};
728module_i2c_driver(rv3028_driver);
729
730MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
731MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver");
732MODULE_LICENSE("GPL v2");
diff --git a/drivers/rtc/rtc-rv8803.c b/drivers/rtc/rtc-rv8803.c
index 450a0b831a2d..0b102c3cf5a4 100644
--- a/drivers/rtc/rtc-rv8803.c
+++ b/drivers/rtc/rtc-rv8803.c
@@ -1,13 +1,9 @@
1// SPDX-License-Identifier: GPL-2.0
1/* 2/*
2 * RTC driver for the Micro Crystal RV8803 3 * RTC driver for the Micro Crystal RV8803
3 * 4 *
4 * Copyright (C) 2015 Micro Crystal SA 5 * Copyright (C) 2015 Micro Crystal SA
5 * 6 * Alexandre Belloni <alexandre.belloni@bootlin.com>
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 * 7 *
12 */ 8 */
13 9
@@ -236,9 +232,6 @@ static int rv8803_set_time(struct device *dev, struct rtc_time *tm)
236 u8 date[7]; 232 u8 date[7];
237 int ctrl, flags, ret; 233 int ctrl, flags, ret;
238 234
239 if ((tm->tm_year < 100) || (tm->tm_year > 199))
240 return -EINVAL;
241
242 ctrl = rv8803_read_reg(rv8803->client, RV8803_CTRL); 235 ctrl = rv8803_read_reg(rv8803->client, RV8803_CTRL);
243 if (ctrl < 0) 236 if (ctrl < 0)
244 return ctrl; 237 return ctrl;
@@ -602,6 +595,8 @@ static int rv8803_probe(struct i2c_client *client,
602 595
603 rv8803->rtc->ops = &rv8803_rtc_ops; 596 rv8803->rtc->ops = &rv8803_rtc_ops;
604 rv8803->rtc->nvram_old_abi = true; 597 rv8803->rtc->nvram_old_abi = true;
598 rv8803->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
599 rv8803->rtc->range_max = RTC_TIMESTAMP_END_2099;
605 err = rtc_register_device(rv8803->rtc); 600 err = rtc_register_device(rv8803->rtc);
606 if (err) 601 if (err)
607 return err; 602 return err;
@@ -648,6 +643,6 @@ static struct i2c_driver rv8803_driver = {
648}; 643};
649module_i2c_driver(rv8803_driver); 644module_i2c_driver(rv8803_driver);
650 645
651MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@free-electrons.com>"); 646MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
652MODULE_DESCRIPTION("Micro Crystal RV8803 RTC driver"); 647MODULE_DESCRIPTION("Micro Crystal RV8803 RTC driver");
653MODULE_LICENSE("GPL v2"); 648MODULE_LICENSE("GPL v2");
diff --git a/drivers/rtc/rtc-rx8581.c b/drivers/rtc/rtc-rx8581.c
index eac882169744..776e3a2b89e8 100644
--- a/drivers/rtc/rtc-rx8581.c
+++ b/drivers/rtc/rtc-rx8581.c
@@ -15,6 +15,8 @@
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/bcd.h> 17#include <linux/bcd.h>
18#include <linux/of.h>
19#include <linux/of_device.h>
18#include <linux/regmap.h> 20#include <linux/regmap.h>
19#include <linux/rtc.h> 21#include <linux/rtc.h>
20#include <linux/log2.h> 22#include <linux/log2.h>
@@ -51,11 +53,19 @@
51#define RX8581_CTRL_STOP 0x02 /* STOP bit */ 53#define RX8581_CTRL_STOP 0x02 /* STOP bit */
52#define RX8581_CTRL_RESET 0x01 /* RESET bit */ 54#define RX8581_CTRL_RESET 0x01 /* RESET bit */
53 55
56#define RX8571_USER_RAM 0x10
57#define RX8571_NVRAM_SIZE 0x10
58
54struct rx8581 { 59struct rx8581 {
55 struct regmap *regmap; 60 struct regmap *regmap;
56 struct rtc_device *rtc; 61 struct rtc_device *rtc;
57}; 62};
58 63
64struct rx85x1_config {
65 struct regmap_config regmap;
66 unsigned int num_nvram;
67};
68
59/* 69/*
60 * In the routines that deal directly with the rx8581 hardware, we use 70 * In the routines that deal directly with the rx8581 hardware, we use
61 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch. 71 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
@@ -181,25 +191,103 @@ static const struct rtc_class_ops rx8581_rtc_ops = {
181 .set_time = rx8581_rtc_set_time, 191 .set_time = rx8581_rtc_set_time,
182}; 192};
183 193
184static int rx8581_probe(struct i2c_client *client, 194static int rx8571_nvram_read(void *priv, unsigned int offset, void *val,
185 const struct i2c_device_id *id) 195 size_t bytes)
186{ 196{
187 struct rx8581 *rx8581; 197 struct rx8581 *rx8581 = priv;
188 static const struct regmap_config config = { 198
199 return regmap_bulk_read(rx8581->regmap, RX8571_USER_RAM + offset,
200 val, bytes);
201}
202
203static int rx8571_nvram_write(void *priv, unsigned int offset, void *val,
204 size_t bytes)
205{
206 struct rx8581 *rx8581 = priv;
207
208 return regmap_bulk_write(rx8581->regmap, RX8571_USER_RAM + offset,
209 val, bytes);
210}
211
212static int rx85x1_nvram_read(void *priv, unsigned int offset, void *val,
213 size_t bytes)
214{
215 struct rx8581 *rx8581 = priv;
216 unsigned int tmp_val;
217 int ret;
218
219 ret = regmap_read(rx8581->regmap, RX8581_REG_RAM, &tmp_val);
220 (*(unsigned char *)val) = (unsigned char) tmp_val;
221
222 return ret;
223}
224
225static int rx85x1_nvram_write(void *priv, unsigned int offset, void *val,
226 size_t bytes)
227{
228 struct rx8581 *rx8581 = priv;
229 unsigned char tmp_val;
230
231 tmp_val = *((unsigned char *)val);
232 return regmap_write(rx8581->regmap, RX8581_REG_RAM,
233 (unsigned int)tmp_val);
234}
235
236static const struct rx85x1_config rx8581_config = {
237 .regmap = {
189 .reg_bits = 8, 238 .reg_bits = 8,
190 .val_bits = 8, 239 .val_bits = 8,
191 .max_register = 0xf, 240 .max_register = 0xf,
241 },
242 .num_nvram = 1
243};
244
245static const struct rx85x1_config rx8571_config = {
246 .regmap = {
247 .reg_bits = 8,
248 .val_bits = 8,
249 .max_register = 0x1f,
250 },
251 .num_nvram = 2
252};
253
254static int rx8581_probe(struct i2c_client *client,
255 const struct i2c_device_id *id)
256{
257 struct rx8581 *rx8581;
258 const struct rx85x1_config *config = &rx8581_config;
259 const void *data = of_device_get_match_data(&client->dev);
260 static struct nvmem_config nvmem_cfg[] = {
261 {
262 .name = "rx85x1-",
263 .word_size = 1,
264 .stride = 1,
265 .size = 1,
266 .reg_read = rx85x1_nvram_read,
267 .reg_write = rx85x1_nvram_write,
268 }, {
269 .name = "rx8571-",
270 .word_size = 1,
271 .stride = 1,
272 .size = RX8571_NVRAM_SIZE,
273 .reg_read = rx8571_nvram_read,
274 .reg_write = rx8571_nvram_write,
275 },
192 }; 276 };
277 int ret, i;
193 278
194 dev_dbg(&client->dev, "%s\n", __func__); 279 dev_dbg(&client->dev, "%s\n", __func__);
195 280
281 if (data)
282 config = data;
283
196 rx8581 = devm_kzalloc(&client->dev, sizeof(struct rx8581), GFP_KERNEL); 284 rx8581 = devm_kzalloc(&client->dev, sizeof(struct rx8581), GFP_KERNEL);
197 if (!rx8581) 285 if (!rx8581)
198 return -ENOMEM; 286 return -ENOMEM;
199 287
200 i2c_set_clientdata(client, rx8581); 288 i2c_set_clientdata(client, rx8581);
201 289
202 rx8581->regmap = devm_regmap_init_i2c(client, &config); 290 rx8581->regmap = devm_regmap_init_i2c(client, &config->regmap);
203 if (IS_ERR(rx8581->regmap)) 291 if (IS_ERR(rx8581->regmap))
204 return PTR_ERR(rx8581->regmap); 292 return PTR_ERR(rx8581->regmap);
205 293
@@ -213,7 +301,14 @@ static int rx8581_probe(struct i2c_client *client,
213 rx8581->rtc->start_secs = 0; 301 rx8581->rtc->start_secs = 0;
214 rx8581->rtc->set_start_time = true; 302 rx8581->rtc->set_start_time = true;
215 303
216 return rtc_register_device(rx8581->rtc); 304 ret = rtc_register_device(rx8581->rtc);
305
306 for (i = 0; i < config->num_nvram; i++) {
307 nvmem_cfg[i].priv = rx8581;
308 rtc_nvmem_register(rx8581->rtc, &nvmem_cfg[i]);
309 }
310
311 return ret;
217} 312}
218 313
219static const struct i2c_device_id rx8581_id[] = { 314static const struct i2c_device_id rx8581_id[] = {
@@ -223,8 +318,9 @@ static const struct i2c_device_id rx8581_id[] = {
223MODULE_DEVICE_TABLE(i2c, rx8581_id); 318MODULE_DEVICE_TABLE(i2c, rx8581_id);
224 319
225static const struct of_device_id rx8581_of_match[] = { 320static const struct of_device_id rx8581_of_match[] = {
226 { .compatible = "epson,rx8581" }, 321 { .compatible = "epson,rx8571", .data = &rx8571_config },
227 { } 322 { .compatible = "epson,rx8581", .data = &rx8581_config },
323 { /* sentinel */ }
228}; 324};
229MODULE_DEVICE_TABLE(of, rx8581_of_match); 325MODULE_DEVICE_TABLE(of, rx8581_of_match);
230 326
@@ -240,5 +336,5 @@ static struct i2c_driver rx8581_driver = {
240module_i2c_driver(rx8581_driver); 336module_i2c_driver(rx8581_driver);
241 337
242MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com>"); 338MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com>");
243MODULE_DESCRIPTION("Epson RX-8581 RTC driver"); 339MODULE_DESCRIPTION("Epson RX-8571/RX-8581 RTC driver");
244MODULE_LICENSE("GPL"); 340MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 04c68178c42d..e81a2b22a5c3 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -26,6 +26,7 @@
26#include <linux/log2.h> 26#include <linux/log2.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_device.h>
29#include <linux/uaccess.h> 30#include <linux/uaccess.h>
30#include <linux/io.h> 31#include <linux/io.h>
31 32
@@ -39,7 +40,7 @@ struct s3c_rtc {
39 void __iomem *base; 40 void __iomem *base;
40 struct clk *rtc_clk; 41 struct clk *rtc_clk;
41 struct clk *rtc_src_clk; 42 struct clk *rtc_src_clk;
42 bool clk_disabled; 43 bool alarm_enabled;
43 44
44 const struct s3c_rtc_data *data; 45 const struct s3c_rtc_data *data;
45 46
@@ -47,7 +48,7 @@ struct s3c_rtc {
47 int irq_tick; 48 int irq_tick;
48 49
49 spinlock_t pie_lock; 50 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock; 51 spinlock_t alarm_lock;
51 52
52 int ticnt_save; 53 int ticnt_save;
53 int ticnt_en_save; 54 int ticnt_en_save;
@@ -70,44 +71,27 @@ struct s3c_rtc_data {
70 71
71static int s3c_rtc_enable_clk(struct s3c_rtc *info) 72static int s3c_rtc_enable_clk(struct s3c_rtc *info)
72{ 73{
73 unsigned long irq_flags; 74 int ret;
74 int ret = 0;
75 75
76 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags); 76 ret = clk_enable(info->rtc_clk);
77 if (ret)
78 return ret;
77 79
78 if (info->clk_disabled) { 80 if (info->data->needs_src_clk) {
79 ret = clk_enable(info->rtc_clk); 81 ret = clk_enable(info->rtc_src_clk);
80 if (ret) 82 if (ret) {
81 goto out; 83 clk_disable(info->rtc_clk);
82 84 return ret;
83 if (info->data->needs_src_clk) {
84 ret = clk_enable(info->rtc_src_clk);
85 if (ret) {
86 clk_disable(info->rtc_clk);
87 goto out;
88 }
89 } 85 }
90 info->clk_disabled = false;
91 } 86 }
92 87 return 0;
93out:
94 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
95
96 return ret;
97} 88}
98 89
99static void s3c_rtc_disable_clk(struct s3c_rtc *info) 90static void s3c_rtc_disable_clk(struct s3c_rtc *info)
100{ 91{
101 unsigned long irq_flags; 92 if (info->data->needs_src_clk)
102 93 clk_disable(info->rtc_src_clk);
103 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags); 94 clk_disable(info->rtc_clk);
104 if (!info->clk_disabled) {
105 if (info->data->needs_src_clk)
106 clk_disable(info->rtc_src_clk);
107 clk_disable(info->rtc_clk);
108 info->clk_disabled = true;
109 }
110 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
111} 95}
112 96
113/* IRQ Handlers */ 97/* IRQ Handlers */
@@ -135,6 +119,7 @@ static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
135static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) 119static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
136{ 120{
137 struct s3c_rtc *info = dev_get_drvdata(dev); 121 struct s3c_rtc *info = dev_get_drvdata(dev);
122 unsigned long flags;
138 unsigned int tmp; 123 unsigned int tmp;
139 int ret; 124 int ret;
140 125
@@ -151,17 +136,19 @@ static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
151 136
152 writeb(tmp, info->base + S3C2410_RTCALM); 137 writeb(tmp, info->base + S3C2410_RTCALM);
153 138
154 s3c_rtc_disable_clk(info); 139 spin_lock_irqsave(&info->alarm_lock, flags);
155 140
156 if (enabled) { 141 if (info->alarm_enabled && !enabled)
157 ret = s3c_rtc_enable_clk(info);
158 if (ret)
159 return ret;
160 } else {
161 s3c_rtc_disable_clk(info); 142 s3c_rtc_disable_clk(info);
162 } 143 else if (!info->alarm_enabled && enabled)
144 ret = s3c_rtc_enable_clk(info);
163 145
164 return 0; 146 info->alarm_enabled = enabled;
147 spin_unlock_irqrestore(&info->alarm_lock, flags);
148
149 s3c_rtc_disable_clk(info);
150
151 return ret;
165} 152}
166 153
167/* Set RTC frequency */ 154/* Set RTC frequency */
@@ -357,10 +344,10 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
357 344
358 writeb(alrm_en, info->base + S3C2410_RTCALM); 345 writeb(alrm_en, info->base + S3C2410_RTCALM);
359 346
360 s3c_rtc_disable_clk(info);
361
362 s3c_rtc_setaie(dev, alrm->enabled); 347 s3c_rtc_setaie(dev, alrm->enabled);
363 348
349 s3c_rtc_disable_clk(info);
350
364 return 0; 351 return 0;
365} 352}
366 353
@@ -456,16 +443,6 @@ static int s3c_rtc_remove(struct platform_device *pdev)
456 return 0; 443 return 0;
457} 444}
458 445
459static const struct of_device_id s3c_rtc_dt_match[];
460
461static const struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
462{
463 const struct of_device_id *match;
464
465 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
466 return match->data;
467}
468
469static int s3c_rtc_probe(struct platform_device *pdev) 446static int s3c_rtc_probe(struct platform_device *pdev)
470{ 447{
471 struct s3c_rtc *info = NULL; 448 struct s3c_rtc *info = NULL;
@@ -485,13 +462,13 @@ static int s3c_rtc_probe(struct platform_device *pdev)
485 } 462 }
486 463
487 info->dev = &pdev->dev; 464 info->dev = &pdev->dev;
488 info->data = s3c_rtc_get_data(pdev); 465 info->data = of_device_get_match_data(&pdev->dev);
489 if (!info->data) { 466 if (!info->data) {
490 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n"); 467 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
491 return -EINVAL; 468 return -EINVAL;
492 } 469 }
493 spin_lock_init(&info->pie_lock); 470 spin_lock_init(&info->pie_lock);
494 spin_lock_init(&info->alarm_clk_lock); 471 spin_lock_init(&info->alarm_lock);
495 472
496 platform_set_drvdata(pdev, info); 473 platform_set_drvdata(pdev, info);
497 474
@@ -591,6 +568,8 @@ static int s3c_rtc_probe(struct platform_device *pdev)
591 568
592 s3c_rtc_setfreq(info, 1); 569 s3c_rtc_setfreq(info, 1);
593 570
571 s3c_rtc_disable_clk(info);
572
594 return 0; 573 return 0;
595 574
596err_nortc: 575err_nortc:
diff --git a/drivers/rtc/rtc-sd3078.c b/drivers/rtc/rtc-sd3078.c
new file mode 100644
index 000000000000..42cb90db7f94
--- /dev/null
+++ b/drivers/rtc/rtc-sd3078.c
@@ -0,0 +1,231 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Real Time Clock (RTC) Driver for sd3078
4 * Copyright (C) 2018 Zoro Li
5 */
6
7#include <linux/bcd.h>
8#include <linux/i2c.h>
9#include <linux/module.h>
10#include <linux/regmap.h>
11#include <linux/rtc.h>
12#include <linux/slab.h>
13
14#define SD3078_REG_SC 0x00
15#define SD3078_REG_MN 0x01
16#define SD3078_REG_HR 0x02
17#define SD3078_REG_DW 0x03
18#define SD3078_REG_DM 0x04
19#define SD3078_REG_MO 0x05
20#define SD3078_REG_YR 0x06
21
22#define SD3078_REG_CTRL1 0x0f
23#define SD3078_REG_CTRL2 0x10
24#define SD3078_REG_CTRL3 0x11
25
26#define KEY_WRITE1 0x80
27#define KEY_WRITE2 0x04
28#define KEY_WRITE3 0x80
29
30#define NUM_TIME_REGS (SD3078_REG_YR - SD3078_REG_SC + 1)
31
32/*
33 * The sd3078 has write protection
34 * and we can choose whether or not to use it.
35 * Write protection is turned off by default.
36 */
37#define WRITE_PROTECT_EN 0
38
39struct sd3078 {
40 struct rtc_device *rtc;
41 struct regmap *regmap;
42};
43
44/*
45 * In order to prevent arbitrary modification of the time register,
46 * when modification of the register,
47 * the "write" bit needs to be written in a certain order.
48 * 1. set WRITE1 bit
49 * 2. set WRITE2 bit
50 * 3. set WRITE3 bit
51 */
52static void sd3078_enable_reg_write(struct sd3078 *sd3078)
53{
54 regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL2,
55 KEY_WRITE1, KEY_WRITE1);
56 regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
57 KEY_WRITE2, KEY_WRITE2);
58 regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
59 KEY_WRITE3, KEY_WRITE3);
60}
61
62#if WRITE_PROTECT_EN
63/*
64 * In order to prevent arbitrary modification of the time register,
65 * we should disable the write function.
66 * when disable write,
67 * the "write" bit needs to be clear in a certain order.
68 * 1. clear WRITE2 bit
69 * 2. clear WRITE3 bit
70 * 3. clear WRITE1 bit
71 */
72static void sd3078_disable_reg_write(struct sd3078 *sd3078)
73{
74 regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
75 KEY_WRITE2, 0);
76 regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL1,
77 KEY_WRITE3, 0);
78 regmap_update_bits(sd3078->regmap, SD3078_REG_CTRL2,
79 KEY_WRITE1, 0);
80}
81#endif
82
83static int sd3078_rtc_read_time(struct device *dev, struct rtc_time *tm)
84{
85 unsigned char hour;
86 unsigned char rtc_data[NUM_TIME_REGS] = {0};
87 struct i2c_client *client = to_i2c_client(dev);
88 struct sd3078 *sd3078 = i2c_get_clientdata(client);
89 int ret;
90
91 ret = regmap_bulk_read(sd3078->regmap, SD3078_REG_SC, rtc_data,
92 NUM_TIME_REGS);
93 if (ret < 0) {
94 dev_err(dev, "reading from RTC failed with err:%d\n", ret);
95 return ret;
96 }
97
98 tm->tm_sec = bcd2bin(rtc_data[SD3078_REG_SC] & 0x7F);
99 tm->tm_min = bcd2bin(rtc_data[SD3078_REG_MN] & 0x7F);
100
101 /*
102 * The sd3078 supports 12/24 hour mode.
103 * When getting time,
104 * we need to convert the 12 hour mode to the 24 hour mode.
105 */
106 hour = rtc_data[SD3078_REG_HR];
107 if (hour & 0x80) /* 24H MODE */
108 tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x3F);
109 else if (hour & 0x20) /* 12H MODE PM */
110 tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x1F) + 12;
111 else /* 12H MODE AM */
112 tm->tm_hour = bcd2bin(rtc_data[SD3078_REG_HR] & 0x1F);
113
114 tm->tm_mday = bcd2bin(rtc_data[SD3078_REG_DM] & 0x3F);
115 tm->tm_wday = rtc_data[SD3078_REG_DW] & 0x07;
116 tm->tm_mon = bcd2bin(rtc_data[SD3078_REG_MO] & 0x1F) - 1;
117 tm->tm_year = bcd2bin(rtc_data[SD3078_REG_YR]) + 100;
118
119 return 0;
120}
121
122static int sd3078_rtc_set_time(struct device *dev, struct rtc_time *tm)
123{
124 unsigned char rtc_data[NUM_TIME_REGS];
125 struct i2c_client *client = to_i2c_client(dev);
126 struct sd3078 *sd3078 = i2c_get_clientdata(client);
127 int ret;
128
129 rtc_data[SD3078_REG_SC] = bin2bcd(tm->tm_sec);
130 rtc_data[SD3078_REG_MN] = bin2bcd(tm->tm_min);
131 rtc_data[SD3078_REG_HR] = bin2bcd(tm->tm_hour) | 0x80;
132 rtc_data[SD3078_REG_DM] = bin2bcd(tm->tm_mday);
133 rtc_data[SD3078_REG_DW] = tm->tm_wday & 0x07;
134 rtc_data[SD3078_REG_MO] = bin2bcd(tm->tm_mon) + 1;
135 rtc_data[SD3078_REG_YR] = bin2bcd(tm->tm_year - 100);
136
137#if WRITE_PROTECT_EN
138 sd3078_enable_reg_write(sd3078);
139#endif
140
141 ret = regmap_bulk_write(sd3078->regmap, SD3078_REG_SC, rtc_data,
142 NUM_TIME_REGS);
143 if (ret < 0) {
144 dev_err(dev, "writing to RTC failed with err:%d\n", ret);
145 return ret;
146 }
147
148#if WRITE_PROTECT_EN
149 sd3078_disable_reg_write(sd3078);
150#endif
151
152 return 0;
153}
154
155static const struct rtc_class_ops sd3078_rtc_ops = {
156 .read_time = sd3078_rtc_read_time,
157 .set_time = sd3078_rtc_set_time,
158};
159
160static const struct regmap_config regmap_config = {
161 .reg_bits = 8,
162 .val_bits = 8,
163 .max_register = 0x11,
164};
165
166static int sd3078_probe(struct i2c_client *client,
167 const struct i2c_device_id *id)
168{
169 int ret;
170 struct sd3078 *sd3078;
171
172 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
173 return -ENODEV;
174
175 sd3078 = devm_kzalloc(&client->dev, sizeof(*sd3078), GFP_KERNEL);
176 if (!sd3078)
177 return -ENOMEM;
178
179 sd3078->regmap = devm_regmap_init_i2c(client, &regmap_config);
180 if (IS_ERR(sd3078->regmap)) {
181 dev_err(&client->dev, "regmap allocation failed\n");
182 return PTR_ERR(sd3078->regmap);
183 }
184
185 i2c_set_clientdata(client, sd3078);
186
187 sd3078->rtc = devm_rtc_allocate_device(&client->dev);
188 if (IS_ERR(sd3078->rtc))
189 return PTR_ERR(sd3078->rtc);
190
191 sd3078->rtc->ops = &sd3078_rtc_ops;
192 sd3078->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
193 sd3078->rtc->range_max = RTC_TIMESTAMP_END_2099;
194
195 ret = rtc_register_device(sd3078->rtc);
196 if (ret) {
197 dev_err(&client->dev, "failed to register rtc device\n");
198 return ret;
199 }
200
201 sd3078_enable_reg_write(sd3078);
202
203 return 0;
204}
205
206static const struct i2c_device_id sd3078_id[] = {
207 {"sd3078", 0},
208 { }
209};
210MODULE_DEVICE_TABLE(i2c, sd3078_id);
211
212static const struct of_device_id rtc_dt_match[] = {
213 { .compatible = "whwave,sd3078" },
214 {},
215};
216MODULE_DEVICE_TABLE(of, rtc_dt_match);
217
218static struct i2c_driver sd3078_driver = {
219 .driver = {
220 .name = "sd3078",
221 .of_match_table = of_match_ptr(rtc_dt_match),
222 },
223 .probe = sd3078_probe,
224 .id_table = sd3078_id,
225};
226
227module_i2c_driver(sd3078_driver);
228
229MODULE_AUTHOR("Dianlong Li <long17.cool@163.com>");
230MODULE_DESCRIPTION("SD3078 RTC driver");
231MODULE_LICENSE("GPL v2");
diff --git a/drivers/rtc/rtc-snvs.c b/drivers/rtc/rtc-snvs.c
index b2483a749ac4..0b9eff19149b 100644
--- a/drivers/rtc/rtc-snvs.c
+++ b/drivers/rtc/rtc-snvs.c
@@ -239,6 +239,9 @@ static irqreturn_t snvs_rtc_irq_handler(int irq, void *dev_id)
239 u32 lpsr; 239 u32 lpsr;
240 u32 events = 0; 240 u32 events = 0;
241 241
242 if (data->clk)
243 clk_enable(data->clk);
244
242 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); 245 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr);
243 246
244 if (lpsr & SNVS_LPSR_LPTA) { 247 if (lpsr & SNVS_LPSR_LPTA) {
@@ -253,6 +256,9 @@ static irqreturn_t snvs_rtc_irq_handler(int irq, void *dev_id)
253 /* clear interrupt status */ 256 /* clear interrupt status */
254 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr); 257 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr);
255 258
259 if (data->clk)
260 clk_disable(data->clk);
261
256 return events ? IRQ_HANDLED : IRQ_NONE; 262 return events ? IRQ_HANDLED : IRQ_NONE;
257} 263}
258 264
diff --git a/drivers/rtc/rtc-tx4939.c b/drivers/rtc/rtc-tx4939.c
index 61c110b2045f..2d24babc4057 100644
--- a/drivers/rtc/rtc-tx4939.c
+++ b/drivers/rtc/rtc-tx4939.c
@@ -1,11 +1,8 @@
1// SPDX-License-Identifier: GPL-2.0
1/* 2/*
2 * TX4939 internal RTC driver 3 * TX4939 internal RTC driver
3 * Based on RBTX49xx patch from CELF patch archive. 4 * Based on RBTX49xx patch from CELF patch archive.
4 * 5 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * (C) Copyright TOSHIBA CORPORATION 2005-2007 6 * (C) Copyright TOSHIBA CORPORATION 2005-2007
10 */ 7 */
11#include <linux/rtc.h> 8#include <linux/rtc.h>
@@ -65,10 +62,11 @@ static int tx4939_rtc_cmd(struct tx4939_rtc_reg __iomem *rtcreg, int cmd)
65 return 0; 62 return 0;
66} 63}
67 64
68static int tx4939_rtc_set_mmss(struct device *dev, unsigned long secs) 65static int tx4939_rtc_set_time(struct device *dev, struct rtc_time *tm)
69{ 66{
70 struct tx4939rtc_plat_data *pdata = get_tx4939rtc_plat_data(dev); 67 struct tx4939rtc_plat_data *pdata = get_tx4939rtc_plat_data(dev);
71 struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg; 68 struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
69 unsigned long secs = rtc_tm_to_time64(tm);
72 int i, ret; 70 int i, ret;
73 unsigned char buf[6]; 71 unsigned char buf[6];
74 72
@@ -111,7 +109,7 @@ static int tx4939_rtc_read_time(struct device *dev, struct rtc_time *tm)
111 spin_unlock_irq(&pdata->lock); 109 spin_unlock_irq(&pdata->lock);
112 sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) | 110 sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) |
113 (buf[3] << 8) | buf[2]; 111 (buf[3] << 8) | buf[2];
114 rtc_time_to_tm(sec, tm); 112 rtc_time64_to_tm(sec, tm);
115 return 0; 113 return 0;
116} 114}
117 115
@@ -123,14 +121,7 @@ static int tx4939_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
123 unsigned long sec; 121 unsigned long sec;
124 unsigned char buf[6]; 122 unsigned char buf[6];
125 123
126 if (alrm->time.tm_sec < 0 || 124 sec = rtc_tm_to_time64(&alrm->time);
127 alrm->time.tm_min < 0 ||
128 alrm->time.tm_hour < 0 ||
129 alrm->time.tm_mday < 0 ||
130 alrm->time.tm_mon < 0 ||
131 alrm->time.tm_year < 0)
132 return -EINVAL;
133 rtc_tm_to_time(&alrm->time, &sec);
134 buf[0] = 0; 125 buf[0] = 0;
135 buf[1] = 0; 126 buf[1] = 0;
136 buf[2] = sec; 127 buf[2] = sec;
@@ -173,7 +164,7 @@ static int tx4939_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
173 spin_unlock_irq(&pdata->lock); 164 spin_unlock_irq(&pdata->lock);
174 sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) | 165 sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) |
175 (buf[3] << 8) | buf[2]; 166 (buf[3] << 8) | buf[2];
176 rtc_time_to_tm(sec, &alrm->time); 167 rtc_time64_to_tm(sec, &alrm->time);
177 return rtc_valid_tm(&alrm->time); 168 return rtc_valid_tm(&alrm->time);
178} 169}
179 170
@@ -210,7 +201,7 @@ static const struct rtc_class_ops tx4939_rtc_ops = {
210 .read_time = tx4939_rtc_read_time, 201 .read_time = tx4939_rtc_read_time,
211 .read_alarm = tx4939_rtc_read_alarm, 202 .read_alarm = tx4939_rtc_read_alarm,
212 .set_alarm = tx4939_rtc_set_alarm, 203 .set_alarm = tx4939_rtc_set_alarm,
213 .set_mmss = tx4939_rtc_set_mmss, 204 .set_time = tx4939_rtc_set_time,
214 .alarm_irq_enable = tx4939_rtc_alarm_irq_enable, 205 .alarm_irq_enable = tx4939_rtc_alarm_irq_enable,
215}; 206};
216 207
@@ -283,6 +274,7 @@ static int __init tx4939_rtc_probe(struct platform_device *pdev)
283 274
284 rtc->ops = &tx4939_rtc_ops; 275 rtc->ops = &tx4939_rtc_ops;
285 rtc->nvram_old_abi = true; 276 rtc->nvram_old_abi = true;
277 rtc->range_max = U32_MAX;
286 278
287 pdata->rtc = rtc; 279 pdata->rtc = rtc;
288 280
@@ -315,5 +307,5 @@ module_platform_driver_probe(tx4939_rtc_driver, tx4939_rtc_probe);
315 307
316MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>"); 308MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
317MODULE_DESCRIPTION("TX4939 internal RTC driver"); 309MODULE_DESCRIPTION("TX4939 internal RTC driver");
318MODULE_LICENSE("GPL"); 310MODULE_LICENSE("GPL v2");
319MODULE_ALIAS("platform:tx4939rtc"); 311MODULE_ALIAS("platform:tx4939rtc");
diff --git a/drivers/rtc/rtc-wilco-ec.c b/drivers/rtc/rtc-wilco-ec.c
new file mode 100644
index 000000000000..e62bda0cb53e
--- /dev/null
+++ b/drivers/rtc/rtc-wilco-ec.c
@@ -0,0 +1,177 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * RTC interface for Wilco Embedded Controller with R/W abilities
4 *
5 * Copyright 2018 Google LLC
6 *
7 * The corresponding platform device is typically registered in
8 * drivers/platform/chrome/wilco_ec/core.c
9 */
10
11#include <linux/bcd.h>
12#include <linux/err.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16#include <linux/platform_data/wilco-ec.h>
17#include <linux/rtc.h>
18#include <linux/timekeeping.h>
19
20#define EC_COMMAND_CMOS 0x7c
21#define EC_CMOS_TOD_WRITE 0x02
22#define EC_CMOS_TOD_READ 0x08
23
24/**
25 * struct ec_rtc_read - Format of RTC returned by EC.
26 * @second: Second value (0..59)
27 * @minute: Minute value (0..59)
28 * @hour: Hour value (0..23)
29 * @day: Day value (1..31)
30 * @month: Month value (1..12)
31 * @year: Year value (full year % 100)
32 * @century: Century value (full year / 100)
33 *
34 * All values are presented in binary (not BCD).
35 */
36struct ec_rtc_read {
37 u8 second;
38 u8 minute;
39 u8 hour;
40 u8 day;
41 u8 month;
42 u8 year;
43 u8 century;
44} __packed;
45
46/**
47 * struct ec_rtc_write - Format of RTC sent to the EC.
48 * @param: EC_CMOS_TOD_WRITE
49 * @century: Century value (full year / 100)
50 * @year: Year value (full year % 100)
51 * @month: Month value (1..12)
52 * @day: Day value (1..31)
53 * @hour: Hour value (0..23)
54 * @minute: Minute value (0..59)
55 * @second: Second value (0..59)
56 * @weekday: Day of the week (0=Saturday)
57 *
58 * All values are presented in BCD.
59 */
60struct ec_rtc_write {
61 u8 param;
62 u8 century;
63 u8 year;
64 u8 month;
65 u8 day;
66 u8 hour;
67 u8 minute;
68 u8 second;
69 u8 weekday;
70} __packed;
71
72static int wilco_ec_rtc_read(struct device *dev, struct rtc_time *tm)
73{
74 struct wilco_ec_device *ec = dev_get_drvdata(dev->parent);
75 u8 param = EC_CMOS_TOD_READ;
76 struct ec_rtc_read rtc;
77 struct wilco_ec_message msg = {
78 .type = WILCO_EC_MSG_LEGACY,
79 .flags = WILCO_EC_FLAG_RAW_RESPONSE,
80 .command = EC_COMMAND_CMOS,
81 .request_data = &param,
82 .request_size = sizeof(param),
83 .response_data = &rtc,
84 .response_size = sizeof(rtc),
85 };
86 int ret;
87
88 ret = wilco_ec_mailbox(ec, &msg);
89 if (ret < 0)
90 return ret;
91
92 tm->tm_sec = rtc.second;
93 tm->tm_min = rtc.minute;
94 tm->tm_hour = rtc.hour;
95 tm->tm_mday = rtc.day;
96 tm->tm_mon = rtc.month - 1;
97 tm->tm_year = rtc.year + (rtc.century * 100) - 1900;
98 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
99
100 /* Don't compute day of week, we don't need it. */
101 tm->tm_wday = -1;
102
103 return 0;
104}
105
106static int wilco_ec_rtc_write(struct device *dev, struct rtc_time *tm)
107{
108 struct wilco_ec_device *ec = dev_get_drvdata(dev->parent);
109 struct ec_rtc_write rtc;
110 struct wilco_ec_message msg = {
111 .type = WILCO_EC_MSG_LEGACY,
112 .flags = WILCO_EC_FLAG_RAW_RESPONSE,
113 .command = EC_COMMAND_CMOS,
114 .request_data = &rtc,
115 .request_size = sizeof(rtc),
116 };
117 int year = tm->tm_year + 1900;
118 /*
119 * Convert from 0=Sunday to 0=Saturday for the EC
120 * We DO need to set weekday because the EC controls battery charging
121 * schedules that depend on the day of the week.
122 */
123 int wday = tm->tm_wday == 6 ? 0 : tm->tm_wday + 1;
124 int ret;
125
126 rtc.param = EC_CMOS_TOD_WRITE;
127 rtc.century = bin2bcd(year / 100);
128 rtc.year = bin2bcd(year % 100);
129 rtc.month = bin2bcd(tm->tm_mon + 1);
130 rtc.day = bin2bcd(tm->tm_mday);
131 rtc.hour = bin2bcd(tm->tm_hour);
132 rtc.minute = bin2bcd(tm->tm_min);
133 rtc.second = bin2bcd(tm->tm_sec);
134 rtc.weekday = bin2bcd(wday);
135
136 ret = wilco_ec_mailbox(ec, &msg);
137 if (ret < 0)
138 return ret;
139
140 return 0;
141}
142
143static const struct rtc_class_ops wilco_ec_rtc_ops = {
144 .read_time = wilco_ec_rtc_read,
145 .set_time = wilco_ec_rtc_write,
146};
147
148static int wilco_ec_rtc_probe(struct platform_device *pdev)
149{
150 struct rtc_device *rtc;
151
152 rtc = devm_rtc_allocate_device(&pdev->dev);
153 if (IS_ERR(rtc))
154 return PTR_ERR(rtc);
155
156 rtc->ops = &wilco_ec_rtc_ops;
157 /* EC only supports this century */
158 rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
159 rtc->range_max = RTC_TIMESTAMP_END_2099;
160 rtc->owner = THIS_MODULE;
161
162 return rtc_register_device(rtc);
163}
164
165static struct platform_driver wilco_ec_rtc_driver = {
166 .driver = {
167 .name = "rtc-wilco-ec",
168 },
169 .probe = wilco_ec_rtc_probe,
170};
171
172module_platform_driver(wilco_ec_rtc_driver);
173
174MODULE_ALIAS("platform:rtc-wilco-ec");
175MODULE_AUTHOR("Nick Crews <ncrews@chromium.org>");
176MODULE_LICENSE("GPL v2");
177MODULE_DESCRIPTION("Wilco EC RTC driver");
diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index c532bd13fbe5..bb950945ec7f 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -49,7 +49,6 @@
49 49
50#define RTC_CALIB_DEF 0x198233 50#define RTC_CALIB_DEF 0x198233
51#define RTC_CALIB_MASK 0x1FFFFF 51#define RTC_CALIB_MASK 0x1FFFFF
52#define RTC_SEC_MAX_VAL 0xFFFFFFFF
53 52
54struct xlnx_rtc_dev { 53struct xlnx_rtc_dev {
55 struct rtc_device *rtc; 54 struct rtc_device *rtc;
@@ -71,9 +70,6 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm)
71 */ 70 */
72 new_time = rtc_tm_to_time64(tm) + 1; 71 new_time = rtc_tm_to_time64(tm) + 1;
73 72
74 if (new_time > RTC_SEC_MAX_VAL)
75 return -EINVAL;
76
77 /* 73 /*
78 * Writing into calibration register will clear the Tick Counter and 74 * Writing into calibration register will clear the Tick Counter and
79 * force the next second to be signaled exactly in 1 second period 75 * force the next second to be signaled exactly in 1 second period
@@ -154,9 +150,6 @@ static int xlnx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
154 150
155 alarm_time = rtc_tm_to_time64(&alrm->time); 151 alarm_time = rtc_tm_to_time64(&alrm->time);
156 152
157 if (alarm_time > RTC_SEC_MAX_VAL)
158 return -EINVAL;
159
160 writel((u32)alarm_time, (xrtcdev->reg_base + RTC_ALRM)); 153 writel((u32)alarm_time, (xrtcdev->reg_base + RTC_ALRM));
161 154
162 xlnx_rtc_alarm_irq_enable(dev, alrm->enabled); 155 xlnx_rtc_alarm_irq_enable(dev, alrm->enabled);
@@ -222,6 +215,13 @@ static int xlnx_rtc_probe(struct platform_device *pdev)
222 215
223 platform_set_drvdata(pdev, xrtcdev); 216 platform_set_drvdata(pdev, xrtcdev);
224 217
218 xrtcdev->rtc = devm_rtc_allocate_device(&pdev->dev);
219 if (IS_ERR(xrtcdev->rtc))
220 return PTR_ERR(xrtcdev->rtc);
221
222 xrtcdev->rtc->ops = &xlnx_rtc_ops;
223 xrtcdev->rtc->range_max = U32_MAX;
224
225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
226 226
227 xrtcdev->reg_base = devm_ioremap_resource(&pdev->dev, res); 227 xrtcdev->reg_base = devm_ioremap_resource(&pdev->dev, res);
@@ -263,9 +263,7 @@ static int xlnx_rtc_probe(struct platform_device *pdev)
263 263
264 device_init_wakeup(&pdev->dev, 1); 264 device_init_wakeup(&pdev->dev, 1);
265 265
266 xrtcdev->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 266 return rtc_register_device(xrtcdev->rtc);
267 &xlnx_rtc_ops, THIS_MODULE);
268 return PTR_ERR_OR_ZERO(xrtcdev->rtc);
269} 267}
270 268
271static int xlnx_rtc_remove(struct platform_device *pdev) 269static int xlnx_rtc_remove(struct platform_device *pdev)
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-11 09:47:56 -0400