diff options
Diffstat (limited to 'drivers/platform/x86/mlx-platform.c')
-rw-r--r-- | drivers/platform/x86/mlx-platform.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index 858156deff45..2b98f299faa4 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c | |||
@@ -1127,6 +1127,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { | |||
1127 | .mode = 0444, | 1127 | .mode = 0444, |
1128 | }, | 1128 | }, |
1129 | { | 1129 | { |
1130 | .label = "reset_sff_wd", | ||
1131 | .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, | ||
1132 | .mask = GENMASK(7, 0) & ~BIT(6), | ||
1133 | .mode = 0444, | ||
1134 | }, | ||
1135 | { | ||
1130 | .label = "psu1_on", | 1136 | .label = "psu1_on", |
1131 | .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, | 1137 | .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, |
1132 | .mask = GENMASK(7, 0) & ~BIT(0), | 1138 | .mask = GENMASK(7, 0) & ~BIT(0), |
@@ -1215,6 +1221,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { | |||
1215 | .mode = 0444, | 1221 | .mode = 0444, |
1216 | }, | 1222 | }, |
1217 | { | 1223 | { |
1224 | .label = "reset_from_asic", | ||
1225 | .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, | ||
1226 | .mask = GENMASK(7, 0) & ~BIT(5), | ||
1227 | .mode = 0444, | ||
1228 | }, | ||
1229 | { | ||
1230 | .label = "reset_swb_wd", | ||
1231 | .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, | ||
1232 | .mask = GENMASK(7, 0) & ~BIT(6), | ||
1233 | .mode = 0444, | ||
1234 | }, | ||
1235 | { | ||
1218 | .label = "reset_asic_thermal", | 1236 | .label = "reset_asic_thermal", |
1219 | .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, | 1237 | .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, |
1220 | .mask = GENMASK(7, 0) & ~BIT(7), | 1238 | .mask = GENMASK(7, 0) & ~BIT(7), |
@@ -1227,6 +1245,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { | |||
1227 | .mode = 0444, | 1245 | .mode = 0444, |
1228 | }, | 1246 | }, |
1229 | { | 1247 | { |
1248 | .label = "reset_comex_wd", | ||
1249 | .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, | ||
1250 | .mask = GENMASK(7, 0) & ~BIT(6), | ||
1251 | .mode = 0444, | ||
1252 | }, | ||
1253 | { | ||
1230 | .label = "reset_voltmon_upgrade_fail", | 1254 | .label = "reset_voltmon_upgrade_fail", |
1231 | .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, | 1255 | .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, |
1232 | .mask = GENMASK(7, 0) & ~BIT(0), | 1256 | .mask = GENMASK(7, 0) & ~BIT(0), |
@@ -1239,6 +1263,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { | |||
1239 | .mode = 0444, | 1263 | .mode = 0444, |
1240 | }, | 1264 | }, |
1241 | { | 1265 | { |
1266 | .label = "reset_comex_thermal", | ||
1267 | .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, | ||
1268 | .mask = GENMASK(7, 0) & ~BIT(3), | ||
1269 | .mode = 0444, | ||
1270 | }, | ||
1271 | { | ||
1272 | .label = "reset_reload_bios", | ||
1273 | .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, | ||
1274 | .mask = GENMASK(7, 0) & ~BIT(5), | ||
1275 | .mode = 0444, | ||
1276 | }, | ||
1277 | { | ||
1242 | .label = "psu1_on", | 1278 | .label = "psu1_on", |
1243 | .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, | 1279 | .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, |
1244 | .mask = GENMASK(7, 0) & ~BIT(0), | 1280 | .mask = GENMASK(7, 0) & ~BIT(0), |