aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/setup-bus.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pci/setup-bus.c')
-rw-r--r--drivers/pci/setup-bus.c49
1 files changed, 24 insertions, 25 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index b1ad466199ad..3cce29a069e6 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1,3 +1,4 @@
1// SPDX-License-Identifier: GPL-2.0
1/* 2/*
2 * drivers/pci/setup-bus.c 3 * drivers/pci/setup-bus.c
3 * 4 *
@@ -67,10 +68,8 @@ static int add_to_list(struct list_head *head,
67 struct pci_dev_resource *tmp; 68 struct pci_dev_resource *tmp;
68 69
69 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 70 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
70 if (!tmp) { 71 if (!tmp)
71 pr_warn("add_to_list: kmalloc() failed!\n");
72 return -ENOMEM; 72 return -ENOMEM;
73 }
74 73
75 tmp->res = res; 74 tmp->res = res;
76 tmp->dev = dev; 75 tmp->dev = dev;
@@ -152,7 +151,7 @@ static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
152 151
153 r_align = pci_resource_alignment(dev, r); 152 r_align = pci_resource_alignment(dev, r);
154 if (!r_align) { 153 if (!r_align) {
155 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", 154 pci_warn(dev, "BAR %d: %pR has bogus alignment\n",
156 i, r); 155 i, r);
157 continue; 156 continue;
158 } 157 }
@@ -260,7 +259,7 @@ static void reassign_resources_sorted(struct list_head *realloc_head,
260 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN); 259 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
261 if (pci_reassign_resource(add_res->dev, idx, 260 if (pci_reassign_resource(add_res->dev, idx,
262 add_size, align)) 261 add_size, align))
263 dev_printk(KERN_DEBUG, &add_res->dev->dev, 262 pci_printk(KERN_DEBUG, add_res->dev,
264 "failed to add %llx res[%d]=%pR\n", 263 "failed to add %llx res[%d]=%pR\n",
265 (unsigned long long)add_size, 264 (unsigned long long)add_size,
266 idx, res); 265 idx, res);
@@ -519,7 +518,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
519 struct resource *res; 518 struct resource *res;
520 struct pci_bus_region region; 519 struct pci_bus_region region;
521 520
522 dev_info(&bridge->dev, "CardBus bridge to %pR\n", 521 pci_info(bridge, "CardBus bridge to %pR\n",
523 &bus->busn_res); 522 &bus->busn_res);
524 523
525 res = bus->resource[0]; 524 res = bus->resource[0];
@@ -529,7 +528,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
529 * The IO resource is allocated a range twice as large as it 528 * The IO resource is allocated a range twice as large as it
530 * would normally need. This allows us to set both IO regs. 529 * would normally need. This allows us to set both IO regs.
531 */ 530 */
532 dev_info(&bridge->dev, " bridge window %pR\n", res); 531 pci_info(bridge, " bridge window %pR\n", res);
533 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, 532 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
534 region.start); 533 region.start);
535 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, 534 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
@@ -539,7 +538,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
539 res = bus->resource[1]; 538 res = bus->resource[1];
540 pcibios_resource_to_bus(bridge->bus, &region, res); 539 pcibios_resource_to_bus(bridge->bus, &region, res);
541 if (res->flags & IORESOURCE_IO) { 540 if (res->flags & IORESOURCE_IO) {
542 dev_info(&bridge->dev, " bridge window %pR\n", res); 541 pci_info(bridge, " bridge window %pR\n", res);
543 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, 542 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
544 region.start); 543 region.start);
545 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, 544 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
@@ -549,7 +548,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
549 res = bus->resource[2]; 548 res = bus->resource[2];
550 pcibios_resource_to_bus(bridge->bus, &region, res); 549 pcibios_resource_to_bus(bridge->bus, &region, res);
551 if (res->flags & IORESOURCE_MEM) { 550 if (res->flags & IORESOURCE_MEM) {
552 dev_info(&bridge->dev, " bridge window %pR\n", res); 551 pci_info(bridge, " bridge window %pR\n", res);
553 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, 552 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
554 region.start); 553 region.start);
555 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, 554 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
@@ -559,7 +558,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
559 res = bus->resource[3]; 558 res = bus->resource[3];
560 pcibios_resource_to_bus(bridge->bus, &region, res); 559 pcibios_resource_to_bus(bridge->bus, &region, res);
561 if (res->flags & IORESOURCE_MEM) { 560 if (res->flags & IORESOURCE_MEM) {
562 dev_info(&bridge->dev, " bridge window %pR\n", res); 561 pci_info(bridge, " bridge window %pR\n", res);
563 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, 562 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
564 region.start); 563 region.start);
565 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, 564 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
@@ -602,7 +601,7 @@ static void pci_setup_bridge_io(struct pci_dev *bridge)
602 l = ((u16) io_limit_lo << 8) | io_base_lo; 601 l = ((u16) io_limit_lo << 8) | io_base_lo;
603 /* Set up upper 16 bits of I/O base/limit. */ 602 /* Set up upper 16 bits of I/O base/limit. */
604 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); 603 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
605 dev_info(&bridge->dev, " bridge window %pR\n", res); 604 pci_info(bridge, " bridge window %pR\n", res);
606 } else { 605 } else {
607 /* Clear upper 16 bits of I/O base/limit. */ 606 /* Clear upper 16 bits of I/O base/limit. */
608 io_upper16 = 0; 607 io_upper16 = 0;
@@ -628,7 +627,7 @@ static void pci_setup_bridge_mmio(struct pci_dev *bridge)
628 if (res->flags & IORESOURCE_MEM) { 627 if (res->flags & IORESOURCE_MEM) {
629 l = (region.start >> 16) & 0xfff0; 628 l = (region.start >> 16) & 0xfff0;
630 l |= region.end & 0xfff00000; 629 l |= region.end & 0xfff00000;
631 dev_info(&bridge->dev, " bridge window %pR\n", res); 630 pci_info(bridge, " bridge window %pR\n", res);
632 } else { 631 } else {
633 l = 0x0000fff0; 632 l = 0x0000fff0;
634 } 633 }
@@ -657,7 +656,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)
657 bu = upper_32_bits(region.start); 656 bu = upper_32_bits(region.start);
658 lu = upper_32_bits(region.end); 657 lu = upper_32_bits(region.end);
659 } 658 }
660 dev_info(&bridge->dev, " bridge window %pR\n", res); 659 pci_info(bridge, " bridge window %pR\n", res);
661 } else { 660 } else {
662 l = 0x0000fff0; 661 l = 0x0000fff0;
663 } 662 }
@@ -672,7 +671,7 @@ static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
672{ 671{
673 struct pci_dev *bridge = bus->self; 672 struct pci_dev *bridge = bus->self;
674 673
675 dev_info(&bridge->dev, "PCI bridge to %pR\n", 674 pci_info(bridge, "PCI bridge to %pR\n",
676 &bus->busn_res); 675 &bus->busn_res);
677 676
678 if (type & IORESOURCE_IO) 677 if (type & IORESOURCE_IO)
@@ -944,7 +943,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
944 resource_size(b_res), min_align); 943 resource_size(b_res), min_align);
945 if (!size0 && !size1) { 944 if (!size0 && !size1) {
946 if (b_res->start || b_res->end) 945 if (b_res->start || b_res->end)
947 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n", 946 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",
948 b_res, &bus->busn_res); 947 b_res, &bus->busn_res);
949 b_res->flags = 0; 948 b_res->flags = 0;
950 return; 949 return;
@@ -956,7 +955,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
956 if (size1 > size0 && realloc_head) { 955 if (size1 > size0 && realloc_head) {
957 add_to_list(realloc_head, bus->self, b_res, size1-size0, 956 add_to_list(realloc_head, bus->self, b_res, size1-size0,
958 min_align); 957 min_align);
959 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n", 958 pci_printk(KERN_DEBUG, bus->self, "bridge window %pR to %pR add_size %llx\n",
960 b_res, &bus->busn_res, 959 b_res, &bus->busn_res,
961 (unsigned long long)size1-size0); 960 (unsigned long long)size1-size0);
962 } 961 }
@@ -1061,7 +1060,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
1061 if (order < 0) 1060 if (order < 0)
1062 order = 0; 1061 order = 0;
1063 if (order >= ARRAY_SIZE(aligns)) { 1062 if (order >= ARRAY_SIZE(aligns)) {
1064 dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n", 1063 pci_warn(dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
1065 i, r, (unsigned long long) align); 1064 i, r, (unsigned long long) align);
1066 r->flags = 0; 1065 r->flags = 0;
1067 continue; 1066 continue;
@@ -1093,7 +1092,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
1093 resource_size(b_res), add_align); 1092 resource_size(b_res), add_align);
1094 if (!size0 && !size1) { 1093 if (!size0 && !size1) {
1095 if (b_res->start || b_res->end) 1094 if (b_res->start || b_res->end)
1096 dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n", 1095 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",
1097 b_res, &bus->busn_res); 1096 b_res, &bus->busn_res);
1098 b_res->flags = 0; 1097 b_res->flags = 0;
1099 return 0; 1098 return 0;
@@ -1103,7 +1102,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
1103 b_res->flags |= IORESOURCE_STARTALIGN; 1102 b_res->flags |= IORESOURCE_STARTALIGN;
1104 if (size1 > size0 && realloc_head) { 1103 if (size1 > size0 && realloc_head) {
1105 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align); 1104 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align);
1106 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx add_align %llx\n", 1105 pci_printk(KERN_DEBUG, bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n",
1107 b_res, &bus->busn_res, 1106 b_res, &bus->busn_res,
1108 (unsigned long long) (size1 - size0), 1107 (unsigned long long) (size1 - size0),
1109 (unsigned long long) add_align); 1108 (unsigned long long) add_align);
@@ -1407,7 +1406,7 @@ void __pci_bus_assign_resources(const struct pci_bus *bus,
1407 break; 1406 break;
1408 1407
1409 default: 1408 default:
1410 dev_info(&dev->dev, "not setting up bridge for bus %04x:%02x\n", 1409 pci_info(dev, "not setting up bridge for bus %04x:%02x\n",
1411 pci_domain_nr(b), b->number); 1410 pci_domain_nr(b), b->number);
1412 break; 1411 break;
1413 } 1412 }
@@ -1513,7 +1512,7 @@ static void __pci_bridge_assign_resources(const struct pci_dev *bridge,
1513 break; 1512 break;
1514 1513
1515 default: 1514 default:
1516 dev_info(&bridge->dev, "not setting up bridge for bus %04x:%02x\n", 1515 pci_info(bridge, "not setting up bridge for bus %04x:%02x\n",
1517 pci_domain_nr(b), b->number); 1516 pci_domain_nr(b), b->number);
1518 break; 1517 break;
1519 } 1518 }
@@ -1571,7 +1570,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus,
1571 release_child_resources(r); 1570 release_child_resources(r);
1572 if (!release_resource(r)) { 1571 if (!release_resource(r)) {
1573 type = old_flags = r->flags & PCI_RES_TYPE_MASK; 1572 type = old_flags = r->flags & PCI_RES_TYPE_MASK;
1574 dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n", 1573 pci_printk(KERN_DEBUG, dev, "resource %d %pR released\n",
1575 PCI_BRIDGE_RESOURCES + idx, r); 1574 PCI_BRIDGE_RESOURCES + idx, r);
1576 /* keep the old size */ 1575 /* keep the old size */
1577 r->end = resource_size(r) - 1; 1576 r->end = resource_size(r) - 1;
@@ -1874,7 +1873,7 @@ static void extend_bridge_window(struct pci_dev *bridge, struct resource *res,
1874 return; 1873 return;
1875 1874
1876 dev_res->add_size = available - resource_size(res); 1875 dev_res->add_size = available - resource_size(res);
1877 dev_dbg(&bridge->dev, "bridge window %pR extended by %pa\n", res, 1876 pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,
1878 &dev_res->add_size); 1877 &dev_res->add_size);
1879} 1878}
1880 1879
@@ -2085,7 +2084,7 @@ again:
2085enable_all: 2084enable_all:
2086 retval = pci_reenable_device(bridge); 2085 retval = pci_reenable_device(bridge);
2087 if (retval) 2086 if (retval)
2088 dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval); 2087 pci_err(bridge, "Error reenabling bridge (%d)\n", retval);
2089 pci_set_master(bridge); 2088 pci_set_master(bridge);
2090} 2089}
2091EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); 2090EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
@@ -2119,7 +2118,7 @@ int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type)
2119 if (ret) 2118 if (ret)
2120 goto cleanup; 2119 goto cleanup;
2121 2120
2122 dev_info(&bridge->dev, "BAR %d: releasing %pR\n", 2121 pci_info(bridge, "BAR %d: releasing %pR\n",
2123 i, res); 2122 i, res);
2124 2123
2125 if (res->parent) 2124 if (res->parent)