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-rw-r--r--drivers/pci/controller/dwc/pci-imx6.c10
-rw-r--r--drivers/pci/controller/dwc/pci-layerscape.c2
-rw-r--r--drivers/pci/controller/dwc/pcie-designware-ep.c1
3 files changed, 2 insertions, 11 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 2cbef2d7c207..88af6bff945f 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -81,8 +81,6 @@ struct imx6_pcie {
81#define PCIE_PL_PFLR_FORCE_LINK (1 << 15) 81#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
82#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28) 82#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
83#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c) 83#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
84#define PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING (1 << 29)
85#define PCIE_PHY_DEBUG_R1_XMLH_LINK_UP (1 << 4)
86 84
87#define PCIE_PHY_CTRL (PL_OFFSET + 0x114) 85#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
88#define PCIE_PHY_CTRL_DATA_LOC 0 86#define PCIE_PHY_CTRL_DATA_LOC 0
@@ -711,12 +709,6 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
711 return 0; 709 return 0;
712} 710}
713 711
714static int imx6_pcie_link_up(struct dw_pcie *pci)
715{
716 return dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1) &
717 PCIE_PHY_DEBUG_R1_XMLH_LINK_UP;
718}
719
720static const struct dw_pcie_host_ops imx6_pcie_host_ops = { 712static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
721 .host_init = imx6_pcie_host_init, 713 .host_init = imx6_pcie_host_init,
722}; 714};
@@ -749,7 +741,7 @@ static int imx6_add_pcie_port(struct imx6_pcie *imx6_pcie,
749} 741}
750 742
751static const struct dw_pcie_ops dw_pcie_ops = { 743static const struct dw_pcie_ops dw_pcie_ops = {
752 .link_up = imx6_pcie_link_up, 744 /* No special ops needed, but pcie-designware still expects this struct */
753}; 745};
754 746
755#ifdef CONFIG_PM_SLEEP 747#ifdef CONFIG_PM_SLEEP
diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c
index 3724d3ef7008..7aa9a82b7ebd 100644
--- a/drivers/pci/controller/dwc/pci-layerscape.c
+++ b/drivers/pci/controller/dwc/pci-layerscape.c
@@ -88,7 +88,7 @@ static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie)
88 int i; 88 int i;
89 89
90 for (i = 0; i < PCIE_IATU_NUM; i++) 90 for (i = 0; i < PCIE_IATU_NUM; i++)
91 dw_pcie_disable_atu(pcie->pci, DW_PCIE_REGION_OUTBOUND, i); 91 dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND);
92} 92}
93 93
94static int ls1021_pcie_link_up(struct dw_pcie *pci) 94static int ls1021_pcie_link_up(struct dw_pcie *pci)
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 1e7b02221eac..de8635af4cde 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -440,7 +440,6 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
440 tbl_offset = dw_pcie_readl_dbi(pci, reg); 440 tbl_offset = dw_pcie_readl_dbi(pci, reg);
441 bir = (tbl_offset & PCI_MSIX_TABLE_BIR); 441 bir = (tbl_offset & PCI_MSIX_TABLE_BIR);
442 tbl_offset &= PCI_MSIX_TABLE_OFFSET; 442 tbl_offset &= PCI_MSIX_TABLE_OFFSET;
443 tbl_offset >>= 3;
444 443
445 reg = PCI_BASE_ADDRESS_0 + (4 * bir); 444 reg = PCI_BASE_ADDRESS_0 + (4 * bir);
446 bar_addr_upper = 0; 445 bar_addr_upper = 0;