diff options
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_link.c')
-rw-r--r-- | drivers/net/bnx2x/bnx2x_link.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c index d45b1555a602..ba15bdc5a1a9 100644 --- a/drivers/net/bnx2x/bnx2x_link.c +++ b/drivers/net/bnx2x/bnx2x_link.c | |||
@@ -778,9 +778,9 @@ static int bnx2x_ets_e3b0_set_cos_bw(struct bnx2x *bp, | |||
778 | { | 778 | { |
779 | u32 nig_reg_adress_crd_weight = 0; | 779 | u32 nig_reg_adress_crd_weight = 0; |
780 | u32 pbf_reg_adress_crd_weight = 0; | 780 | u32 pbf_reg_adress_crd_weight = 0; |
781 | /* Calculate and set BW for this COS*/ | 781 | /* Calculate and set BW for this COS - use 1 instead of 0 for BW */ |
782 | const u32 cos_bw_nig = (bw * min_w_val_nig) / total_bw; | 782 | const u32 cos_bw_nig = ((bw ? bw : 1) * min_w_val_nig) / total_bw; |
783 | const u32 cos_bw_pbf = (bw * min_w_val_pbf) / total_bw; | 783 | const u32 cos_bw_pbf = ((bw ? bw : 1) * min_w_val_pbf) / total_bw; |
784 | 784 | ||
785 | switch (cos_entry) { | 785 | switch (cos_entry) { |
786 | case 0: | 786 | case 0: |
@@ -852,18 +852,12 @@ static int bnx2x_ets_e3b0_get_total_bw( | |||
852 | /* Calculate total BW requested */ | 852 | /* Calculate total BW requested */ |
853 | for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) { | 853 | for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) { |
854 | if (bnx2x_cos_state_bw == ets_params->cos[cos_idx].state) { | 854 | if (bnx2x_cos_state_bw == ets_params->cos[cos_idx].state) { |
855 | 855 | *total_bw += | |
856 | if (0 == ets_params->cos[cos_idx].params.bw_params.bw) { | 856 | ets_params->cos[cos_idx].params.bw_params.bw; |
857 | DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW" | ||
858 | "was set to 0\n"); | ||
859 | return -EINVAL; | ||
860 | } | 857 | } |
861 | *total_bw += | ||
862 | ets_params->cos[cos_idx].params.bw_params.bw; | ||
863 | } | ||
864 | } | 858 | } |
865 | 859 | ||
866 | /*Check taotl BW is valid */ | 860 | /* Check total BW is valid */ |
867 | if ((100 != *total_bw) || (0 == *total_bw)) { | 861 | if ((100 != *total_bw) || (0 == *total_bw)) { |
868 | if (0 == *total_bw) { | 862 | if (0 == *total_bw) { |
869 | DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config toatl BW" | 863 | DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config toatl BW" |
@@ -1726,7 +1720,7 @@ static int bnx2x_xmac_enable(struct link_params *params, | |||
1726 | 1720 | ||
1727 | /* Check loopback mode */ | 1721 | /* Check loopback mode */ |
1728 | if (lb) | 1722 | if (lb) |
1729 | val |= XMAC_CTRL_REG_CORE_LOCAL_LPBK; | 1723 | val |= XMAC_CTRL_REG_LINE_LOCAL_LPBK; |
1730 | REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); | 1724 | REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); |
1731 | bnx2x_set_xumac_nig(params, | 1725 | bnx2x_set_xumac_nig(params, |
1732 | ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1); | 1726 | ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1); |
@@ -3630,6 +3624,12 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
3630 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3624 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
3631 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); | 3625 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); |
3632 | 3626 | ||
3627 | /* Advertised and set FEC (Forward Error Correction) */ | ||
3628 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | ||
3629 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2, | ||
3630 | (MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY | | ||
3631 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ)); | ||
3632 | |||
3633 | /* Enable CL37 BAM */ | 3633 | /* Enable CL37 BAM */ |
3634 | if (REG_RD(bp, params->shmem_base + | 3634 | if (REG_RD(bp, params->shmem_base + |
3635 | offsetof(struct shmem_region, dev_info. | 3635 | offsetof(struct shmem_region, dev_info. |
@@ -5924,7 +5924,7 @@ int bnx2x_set_led(struct link_params *params, | |||
5924 | (tmp | EMAC_LED_OVERRIDE)); | 5924 | (tmp | EMAC_LED_OVERRIDE)); |
5925 | /* | 5925 | /* |
5926 | * return here without enabling traffic | 5926 | * return here without enabling traffic |
5927 | * LED blink andsetting rate in ON mode. | 5927 | * LED blink and setting rate in ON mode. |
5928 | * In oper mode, enabling LED blink | 5928 | * In oper mode, enabling LED blink |
5929 | * and setting rate is needed. | 5929 | * and setting rate is needed. |
5930 | */ | 5930 | */ |
@@ -5936,7 +5936,11 @@ int bnx2x_set_led(struct link_params *params, | |||
5936 | * This is a work-around for HW issue found when link | 5936 | * This is a work-around for HW issue found when link |
5937 | * is up in CL73 | 5937 | * is up in CL73 |
5938 | */ | 5938 | */ |
5939 | REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); | 5939 | if ((!CHIP_IS_E3(bp)) || |
5940 | (CHIP_IS_E3(bp) && | ||
5941 | mode == LED_MODE_ON)) | ||
5942 | REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); | ||
5943 | |||
5940 | if (CHIP_IS_E1x(bp) || | 5944 | if (CHIP_IS_E1x(bp) || |
5941 | CHIP_IS_E2(bp) || | 5945 | CHIP_IS_E2(bp) || |
5942 | (mode == LED_MODE_ON)) | 5946 | (mode == LED_MODE_ON)) |
@@ -10638,8 +10642,7 @@ static struct bnx2x_phy phy_warpcore = { | |||
10638 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, | 10642 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, |
10639 | .addr = 0xff, | 10643 | .addr = 0xff, |
10640 | .def_md_devad = 0, | 10644 | .def_md_devad = 0, |
10641 | .flags = (FLAGS_HW_LOCK_REQUIRED | | 10645 | .flags = FLAGS_HW_LOCK_REQUIRED, |
10642 | FLAGS_TX_ERROR_CHECK), | ||
10643 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10646 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10644 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10647 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10645 | .mdio_ctrl = 0, | 10648 | .mdio_ctrl = 0, |
@@ -10765,8 +10768,7 @@ static struct bnx2x_phy phy_8706 = { | |||
10765 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706, | 10768 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706, |
10766 | .addr = 0xff, | 10769 | .addr = 0xff, |
10767 | .def_md_devad = 0, | 10770 | .def_md_devad = 0, |
10768 | .flags = (FLAGS_INIT_XGXS_FIRST | | 10771 | .flags = FLAGS_INIT_XGXS_FIRST, |
10769 | FLAGS_TX_ERROR_CHECK), | ||
10770 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10772 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10771 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10773 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10772 | .mdio_ctrl = 0, | 10774 | .mdio_ctrl = 0, |
@@ -10797,8 +10799,7 @@ static struct bnx2x_phy phy_8726 = { | |||
10797 | .addr = 0xff, | 10799 | .addr = 0xff, |
10798 | .def_md_devad = 0, | 10800 | .def_md_devad = 0, |
10799 | .flags = (FLAGS_HW_LOCK_REQUIRED | | 10801 | .flags = (FLAGS_HW_LOCK_REQUIRED | |
10800 | FLAGS_INIT_XGXS_FIRST | | 10802 | FLAGS_INIT_XGXS_FIRST), |
10801 | FLAGS_TX_ERROR_CHECK), | ||
10802 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10803 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10803 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10804 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10804 | .mdio_ctrl = 0, | 10805 | .mdio_ctrl = 0, |
@@ -10829,8 +10830,7 @@ static struct bnx2x_phy phy_8727 = { | |||
10829 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, | 10830 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, |
10830 | .addr = 0xff, | 10831 | .addr = 0xff, |
10831 | .def_md_devad = 0, | 10832 | .def_md_devad = 0, |
10832 | .flags = (FLAGS_FAN_FAILURE_DET_REQ | | 10833 | .flags = FLAGS_FAN_FAILURE_DET_REQ, |
10833 | FLAGS_TX_ERROR_CHECK), | ||
10834 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10834 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10835 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10835 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
10836 | .mdio_ctrl = 0, | 10836 | .mdio_ctrl = 0, |