diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index cfbf4a691697..23f339e04f73 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -78,7 +78,7 @@ static u32 g4x_infoframe_index(enum hdmi_infoframe_type type) | |||
78 | case HDMI_INFOFRAME_TYPE_VENDOR: | 78 | case HDMI_INFOFRAME_TYPE_VENDOR: |
79 | return VIDEO_DIP_SELECT_VENDOR; | 79 | return VIDEO_DIP_SELECT_VENDOR; |
80 | default: | 80 | default: |
81 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 81 | MISSING_CASE(type); |
82 | return 0; | 82 | return 0; |
83 | } | 83 | } |
84 | } | 84 | } |
@@ -93,7 +93,7 @@ static u32 g4x_infoframe_enable(enum hdmi_infoframe_type type) | |||
93 | case HDMI_INFOFRAME_TYPE_VENDOR: | 93 | case HDMI_INFOFRAME_TYPE_VENDOR: |
94 | return VIDEO_DIP_ENABLE_VENDOR; | 94 | return VIDEO_DIP_ENABLE_VENDOR; |
95 | default: | 95 | default: |
96 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 96 | MISSING_CASE(type); |
97 | return 0; | 97 | return 0; |
98 | } | 98 | } |
99 | } | 99 | } |
@@ -108,7 +108,7 @@ static u32 hsw_infoframe_enable(enum hdmi_infoframe_type type) | |||
108 | case HDMI_INFOFRAME_TYPE_VENDOR: | 108 | case HDMI_INFOFRAME_TYPE_VENDOR: |
109 | return VIDEO_DIP_ENABLE_VS_HSW; | 109 | return VIDEO_DIP_ENABLE_VS_HSW; |
110 | default: | 110 | default: |
111 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 111 | MISSING_CASE(type); |
112 | return 0; | 112 | return 0; |
113 | } | 113 | } |
114 | } | 114 | } |
@@ -127,7 +127,7 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv, | |||
127 | case HDMI_INFOFRAME_TYPE_VENDOR: | 127 | case HDMI_INFOFRAME_TYPE_VENDOR: |
128 | return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder, i); | 128 | return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder, i); |
129 | default: | 129 | default: |
130 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", type); | 130 | MISSING_CASE(type); |
131 | return INVALID_MMIO_REG; | 131 | return INVALID_MMIO_REG; |
132 | } | 132 | } |
133 | } | 133 | } |
@@ -375,8 +375,6 @@ static void hsw_write_infoframe(struct drm_encoder *encoder, | |||
375 | u32 val = I915_READ(ctl_reg); | 375 | u32 val = I915_READ(ctl_reg); |
376 | 376 | ||
377 | data_reg = hsw_dip_data_reg(dev_priv, cpu_transcoder, type, 0); | 377 | data_reg = hsw_dip_data_reg(dev_priv, cpu_transcoder, type, 0); |
378 | if (i915_mmio_reg_valid(data_reg)) | ||
379 | return; | ||
380 | 378 | ||
381 | val &= ~hsw_infoframe_enable(type); | 379 | val &= ~hsw_infoframe_enable(type); |
382 | I915_WRITE(ctl_reg, val); | 380 | I915_WRITE(ctl_reg, val); |