34 files changed, 305 insertions, 80 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
index 9b384a94d2f3..3e35a8f2c5e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
@@ -574,6 +574,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = {
         { 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },
         { 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },
         { 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },
+        { 0x1002, 0x699f, 0x1028, 0x0814, AMDGPU_PX_QUIRK_FORCE_ATPX },
         { 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX },
         { 0x1002, 0x6900, 0x17AA, 0x3806, AMDGPU_PX_QUIRK_FORCE_ATPX },
         { 0, 0, 0, 0, 0 },
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 4e4094f842e7..8b26c970a3cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1143,6 +1143,9 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
         num_deps = chunk->length_dw * 4 /
                 sizeof(struct drm_amdgpu_cs_chunk_sem);
 
+        if (p->post_deps)
+                return -EINVAL;
+
         p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),
                                      GFP_KERNEL);
         p->num_post_deps = 0;
@@ -1166,8 +1169,7 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
 
 
 static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p,
-                                                      struct amdgpu_cs_chunk
-                                                      *chunk)
+                                                      struct amdgpu_cs_chunk *chunk)
 {
         struct drm_amdgpu_cs_chunk_syncobj *syncobj_deps;
         unsigned num_deps;
@@ -1177,6 +1179,9 @@ static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p
         num_deps = chunk->length_dw * 4 /
                 sizeof(struct drm_amdgpu_cs_chunk_syncobj);
 
+        if (p->post_deps)
+                return -EINVAL;
+
         p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),
                                      GFP_KERNEL);
         p->num_post_deps = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index f539a2a92774..7398b4850649 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -534,21 +534,24 @@ int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx,
                                struct drm_sched_entity *entity)
 {
         struct amdgpu_ctx_entity *centity = to_amdgpu_ctx_entity(entity);
-        unsigned idx = centity->sequence & (amdgpu_sched_jobs - 1);
-        struct dma_fence *other = centity->fences[idx];
+        struct dma_fence *other;
+        unsigned idx;
+        long r;
 
-        if (other) {
-                signed long r;
-                r = dma_fence_wait(other, true);
-                if (r < 0) {
-                        if (r != -ERESTARTSYS)
-                                DRM_ERROR("Error (%ld) waiting for fence!\n", r);
+        spin_lock(&ctx->ring_lock);
+        idx = centity->sequence & (amdgpu_sched_jobs - 1);
+        other = dma_fence_get(centity->fences[idx]);
+        spin_unlock(&ctx->ring_lock);
 
-                        return r;
-                }
-        }
+        if (!other)
+                return 0;
 
-        return 0;
+        r = dma_fence_wait(other, true);
+        if (r < 0 && r != -ERESTARTSYS)
+                DRM_ERROR("Error (%ld) waiting for fence!\n", r);
+
+        dma_fence_put(other);
+        return r;
 }
 
 void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 04b8ac4432c7..c066e1d3f981 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -596,14 +596,18 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)
         case CHIP_VEGA20:
                 break;
         case CHIP_RAVEN:
-                if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
-                        break;
-                if ((adev->gfx.rlc_fw_version != 106 &&
-                     adev->gfx.rlc_fw_version < 531) ||
-                    (adev->gfx.rlc_fw_version == 53815) ||
-                    (adev->gfx.rlc_feature_version < 1) ||
-                    !adev->gfx.rlc.is_rlc_v2_1)
+                if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
+                        &&((adev->gfx.rlc_fw_version != 106 &&
+                             adev->gfx.rlc_fw_version < 531) ||
+                            (adev->gfx.rlc_fw_version == 53815) ||
+                            (adev->gfx.rlc_feature_version < 1) ||
+                            !adev->gfx.rlc.is_rlc_v2_1))
                         adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
+
+                if (adev->pm.pp_feature & PP_GFXOFF_MASK)
+                        adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
+                                AMD_PG_SUPPORT_CP |
+                                AMD_PG_SUPPORT_RLC_SMU_HS;
                 break;
         default:
                 break;
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 662612f89c70..9922bce3fd89 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -552,7 +552,6 @@ static int nv_common_early_init(void *handle)
                         AMD_CG_SUPPORT_BIF_LS;
                 adev->pg_flags = AMD_PG_SUPPORT_VCN |
                         AMD_PG_SUPPORT_VCN_DPG |
-                        AMD_PG_SUPPORT_MMHUB |
                         AMD_PG_SUPPORT_ATHUB;
                 adev->external_rev_id = adev->rev_id + 0x1;
                 break;
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 23265414d448..04fbf05d7176 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -992,11 +992,6 @@ static int soc15_common_early_init(void *handle)
 
                         adev->pg_flags = AMD_PG_SUPPORT_SDMA | AMD_PG_SUPPORT_VCN;
                 }
-
-                if (adev->pm.pp_feature & PP_GFXOFF_MASK)
-                        adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
-                                AMD_PG_SUPPORT_CP |
-                                AMD_PG_SUPPORT_RLC_SMU_HS;
                 break;
         default:
                 /* FIXME: not supported yet */
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4a29f72334d0..45be7a2132bb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3131,13 +3131,25 @@ static enum dc_color_depth
 convert_color_depth_from_display_info(const struct drm_connector *connector,
                                       const struct drm_connector_state *state)
 {
-        uint32_t bpc = connector->display_info.bpc;
+        uint8_t bpc = (uint8_t)connector->display_info.bpc;
+
+        /* Assume 8 bpc by default if no bpc is specified. */
+        bpc = bpc ? bpc : 8;
 
         if (!state)
                 state = connector->state;
 
         if (state) {
-                bpc = state->max_bpc;
+                /*
+                 * Cap display bpc based on the user requested value.
+                 *
+                 * The value for state->max_bpc may not correctly updated
+                 * depending on when the connector gets added to the state
+                 * or if this was called outside of atomic check, so it
+                 * can't be used directly.
+                 */
+                bpc = min(bpc, state->max_requested_bpc);
+
                 /* Round down to the nearest even number. */
                 bpc = bpc - (bpc & 1);
         }
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index f27c6fbb192e..90c4e87ac5ad 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -2101,7 +2101,11 @@ static int vega20_get_gpu_power(struct pp_hwmgr *hwmgr,
         if (ret)
                 return ret;
 
-        *query = metrics_table.CurrSocketPower << 8;
+        /* For the 40.46 release, they changed the value name */
+        if (hwmgr->smu_version == 0x282e00)
+                *query = metrics_table.AverageSocketPower << 8;
+        else
+                *query = metrics_table.CurrSocketPower << 8;
 
         return ret;
 }
@@ -2349,12 +2353,16 @@ static int vega20_force_dpm_highest(struct pp_hwmgr *hwmgr)
                 data->dpm_table.soc_table.dpm_state.soft_max_level =
                 data->dpm_table.soc_table.dpm_levels[soft_level].value;
 
-        ret = vega20_upload_dpm_min_level(hwmgr, 0xFFFFFFFF);
+        ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK |
+                                                 FEATURE_DPM_UCLK_MASK |
+                                                 FEATURE_DPM_SOCCLK_MASK);
         PP_ASSERT_WITH_CODE(!ret,
                         "Failed to upload boot level to highest!",
                         return ret);
 
-        ret = vega20_upload_dpm_max_level(hwmgr, 0xFFFFFFFF);
+        ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK |
+                                                 FEATURE_DPM_UCLK_MASK |
+                                                 FEATURE_DPM_SOCCLK_MASK);
         PP_ASSERT_WITH_CODE(!ret,
                         "Failed to upload dpm max level to highest!",
                         return ret);
@@ -2387,12 +2395,16 @@ static int vega20_force_dpm_lowest(struct pp_hwmgr *hwmgr)
                 data->dpm_table.soc_table.dpm_state.soft_max_level =
                 data->dpm_table.soc_table.dpm_levels[soft_level].value;
 
-        ret = vega20_upload_dpm_min_level(hwmgr, 0xFFFFFFFF);
+        ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK |
+                                                 FEATURE_DPM_UCLK_MASK |
+                                                 FEATURE_DPM_SOCCLK_MASK);
         PP_ASSERT_WITH_CODE(!ret,
                         "Failed to upload boot level to highest!",
                         return ret);
 
-        ret = vega20_upload_dpm_max_level(hwmgr, 0xFFFFFFFF);
+        ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK |
+                                                 FEATURE_DPM_UCLK_MASK |
+                                                 FEATURE_DPM_SOCCLK_MASK);
         PP_ASSERT_WITH_CODE(!ret,
                         "Failed to upload dpm max level to highest!",
                         return ret);
@@ -2403,14 +2415,54 @@ static int vega20_force_dpm_lowest(struct pp_hwmgr *hwmgr)
 
 static int vega20_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
 {
+        struct vega20_hwmgr *data =
+                        (struct vega20_hwmgr *)(hwmgr->backend);
+        uint32_t soft_min_level, soft_max_level;
         int ret = 0;
 
-        ret = vega20_upload_dpm_min_level(hwmgr, 0xFFFFFFFF);
+        /* gfxclk soft min/max settings */
+        soft_min_level =
+                vega20_find_lowest_dpm_level(&(data->dpm_table.gfx_table));
+        soft_max_level =
+                vega20_find_highest_dpm_level(&(data->dpm_table.gfx_table));
+
+        data->dpm_table.gfx_table.dpm_state.soft_min_level =
+                data->dpm_table.gfx_table.dpm_levels[soft_min_level].value;
+        data->dpm_table.gfx_table.dpm_state.soft_max_level =
+                data->dpm_table.gfx_table.dpm_levels[soft_max_level].value;
+
+        /* uclk soft min/max settings */
+        soft_min_level =
+                vega20_find_lowest_dpm_level(&(data->dpm_table.mem_table));
+        soft_max_level =
+                vega20_find_highest_dpm_level(&(data->dpm_table.mem_table));
+
+        data->dpm_table.mem_table.dpm_state.soft_min_level =
+                data->dpm_table.mem_table.dpm_levels[soft_min_level].value;
+        data->dpm_table.mem_table.dpm_state.soft_max_level =
+                data->dpm_table.mem_table.dpm_levels[soft_max_level].value;
+
+        /* socclk soft min/max settings */
+        soft_min_level =
+                vega20_find_lowest_dpm_level(&(data->dpm_table.soc_table));
+        soft_max_level =
+                vega20_find_highest_dpm_level(&(data->dpm_table.soc_table));
+
+        data->dpm_table.soc_table.dpm_state.soft_min_level =
+                data->dpm_table.soc_table.dpm_levels[soft_min_level].value;
+        data->dpm_table.soc_table.dpm_state.soft_max_level =
+                data->dpm_table.soc_table.dpm_levels[soft_max_level].value;
+
+        ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK |
+                                                 FEATURE_DPM_UCLK_MASK |
+                                                 FEATURE_DPM_SOCCLK_MASK);
         PP_ASSERT_WITH_CODE(!ret,
                         "Failed to upload DPM Bootup Levels!",
                         return ret);
 
-        ret = vega20_upload_dpm_max_level(hwmgr, 0xFFFFFFFF);
+        ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK |
+                                                 FEATURE_DPM_UCLK_MASK |
+                                                 FEATURE_DPM_SOCCLK_MASK);
         PP_ASSERT_WITH_CODE(!ret,
                         "Failed to upload DPM Max Levels!",
                         return ret);
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index a0f52c86d8c7..a78b2e295895 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -907,8 +907,6 @@ struct smu_funcs
         ((smu)->funcs->register_irq_handler ? (smu)->funcs->register_irq_handler(smu) : 0)
 #define smu_set_azalia_d3_pme(smu) \
         ((smu)->funcs->set_azalia_d3_pme ? (smu)->funcs->set_azalia_d3_pme((smu)) : 0)
-#define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \
-        ((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0)
 #define smu_get_max_sustainable_clocks_by_dc(smu, max_clocks) \
         ((smu)->funcs->get_max_sustainable_clocks_by_dc ? (smu)->funcs->get_max_sustainable_clocks_by_dc((smu), (max_clocks)) : 0)
 #define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 5fde5cf65b42..53097961bf2b 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -326,7 +326,8 @@ static int smu_v11_0_setup_pptable(struct smu_context *smu)
         struct amdgpu_device *adev = smu->adev;
         const struct smc_firmware_header_v1_0 *hdr;
         int ret, index;
-        uint32_t size;
+        uint32_t size = 0;
+        uint16_t atom_table_size;
         uint8_t frev, crev;
         void *table;
         uint16_t version_major, version_minor;
@@ -354,10 +355,11 @@ static int smu_v11_0_setup_pptable(struct smu_context *smu)
                 index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
                                                     powerplayinfo);
 
-                ret = smu_get_atom_data_table(smu, index, (uint16_t *)&size, &frev, &crev,
+                ret = smu_get_atom_data_table(smu, index, &atom_table_size, &frev, &crev,
                                               (uint8_t **)&table);
                 if (ret)
                         return ret;
+                size = atom_table_size;
         }
 
         if (!smu->smu_table.power_play_table)
diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
index dd6fd1c8bf24..6a14497257e4 100644
--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
@@ -3050,6 +3050,7 @@ static int vega20_get_fan_speed_percent(struct smu_context *smu,
 
 static int vega20_get_gpu_power(struct smu_context *smu, uint32_t *value)
 {
+        uint32_t smu_version;
         int ret = 0;
         SmuMetrics_t metrics;
 
@@ -3060,7 +3061,15 @@ static int vega20_get_gpu_power(struct smu_context *smu, uint32_t *value)
         if (ret)
                 return ret;
 
-        *value = metrics.CurrSocketPower << 8;
+        ret = smu_get_smc_version(smu, NULL, &smu_version);
+        if (ret)
+                return ret;
+
+        /* For the 40.46 release, they changed the value name */
+        if (smu_version == 0x282e00)
+                *value = metrics.AverageSocketPower << 8;
+        else
+                *value = metrics.CurrSocketPower << 8;
 
         return 0;
 }
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
index 5a118984de33..9d4d5075cc64 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -8,6 +8,7 @@
 #include <linux/iommu.h>
 #include <linux/of_device.h>
 #include <linux/of_graph.h>
+#include <linux/of_reserved_mem.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #ifdef CONFIG_DEBUG_FS
@@ -126,7 +127,7 @@ static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
         pipe->of_output_port =
                 of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT);
 
-        pipe->of_node = np;
+        pipe->of_node = of_node_get(np);
 
         return 0;
 }
@@ -143,6 +144,12 @@ static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev)
                 return mdev->irq;
         }
 
+        /* Get the optional framebuffer memory resource */
+        ret = of_reserved_mem_device_init(dev);
+        if (ret && ret != -ENODEV)
+                return ret;
+        ret = 0;
+
         for_each_available_child_of_node(np, child) {
                 if (of_node_cmp(child->name, "pipeline") == 0) {
                         ret = komeda_parse_pipe_dt(mdev, child);
@@ -289,6 +296,8 @@ void komeda_dev_destroy(struct komeda_dev *mdev)
 
         mdev->n_pipelines = 0;
 
+        of_reserved_mem_device_release(dev);
+
         if (funcs && funcs->cleanup)
                 funcs->cleanup(mdev);
 
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
index cd4d9f53ddef..c9a1edb9a000 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
@@ -35,6 +35,25 @@ komeda_get_format_caps(struct komeda_format_caps_table *table,
         return NULL;
 }
 
+u32 komeda_get_afbc_format_bpp(const struct drm_format_info *info, u64 modifier)
+{
+        u32 bpp;
+
+        switch (info->format) {
+        case DRM_FORMAT_YUV420_8BIT:
+                bpp = 12;
+                break;
+        case DRM_FORMAT_YUV420_10BIT:
+                bpp = 15;
+                break;
+        default:
+                bpp = info->cpp[0] * 8;
+                break;
+        }
+
+        return bpp;
+}
+
 /* Two assumptions
  * 1. RGB always has YTR
  * 2. Tiled RGB always has SC
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
index 3631910d33b5..32273cf18f7c 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
@@ -97,6 +97,9 @@ const struct komeda_format_caps *
 komeda_get_format_caps(struct komeda_format_caps_table *table,
                        u32 fourcc, u64 modifier);
 
+u32 komeda_get_afbc_format_bpp(const struct drm_format_info *info,
+                               u64 modifier);
+
 u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table,
                                   u32 layer_type, u32 *n_fmts);
 
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
index 3b0a70ed6aa0..1b01a625f40e 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
@@ -43,7 +43,7 @@ komeda_fb_afbc_size_check(struct komeda_fb *kfb, struct drm_file *file,
         struct drm_framebuffer *fb = &kfb->base;
         const struct drm_format_info *info = fb->format;
         struct drm_gem_object *obj;
-        u32 alignment_w = 0, alignment_h = 0, alignment_header, n_blocks;
+        u32 alignment_w = 0, alignment_h = 0, alignment_header, n_blocks, bpp;
         u64 min_size;
 
         obj = drm_gem_object_lookup(file, mode_cmd->handles[0]);
@@ -88,8 +88,9 @@ komeda_fb_afbc_size_check(struct komeda_fb *kfb, struct drm_file *file,
         kfb->offset_payload = ALIGN(n_blocks * AFBC_HEADER_SIZE,
                                     alignment_header);
 
+        bpp = komeda_get_afbc_format_bpp(info, fb->modifier);
         kfb->afbc_size = kfb->offset_payload + n_blocks *
-                         ALIGN(info->cpp[0] * AFBC_SUPERBLK_PIXELS,
+                         ALIGN(bpp * AFBC_SUPERBLK_PIXELS / 8,
                                AFBC_SUPERBLK_ALIGNMENT);
         min_size = kfb->afbc_size + fb->offsets[0];
         if (min_size > obj->size) {
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c
index 419a8b0e5de8..69d9e26c60c8 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c
@@ -14,6 +14,7 @@
 #include <drm/drm_gem_cma_helper.h>
 #include <drm/drm_gem_framebuffer_helper.h>
 #include <drm/drm_irq.h>
+#include <drm/drm_probe_helper.h>
 #include <drm/drm_vblank.h>
 
 #include "komeda_dev.h"
@@ -146,7 +147,6 @@ static int komeda_crtc_normalize_zpos(struct drm_crtc *crtc,
         struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc_st);
         struct komeda_plane_state *kplane_st;
         struct drm_plane_state *plane_st;
-        struct drm_framebuffer *fb;
         struct drm_plane *plane;
         struct list_head zorder_list;
         int order = 0, err;
@@ -172,7 +172,6 @@ static int komeda_crtc_normalize_zpos(struct drm_crtc *crtc,
 
         list_for_each_entry(kplane_st, &zorder_list, zlist_node) {
                 plane_st = &kplane_st->base;
-                fb = plane_st->fb;
                 plane = plane_st->plane;
 
                 plane_st->normalized_zpos = order++;
@@ -205,7 +204,7 @@ static int komeda_kms_check(struct drm_device *dev,
                             struct drm_atomic_state *state)
 {
         struct drm_crtc *crtc;
-        struct drm_crtc_state *old_crtc_st, *new_crtc_st;
+        struct drm_crtc_state *new_crtc_st;
         int i, err;
 
         err = drm_atomic_helper_check_modeset(dev, state);
@@ -216,7 +215,7 @@ static int komeda_kms_check(struct drm_device *dev,
          * so need to add all affected_planes (even unchanged) to
          * drm_atomic_state.
          */
-        for_each_oldnew_crtc_in_state(state, crtc, old_crtc_st, new_crtc_st, i) {
+        for_each_new_crtc_in_state(state, crtc, new_crtc_st, i) {
                 err = drm_atomic_add_affected_planes(state, crtc);
                 if (err)
                         return err;
@@ -307,24 +306,33 @@ struct komeda_kms_dev *komeda_kms_attach(struct komeda_dev *mdev)
                                komeda_kms_irq_handler, IRQF_SHARED,
                                drm->driver->name, drm);
         if (err)
-                goto cleanup_mode_config;
+                goto free_component_binding;
 
         err = mdev->funcs->enable_irq(mdev);
         if (err)
-                goto cleanup_mode_config;
+                goto free_component_binding;
 
         drm->irq_enabled = true;
 
+        drm_kms_helper_poll_init(drm);
+
         err = drm_dev_register(drm, 0);
         if (err)
-                goto cleanup_mode_config;
+                goto free_interrupts;
 
         return kms;
 
-cleanup_mode_config:
+free_interrupts:
+        drm_kms_helper_poll_fini(drm);
         drm->irq_enabled = false;
+        mdev->funcs->disable_irq(mdev);
+free_component_binding:
+        component_unbind_all(mdev->dev, drm);
+cleanup_mode_config:
         drm_mode_config_cleanup(drm);
         komeda_kms_cleanup_private_objs(kms);
+        drm->dev_private = NULL;
+        drm_dev_put(drm);
 free_kms:
         kfree(kms);
         return ERR_PTR(err);
@@ -335,12 +343,14 @@ void komeda_kms_detach(struct komeda_kms_dev *kms)
         struct drm_device *drm = &kms->base;
         struct komeda_dev *mdev = drm->dev_private;
 
+        drm_dev_unregister(drm);
+        drm_kms_helper_poll_fini(drm);
+        drm_atomic_helper_shutdown(drm);
         drm->irq_enabled = false;
         mdev->funcs->disable_irq(mdev);
-        drm_dev_unregister(drm);
         component_unbind_all(mdev->dev, drm);
-        komeda_kms_cleanup_private_objs(kms);
         drm_mode_config_cleanup(drm);
+        komeda_kms_cleanup_private_objs(kms);
         drm->dev_private = NULL;
         drm_dev_put(drm);
 }
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
index a90bcbb3cb23..14b683164544 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
@@ -480,6 +480,7 @@ void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,
                                    struct seq_file *sf);
 
 /* component APIs */
+extern __printf(10, 11)
 struct komeda_component *
 komeda_component_add(struct komeda_pipeline *pipe,
                      size_t comp_sz, u32 id, u32 hw_id,
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
index 617e1f7b8472..2851cac94d86 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
@@ -148,7 +148,7 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
         if (!kcrtc->master->wb_layer)
                 return 0;
 
-        kwb_conn = kzalloc(sizeof(*wb_conn), GFP_KERNEL);
+        kwb_conn = kzalloc(sizeof(*kwb_conn), GFP_KERNEL);
         if (!kwb_conn)
                 return -ENOMEM;
 
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 7925a176f900..1cb1fa74cfbc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1465,8 +1465,8 @@ static void ddi_dotclock_get(struct intel_crtc_state *pipe_config)
         else if (intel_crtc_has_dp_encoder(pipe_config))
                 dotclock = intel_dotclock_calculate(pipe_config->port_clock,
                                                     &pipe_config->dp_m_n);
-        else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp == 36)
-                dotclock = pipe_config->port_clock * 2 / 3;
+        else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24)
+                dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp;
         else
                 dotclock = pipe_config->port_clock;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 60652ebbdf61..18e4cba76720 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -539,7 +539,15 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
 
         intel_attach_force_audio_property(connector);
         intel_attach_broadcast_rgb_property(connector);
-        drm_connector_attach_max_bpc_property(connector, 6, 12);
+
+        /*
+         * Reuse the prop from the SST connector because we're
+         * not allowed to create new props after device registration.
+         */
+        connector->max_bpc_property =
+                intel_dp->attached_connector->base.max_bpc_property;
+        if (connector->max_bpc_property)
+                drm_connector_attach_max_bpc_property(connector, 6, 12);
 
         return connector;
 
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index ffec807b8960..f413904a3e96 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -541,7 +541,7 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
         pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |
                 DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);
         DRM_INFO("PPS2 = 0x%08x\n", pps_val);
-        if (encoder->type == INTEL_OUTPUT_EDP) {
+        if (cpu_transcoder == TRANSCODER_EDP) {
                 I915_WRITE(DSCA_PICTURE_PARAMETER_SET_2, pps_val);
                 /*
                  * If 2 VDSC instances are needed, configure PPS for second
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f62e3397d936..bac1ee94f63f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1598,6 +1598,12 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 
         pci_set_master(pdev);
 
+        /*
+         * We don't have a max segment size, so set it to the max so sg's
+         * debugging layer doesn't complain
+         */
+        dma_set_max_seg_size(&pdev->dev, UINT_MAX);
+
         /* overlay on gen2 is broken and can't address above 1G */
         if (IS_GEN(dev_priv, 2)) {
                 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(30));
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 94d3992b599d..724627afdedc 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -101,6 +101,9 @@ static struct _balloon_info_ bl_info;
 static void vgt_deballoon_space(struct i915_ggtt *ggtt,
                                 struct drm_mm_node *node)
 {
+        if (!drm_mm_node_allocated(node))
+                return;
+
         DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n",
                          node->start,
                          node->start + node->size,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1d58f7ec5d84..f11979879e7b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -829,7 +829,7 @@ struct intel_crtc_state {
 
         /*
          * Frequence the dpll for the port should run at. Differs from the
-         * adjusted dotclock e.g. for DP or 12bpc hdmi mode. This is also
+         * adjusted dotclock e.g. for DP or 10/12bpc hdmi mode. This is also
          * already multiplied by pixel_multiplier.
          */
         int port_clock;
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 95fdbd0fbcac..945bc20f1d33 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -17,6 +17,7 @@
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/pm_runtime.h>
+#include <linux/dma-mapping.h>
 
 #include "mtk_drm_crtc.h"
 #include "mtk_drm_ddp.h"
@@ -213,6 +214,7 @@ static int mtk_drm_kms_init(struct drm_device *drm)
         struct mtk_drm_private *private = drm->dev_private;
         struct platform_device *pdev;
         struct device_node *np;
+        struct device *dma_dev;
         int ret;
 
         if (!iommu_present(&platform_bus_type))
@@ -275,7 +277,29 @@ static int mtk_drm_kms_init(struct drm_device *drm)
                 goto err_component_unbind;
         }
 
-        private->dma_dev = &pdev->dev;
+        dma_dev = &pdev->dev;
+        private->dma_dev = dma_dev;
+
+        /*
+         * Configure the DMA segment size to make sure we get contiguous IOVA
+         * when importing PRIME buffers.
+         */
+        if (!dma_dev->dma_parms) {
+                private->dma_parms_allocated = true;
+                dma_dev->dma_parms =
+                        devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms),
+                                     GFP_KERNEL);
+        }
+        if (!dma_dev->dma_parms) {
+                ret = -ENOMEM;
+                goto err_component_unbind;
+        }
+
+        ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32));
+        if (ret) {
+                dev_err(dma_dev, "Failed to set DMA segment size\n");
+                goto err_unset_dma_parms;
+        }
 
         /*
          * We don't use the drm_irq_install() helpers provided by the DRM
@@ -285,13 +309,16 @@ static int mtk_drm_kms_init(struct drm_device *drm)
         drm->irq_enabled = true;
         ret = drm_vblank_init(drm, MAX_CRTC);
         if (ret < 0)
-                goto err_component_unbind;
+                goto err_unset_dma_parms;
 
         drm_kms_helper_poll_init(drm);
         drm_mode_config_reset(drm);
 
         return 0;
 
+err_unset_dma_parms:
+        if (private->dma_parms_allocated)
+                dma_dev->dma_parms = NULL;
 err_component_unbind:
         component_unbind_all(drm->dev, drm);
 err_config_cleanup:
@@ -302,9 +329,14 @@ err_config_cleanup:
 
 static void mtk_drm_kms_deinit(struct drm_device *drm)
 {
+        struct mtk_drm_private *private = drm->dev_private;
+
         drm_kms_helper_poll_fini(drm);
         drm_atomic_helper_shutdown(drm);
 
+        if (private->dma_parms_allocated)
+                private->dma_dev->dma_parms = NULL;
+
         component_unbind_all(drm->dev, drm);
         drm_mode_config_cleanup(drm);
 }
@@ -320,6 +352,18 @@ static const struct file_operations mtk_drm_fops = {
         .compat_ioctl = drm_compat_ioctl,
 };
 
+/*
+ * We need to override this because the device used to import the memory is
+ * not dev->dev, as drm_gem_prime_import() expects.
+ */
+struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
+                                                struct dma_buf *dma_buf)
+{
+        struct mtk_drm_private *private = dev->dev_private;
+
+        return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
+}
+
 static struct drm_driver mtk_drm_driver = {
         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
                            DRIVER_ATOMIC,
@@ -331,7 +375,7 @@ static struct drm_driver mtk_drm_driver = {
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
         .gem_prime_export = drm_gem_prime_export,
-        .gem_prime_import = drm_gem_prime_import,
+        .gem_prime_import = mtk_drm_gem_prime_import,
         .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
         .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
         .gem_prime_mmap = mtk_drm_gem_mmap_buf,
@@ -524,12 +568,15 @@ static int mtk_drm_probe(struct platform_device *pdev)
                         comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
                         if (!comp) {
                                 ret = -ENOMEM;
+                                of_node_put(node);
                                 goto err_node;
                         }
 
                         ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
-                        if (ret)
+                        if (ret) {
+                                of_node_put(node);
                                 goto err_node;
+                        }
 
                         private->ddp_comp[comp_id] = comp;
                 }
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index 598ff3e70446..e03fea12ff59 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -51,6 +51,8 @@ struct mtk_drm_private {
         } commit;
 
         struct drm_atomic_state *suspend_state;
+
+        bool dma_parms_allocated;
 };
 
 extern struct platform_driver mtk_ddp_driver;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
index b4e7404fe660..a11637b0f6cc 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
@@ -40,8 +40,7 @@ nvkm_i2c_aux_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                 u8 *ptr = msg->buf;
 
                 while (remaining) {
-                        u8 cnt = (remaining > 16) ? 16 : remaining;
-                        u8 cmd;
+                        u8 cnt, retries, cmd;
 
                         if (msg->flags & I2C_M_RD)
                                 cmd = 1;
@@ -51,10 +50,19 @@ nvkm_i2c_aux_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                         if (mcnt || remaining > 16)
                                 cmd |= 4; /* MOT */
 
-                        ret = aux->func->xfer(aux, true, cmd, msg->addr, ptr, &cnt);
-                        if (ret < 0) {
-                                nvkm_i2c_aux_release(aux);
-                                return ret;
+                        for (retries = 0, cnt = 0;
+                             retries < 32 && !cnt;
+                             retries++) {
+                                cnt = min_t(u8, remaining, 16);
+                                ret = aux->func->xfer(aux, true, cmd,
+                                                      msg->addr, ptr, &cnt);
+                                if (ret < 0)
+                                        goto out;
+                        }
+                        if (!cnt) {
+                                AUX_TRACE(aux, "no data after 32 retries");
+                                ret = -EIO;
+                                goto out;
                         }
 
                         ptr += cnt;
@@ -64,8 +72,10 @@ nvkm_i2c_aux_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
                 msg++;
         }
 
+        ret = num;
+out:
         nvkm_i2c_aux_release(aux);
-        return num;
+        return ret;
 }
 
 static u32
diff --git a/drivers/gpu/drm/omapdrm/dss/output.c b/drivers/gpu/drm/omapdrm/dss/output.c
index de0f882f0f7b..14b41de44ebc 100644
--- a/drivers/gpu/drm/omapdrm/dss/output.c
+++ b/drivers/gpu/drm/omapdrm/dss/output.c
@@ -4,6 +4,7 @@
  * Author: Archit Taneja <archit@ti.com>
  */
 
+#include <linux/bitops.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
@@ -20,7 +21,8 @@ int omapdss_device_init_output(struct omap_dss_device *out)
 {
         struct device_node *remote_node;
 
-        remote_node = of_graph_get_remote_node(out->dev->of_node, 0, 0);
+        remote_node = of_graph_get_remote_node(out->dev->of_node,
+                                               ffs(out->of_ports) - 1, 0);
         if (!remote_node) {
                 dev_dbg(out->dev, "failed to find video sink\n");
                 return 0;
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index 288c59dae56a..1bad0a2cc5c6 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -669,7 +669,7 @@ static int pdev_probe(struct platform_device *pdev)
         if (omapdss_is_initialized() == false)
                 return -EPROBE_DEFER;
 
-        ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
+        ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
         if (ret) {
                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
                 return ret;
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
index f33e349c4ec5..952201c6d821 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.c
+++ b/drivers/gpu/drm/qxl/qxl_drv.c
@@ -59,6 +59,11 @@ module_param_named(num_heads, qxl_num_crtc, int, 0400);
 static struct drm_driver qxl_driver;
 static struct pci_driver qxl_pci_driver;
 
+static bool is_vga(struct pci_dev *pdev)
+{
+        return pdev->class == PCI_CLASS_DISPLAY_VGA << 8;
+}
+
 static int
 qxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
@@ -83,9 +88,17 @@ qxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         if (ret)
                 goto disable_pci;
 
+        if (is_vga(pdev)) {
+                ret = vga_get_interruptible(pdev, VGA_RSRC_LEGACY_IO);
+                if (ret) {
+                        DRM_ERROR("can't get legacy vga ioports\n");
+                        goto disable_pci;
+                }
+        }
+
         ret = qxl_device_init(qdev, &qxl_driver, pdev);
         if (ret)
-                goto disable_pci;
+                goto put_vga;
 
         ret = qxl_modeset_init(qdev);
         if (ret)
@@ -105,6 +118,9 @@ modeset_cleanup:
         qxl_modeset_fini(qdev);
 unload:
         qxl_device_fini(qdev);
+put_vga:
+        if (is_vga(pdev))
+                vga_put(pdev, VGA_RSRC_LEGACY_IO);
 disable_pci:
         pci_disable_device(pdev);
 free_dev:
@@ -122,6 +138,8 @@ qxl_pci_remove(struct pci_dev *pdev)
 
         qxl_modeset_fini(qdev);
         qxl_device_fini(qdev);
+        if (is_vga(pdev))
+                vga_put(pdev, VGA_RSRC_LEGACY_IO);
 
         dev->dev_private = NULL;
         kfree(qdev);
diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c
index 1c62578590f4..082d02c84024 100644
--- a/drivers/gpu/drm/rcar-du/rcar_lvds.c
+++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c
@@ -673,10 +673,8 @@ static int rcar_lvds_parse_dt_companion(struct rcar_lvds *lvds)
 
         /* Locate the companion LVDS encoder for dual-link operation, if any. */
         companion = of_parse_phandle(dev->of_node, "renesas,companion", 0);
-        if (!companion) {
-                dev_err(dev, "Companion LVDS encoder not found\n");
-                return -ENXIO;
-        }
+        if (!companion)
+                return 0;
 
         /*
          * Sanity check: the companion encoder must have the same compatible
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 64c43ee6bd92..df0cc8f46d7b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -314,6 +314,7 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
                 /* R and B components are only 5 bits deep */
                 val |= SUN4I_TCON0_FRM_CTL_MODE_R;
                 val |= SUN4I_TCON0_FRM_CTL_MODE_B;
+                /* Fall through */
         case MEDIA_BUS_FMT_RGB666_1X18:
         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
                 /* Fall through: enable dithering */
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index a1fc8b520985..b889ad3e86e1 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -993,6 +993,7 @@ static ssize_t sun6i_dsi_transfer(struct mipi_dsi_host *host,
                         ret = sun6i_dsi_dcs_read(dsi, msg);
                         break;
                 }
+                /* Else, fall through */
 
         default:
                 ret = -EINVAL;
diff --git a/drivers/gpu/drm/virtio/virtgpu_object.c b/drivers/gpu/drm/virtio/virtgpu_object.c
index b2da31310d24..09b526518f5a 100644
--- a/drivers/gpu/drm/virtio/virtgpu_object.c
+++ b/drivers/gpu/drm/virtio/virtgpu_object.c
@@ -204,6 +204,7 @@ int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
                 .interruptible = false,
                 .no_wait_gpu = false
         };
+        size_t max_segment;
 
         /* wtf swapping */
         if (bo->pages)
@@ -215,8 +216,13 @@ int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
         if (!bo->pages)
                 goto out;
 
-        ret = sg_alloc_table_from_pages(bo->pages, pages, nr_pages, 0,
-                                        nr_pages << PAGE_SHIFT, GFP_KERNEL);
+        max_segment = virtio_max_dma_size(qdev->vdev);
+        max_segment &= PAGE_MASK;
+        if (max_segment > SCATTERLIST_MAX_SEGMENT)
+                max_segment = SCATTERLIST_MAX_SEGMENT;
+        ret = __sg_alloc_table_from_pages(bo->pages, pages, nr_pages, 0,
+                                          nr_pages << PAGE_SHIFT,
+                                          max_segment, GFP_KERNEL);
         if (ret)
                 goto out;
         return 0;