105 files changed, 665 insertions, 411 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 992f00b65be4..01c36b8d6222 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -799,6 +799,7 @@ struct amdgpu_ring {
         unsigned                cond_exe_offs;
         u64                             cond_exe_gpu_addr;
         volatile u32    *cond_exe_cpu_addr;
+        int                     vmid;
 };
 
 /*
@@ -936,7 +937,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
                     unsigned vm_id, uint64_t pd_addr,
                     uint32_t gds_base, uint32_t gds_size,
                     uint32_t gws_base, uint32_t gws_size,
-                    uint32_t oa_base, uint32_t oa_size);
+                    uint32_t oa_base, uint32_t oa_size,
+                    bool vmid_switch);
 void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
 uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr);
 int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 199f76baf22c..8943099eb135 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -696,6 +696,17 @@ static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
         return result;
 }
 
+static int amdgpu_cgs_rel_firmware(struct cgs_device *cgs_device, enum cgs_ucode_id type)
+{
+        CGS_FUNC_ADEV;
+        if ((CGS_UCODE_ID_SMU == type) || (CGS_UCODE_ID_SMU_SK == type)) {
+                release_firmware(adev->pm.fw);
+                return 0;
+        }
+        /* cannot release other firmware because they are not created by cgs */
+        return -EINVAL;
+}
+
 static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
                                         enum cgs_ucode_id type,
                                         struct cgs_firmware_info *info)
@@ -1125,6 +1136,7 @@ static const struct cgs_ops amdgpu_cgs_ops = {
         amdgpu_cgs_pm_query_clock_limits,
         amdgpu_cgs_set_camera_voltages,
         amdgpu_cgs_get_firmware_info,
+        amdgpu_cgs_rel_firmware,
         amdgpu_cgs_set_powergating_state,
         amdgpu_cgs_set_clockgating_state,
         amdgpu_cgs_get_active_displays_info,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index bb8b149786d7..964f31404f17 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -827,8 +827,10 @@ static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
  */
 static void amdgpu_atombios_fini(struct amdgpu_device *adev)
 {
-        if (adev->mode_info.atom_context)
+        if (adev->mode_info.atom_context) {
                 kfree(adev->mode_info.atom_context->scratch);
+                kfree(adev->mode_info.atom_context->iio);
+        }
         kfree(adev->mode_info.atom_context);
         adev->mode_info.atom_context = NULL;
         kfree(adev->mode_info.atom_card_info);
@@ -1325,6 +1327,11 @@ static int amdgpu_fini(struct amdgpu_device *adev)
                 adev->ip_block_status[i].valid = false;
         }
 
+        for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
+                if (adev->ip_blocks[i].funcs->late_fini)
+                        adev->ip_blocks[i].funcs->late_fini((void *)adev);
+        }
+
         return 0;
 }
 
@@ -1513,8 +1520,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
                 amdgpu_atombios_has_gpu_virtualization_table(adev);
 
         /* Post card if necessary */
-        if (!amdgpu_card_posted(adev) ||
-            adev->virtualization.supports_sr_iov) {
+        if (!amdgpu_card_posted(adev)) {
                 if (!adev->bios) {
                         dev_err(adev->dev, "Card not posted and no BIOS - ignoring\n");
                         return -EINVAL;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 34e35423b78e..7a0b1e50f293 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -122,6 +122,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
         bool skip_preamble, need_ctx_switch;
         unsigned patch_offset = ~0;
         struct amdgpu_vm *vm;
+        int vmid = 0, old_vmid = ring->vmid;
         struct fence *hwf;
         uint64_t ctx;
 
@@ -135,9 +136,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
         if (job) {
                 vm = job->vm;
                 ctx = job->ctx;
+                vmid = job->vm_id;
         } else {
                 vm = NULL;
                 ctx = 0;
+                vmid = 0;
         }
 
         if (!ring->ready) {
@@ -163,7 +166,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                 r = amdgpu_vm_flush(ring, job->vm_id, job->vm_pd_addr,
                                     job->gds_base, job->gds_size,
                                     job->gws_base, job->gws_size,
-                                    job->oa_base, job->oa_size);
+                                    job->oa_base, job->oa_size,
+                                    (ring->current_ctx == ctx) && (old_vmid != vmid));
                 if (r) {
                         amdgpu_ring_undo(ring);
                         return r;
@@ -180,7 +184,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
         need_ctx_switch = ring->current_ctx != ctx;
         for (i = 0; i < num_ibs; ++i) {
                 ib = &ibs[i];
-
                 /* drop preamble IBs if we don't have a context switch */
                 if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble)
                         continue;
@@ -188,6 +191,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                 amdgpu_ring_emit_ib(ring, ib, job ? job->vm_id : 0,
                                     need_ctx_switch);
                 need_ctx_switch = false;
+                ring->vmid = vmid;
         }
 
         if (ring->funcs->emit_hdp_invalidate)
@@ -198,6 +202,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                 dev_err(adev->dev, "failed to emit fence (%d)\n", r);
                 if (job && job->vm_id)
                         amdgpu_vm_reset_id(adev, job->vm_id);
+                ring->vmid = old_vmid;
                 amdgpu_ring_undo(ring);
                 return r;
         }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
index 6bd961fb43dc..82256558e0f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
@@ -183,13 +183,6 @@ static int amdgpu_pp_sw_fini(void *handle)
         if (ret)
                 return ret;
 
-#ifdef CONFIG_DRM_AMD_POWERPLAY
-        if (adev->pp_enabled) {
-                amdgpu_pm_sysfs_fini(adev);
-                amd_powerplay_fini(adev->powerplay.pp_handle);
-        }
-#endif
-
         return ret;
 }
 
@@ -223,6 +216,22 @@ static int amdgpu_pp_hw_fini(void *handle)
         return ret;
 }
 
+static void amdgpu_pp_late_fini(void *handle)
+{
+#ifdef CONFIG_DRM_AMD_POWERPLAY
+        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+        if (adev->pp_enabled) {
+                amdgpu_pm_sysfs_fini(adev);
+                amd_powerplay_fini(adev->powerplay.pp_handle);
+        }
+
+        if (adev->powerplay.ip_funcs->late_fini)
+                adev->powerplay.ip_funcs->late_fini(
+                          adev->powerplay.pp_handle);
+#endif
+}
+
 static int amdgpu_pp_suspend(void *handle)
 {
         int ret = 0;
@@ -311,6 +320,7 @@ const struct amd_ip_funcs amdgpu_pp_ip_funcs = {
         .sw_fini = amdgpu_pp_sw_fini,
         .hw_init = amdgpu_pp_hw_init,
         .hw_fini = amdgpu_pp_hw_fini,
+        .late_fini = amdgpu_pp_late_fini,
         .suspend = amdgpu_pp_suspend,
         .resume = amdgpu_pp_resume,
         .is_idle = amdgpu_pp_is_idle,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 3b02272db678..870f9494252c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -343,6 +343,7 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring)
         ring->ring = NULL;
         ring->ring_obj = NULL;
 
+        amdgpu_wb_free(ring->adev, ring->cond_exe_offs);
         amdgpu_wb_free(ring->adev, ring->fence_offs);
         amdgpu_wb_free(ring->adev, ring->rptr_offs);
         amdgpu_wb_free(ring->adev, ring->wptr_offs);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 8bf84efafb04..48618ee324eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -115,6 +115,7 @@ int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
                 return r;
         }
         r = amdgpu_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
+        memset(sa_manager->cpu_ptr, 0, sa_manager->size);
         amdgpu_bo_unreserve(sa_manager->bo);
         return r;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 01abfc21b4a2..e19520c4b4b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -253,19 +253,20 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev)
 {
         int r;
 
-        if (adev->uvd.vcpu_bo == NULL)
-                return 0;
+        kfree(adev->uvd.saved_bo);
 
         amd_sched_entity_fini(&adev->uvd.ring.sched, &adev->uvd.entity);
 
-        r = amdgpu_bo_reserve(adev->uvd.vcpu_bo, false);
-        if (!r) {
-                amdgpu_bo_kunmap(adev->uvd.vcpu_bo);
-                amdgpu_bo_unpin(adev->uvd.vcpu_bo);
-                amdgpu_bo_unreserve(adev->uvd.vcpu_bo);
-        }
+        if (adev->uvd.vcpu_bo) {
+                r = amdgpu_bo_reserve(adev->uvd.vcpu_bo, false);
+                if (!r) {
+                        amdgpu_bo_kunmap(adev->uvd.vcpu_bo);
+                        amdgpu_bo_unpin(adev->uvd.vcpu_bo);
+                        amdgpu_bo_unreserve(adev->uvd.vcpu_bo);
+                }
 
-        amdgpu_bo_unref(&adev->uvd.vcpu_bo);
+                amdgpu_bo_unref(&adev->uvd.vcpu_bo);
+        }
 
         amdgpu_ring_fini(&adev->uvd.ring);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 9f36ed30ba11..62a4c127620f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -298,7 +298,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
                     unsigned vm_id, uint64_t pd_addr,
                     uint32_t gds_base, uint32_t gds_size,
                     uint32_t gws_base, uint32_t gws_size,
-                    uint32_t oa_base, uint32_t oa_size)
+                    uint32_t oa_base, uint32_t oa_size,
+                    bool vmid_switch)
 {
         struct amdgpu_device *adev = ring->adev;
         struct amdgpu_vm_id *id = &adev->vm_manager.ids[vm_id];
@@ -312,8 +313,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
         int r;
 
         if (ring->funcs->emit_pipeline_sync && (
-            pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed ||
-                    ring->type == AMDGPU_RING_TYPE_COMPUTE))
+            pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed || vmid_switch))
                 amdgpu_ring_emit_pipeline_sync(ring);
 
         if (ring->funcs->emit_vm_flush &&
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index ea407db1fbcf..5ec1f1e9c983 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -6221,6 +6221,9 @@ static int ci_dpm_sw_fini(void *handle)
         ci_dpm_fini(adev);
         mutex_unlock(&adev->pm.mutex);
 
+        release_firmware(adev->pm.fw);
+        adev->pm.fw = NULL;
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index 518dca43b133..9dc4e24e31e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -66,6 +66,16 @@ MODULE_FIRMWARE("radeon/mullins_sdma1.bin");
 
 u32 amdgpu_cik_gpu_check_soft_reset(struct amdgpu_device *adev);
 
+
+static void cik_sdma_free_microcode(struct amdgpu_device *adev)
+{
+        int i;
+        for (i = 0; i < adev->sdma.num_instances; i++) {
+                        release_firmware(adev->sdma.instance[i].fw);
+                        adev->sdma.instance[i].fw = NULL;
+        }
+}
+
 /*
  * sDMA - System DMA
  * Starting with CIK, the GPU has new asynchronous
@@ -419,6 +429,8 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
                 /* Initialize the ring buffer's read and write pointers */
                 WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
                 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
+                WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);
+                WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);
 
                 /* set the wb address whether it's enabled or not */
                 WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],
@@ -446,7 +458,12 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
                 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
 
                 ring->ready = true;
+        }
+
+        cik_sdma_enable(adev, true);
 
+        for (i = 0; i < adev->sdma.num_instances; i++) {
+                ring = &adev->sdma.instance[i].ring;
                 r = amdgpu_ring_test_ring(ring);
                 if (r) {
                         ring->ready = false;
@@ -529,8 +546,8 @@ static int cik_sdma_start(struct amdgpu_device *adev)
         if (r)
                 return r;
 
-        /* unhalt the MEs */
-        cik_sdma_enable(adev, true);
+        /* halt the engine before programing */
+        cik_sdma_enable(adev, false);
 
         /* start the gfx rings and rlc compute queues */
         r = cik_sdma_gfx_resume(adev);
@@ -998,6 +1015,7 @@ static int cik_sdma_sw_fini(void *handle)
         for (i = 0; i < adev->sdma.num_instances; i++)
                 amdgpu_ring_fini(&adev->sdma.instance[i].ring);
 
+        cik_sdma_free_microcode(adev);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
index 245cabf06575..ed03b75175d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
@@ -72,6 +72,11 @@ static int fiji_dpm_sw_init(void *handle)
 
 static int fiji_dpm_sw_fini(void *handle)
 {
+        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+        release_firmware(adev->pm.fw);
+        adev->pm.fw = NULL;
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 7f18a53ab53a..8c6ad1e72f02 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -991,6 +991,22 @@ out:
         return err;
 }
 
+static void gfx_v7_0_free_microcode(struct amdgpu_device *adev)
+{
+        release_firmware(adev->gfx.pfp_fw);
+        adev->gfx.pfp_fw = NULL;
+        release_firmware(adev->gfx.me_fw);
+        adev->gfx.me_fw = NULL;
+        release_firmware(adev->gfx.ce_fw);
+        adev->gfx.ce_fw = NULL;
+        release_firmware(adev->gfx.mec_fw);
+        adev->gfx.mec_fw = NULL;
+        release_firmware(adev->gfx.mec2_fw);
+        adev->gfx.mec2_fw = NULL;
+        release_firmware(adev->gfx.rlc_fw);
+        adev->gfx.rlc_fw = NULL;
+}
+
 /**
  * gfx_v7_0_tiling_mode_table_init - init the hw tiling table
  *
@@ -4489,6 +4505,7 @@ static int gfx_v7_0_sw_fini(void *handle)
         gfx_v7_0_cp_compute_fini(adev);
         gfx_v7_0_rlc_fini(adev);
         gfx_v7_0_mec_fini(adev);
+        gfx_v7_0_free_microcode(adev);
 
         return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index f19bab68fd83..9f6f8669edc3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -836,6 +836,26 @@ err1:
         return r;
 }
 
+
+static void gfx_v8_0_free_microcode(struct amdgpu_device *adev) {
+        release_firmware(adev->gfx.pfp_fw);
+        adev->gfx.pfp_fw = NULL;
+        release_firmware(adev->gfx.me_fw);
+        adev->gfx.me_fw = NULL;
+        release_firmware(adev->gfx.ce_fw);
+        adev->gfx.ce_fw = NULL;
+        release_firmware(adev->gfx.rlc_fw);
+        adev->gfx.rlc_fw = NULL;
+        release_firmware(adev->gfx.mec_fw);
+        adev->gfx.mec_fw = NULL;
+        if ((adev->asic_type != CHIP_STONEY) &&
+            (adev->asic_type != CHIP_TOPAZ))
+                release_firmware(adev->gfx.mec2_fw);
+        adev->gfx.mec2_fw = NULL;
+
+        kfree(adev->gfx.rlc.register_list_format);
+}
+
 static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
 {
         const char *chip_name;
@@ -1983,7 +2003,7 @@ static int gfx_v8_0_sw_fini(void *handle)
 
         gfx_v8_0_rlc_fini(adev);
 
-        kfree(adev->gfx.rlc.register_list_format);
+        gfx_v8_0_free_microcode(adev);
 
         return 0;
 }
@@ -3974,11 +3994,15 @@ static int gfx_v8_0_cp_gfx_start(struct amdgpu_device *adev)
                 amdgpu_ring_write(ring, 0x3a00161a);
                 amdgpu_ring_write(ring, 0x0000002e);
                 break;
-        case CHIP_TOPAZ:
         case CHIP_CARRIZO:
                 amdgpu_ring_write(ring, 0x00000002);
                 amdgpu_ring_write(ring, 0x00000000);
                 break;
+        case CHIP_TOPAZ:
+                amdgpu_ring_write(ring, adev->gfx.config.num_rbs == 1 ?
+                                0x00000000 : 0x00000002);
+                amdgpu_ring_write(ring, 0x00000000);
+                break;
         case CHIP_STONEY:
                 amdgpu_ring_write(ring, 0x00000000);
                 amdgpu_ring_write(ring, 0x00000000);
diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c b/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
index 460bc8ad37e6..825ccd63f2dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
@@ -72,6 +72,11 @@ static int iceland_dpm_sw_init(void *handle)
 
 static int iceland_dpm_sw_fini(void *handle)
 {
+        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+        release_firmware(adev->pm.fw);
+        adev->pm.fw = NULL;
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index f4c3130d3fdb..b556bd0a8797 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -105,6 +105,15 @@ static void sdma_v2_4_init_golden_registers(struct amdgpu_device *adev)
         }
 }
 
+static void sdma_v2_4_free_microcode(struct amdgpu_device *adev)
+{
+        int i;
+        for (i = 0; i < adev->sdma.num_instances; i++) {
+                release_firmware(adev->sdma.instance[i].fw);
+                adev->sdma.instance[i].fw = NULL;
+        }
+}
+
 /**
  * sdma_v2_4_init_microcode - load ucode images from disk
  *
@@ -461,6 +470,8 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev)
                 /* Initialize the ring buffer's read and write pointers */
                 WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
                 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
+                WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);
+                WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);
 
                 /* set the wb address whether it's enabled or not */
                 WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],
@@ -489,7 +500,11 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev)
                 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
 
                 ring->ready = true;
+        }
 
+        sdma_v2_4_enable(adev, true);
+        for (i = 0; i < adev->sdma.num_instances; i++) {
+                ring = &adev->sdma.instance[i].ring;
                 r = amdgpu_ring_test_ring(ring);
                 if (r) {
                         ring->ready = false;
@@ -580,8 +595,8 @@ static int sdma_v2_4_start(struct amdgpu_device *adev)
                         return -EINVAL;
         }
 
-        /* unhalt the MEs */
-        sdma_v2_4_enable(adev, true);
+        /* halt the engine before programing */
+        sdma_v2_4_enable(adev, false);
 
         /* start the gfx rings and rlc compute queues */
         r = sdma_v2_4_gfx_resume(adev);
@@ -1012,6 +1027,7 @@ static int sdma_v2_4_sw_fini(void *handle)
         for (i = 0; i < adev->sdma.num_instances; i++)
                 amdgpu_ring_fini(&adev->sdma.instance[i].ring);
 
+        sdma_v2_4_free_microcode(adev);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 31d99b0010f7..532ea88da66a 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -236,6 +236,15 @@ static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev)
         }
 }
 
+static void sdma_v3_0_free_microcode(struct amdgpu_device *adev)
+{
+        int i;
+        for (i = 0; i < adev->sdma.num_instances; i++) {
+                release_firmware(adev->sdma.instance[i].fw);
+                adev->sdma.instance[i].fw = NULL;
+        }
+}
+
 /**
  * sdma_v3_0_init_microcode - load ucode images from disk
  *
@@ -672,6 +681,8 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
                 /* Initialize the ring buffer's read and write pointers */
                 WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
                 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
+                WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);
+                WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);
 
                 /* set the wb address whether it's enabled or not */
                 WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],
@@ -711,7 +722,15 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
                 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
 
                 ring->ready = true;
+        }
+
+        /* unhalt the MEs */
+        sdma_v3_0_enable(adev, true);
+        /* enable sdma ring preemption */
+        sdma_v3_0_ctx_switch_enable(adev, true);
 
+        for (i = 0; i < adev->sdma.num_instances; i++) {
+                ring = &adev->sdma.instance[i].ring;
                 r = amdgpu_ring_test_ring(ring);
                 if (r) {
                         ring->ready = false;
@@ -804,10 +823,9 @@ static int sdma_v3_0_start(struct amdgpu_device *adev)
                 }
         }
 
-        /* unhalt the MEs */
-        sdma_v3_0_enable(adev, true);
-        /* enable sdma ring preemption */
-        sdma_v3_0_ctx_switch_enable(adev, true);
+        /* disble sdma engine before programing it */
+        sdma_v3_0_ctx_switch_enable(adev, false);
+        sdma_v3_0_enable(adev, false);
 
         /* start the gfx rings and rlc compute queues */
         r = sdma_v3_0_gfx_resume(adev);
@@ -1247,6 +1265,7 @@ static int sdma_v3_0_sw_fini(void *handle)
         for (i = 0; i < adev->sdma.num_instances; i++)
                 amdgpu_ring_fini(&adev->sdma.instance[i].ring);
 
+        sdma_v3_0_free_microcode(adev);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c b/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
index b7615cefcac4..f06f6f4dc3a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
@@ -71,6 +71,11 @@ static int tonga_dpm_sw_init(void *handle)
 
 static int tonga_dpm_sw_fini(void *handle)
 {
+        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+        release_firmware(adev->pm.fw);
+        adev->pm.fw = NULL;
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
index 6080951d539d..afce1edbe250 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -157,6 +157,7 @@ struct amd_ip_funcs {
         int (*hw_init)(void *handle);
         /* tears down the hw state */
         int (*hw_fini)(void *handle);
+        void (*late_fini)(void *handle);
         /* handles IP specific hw/sw changes for suspend */
         int (*suspend)(void *handle);
         /* handles IP specific hw/sw changes for resume */
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h
index a461e155a160..7464daf89ca1 100644
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -581,6 +581,9 @@ typedef int (*cgs_get_firmware_info)(struct cgs_device *cgs_device,
                                      enum cgs_ucode_id type,
                                      struct cgs_firmware_info *info);
 
+typedef int (*cgs_rel_firmware)(struct cgs_device *cgs_device,
+                                         enum cgs_ucode_id type);
+
 typedef int(*cgs_set_powergating_state)(struct cgs_device *cgs_device,
                                   enum amd_ip_block_type block_type,
                                   enum amd_powergating_state state);
@@ -645,6 +648,7 @@ struct cgs_ops {
         cgs_set_camera_voltages_t set_camera_voltages;
         /* Firmware Info */
         cgs_get_firmware_info get_firmware_info;
+        cgs_rel_firmware rel_firmware;
         /* cg pg interface*/
         cgs_set_powergating_state set_powergating_state;
         cgs_set_clockgating_state set_clockgating_state;
@@ -738,6 +742,8 @@ struct cgs_device
         CGS_CALL(set_camera_voltages,dev,mask,voltages)
 #define cgs_get_firmware_info(dev, type, info)  \
         CGS_CALL(get_firmware_info, dev, type, info)
+#define cgs_rel_firmware(dev, type)     \
+        CGS_CALL(rel_firmware, dev, type)
 #define cgs_set_powergating_state(dev, block_type, state)       \
         CGS_CALL(set_powergating_state, dev, block_type, state)
 #define cgs_set_clockgating_state(dev, block_type, state)       \
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 8e345bfddb69..e629f8a9fe93 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -73,11 +73,14 @@ static int pp_sw_init(void *handle)
 
         ret = hwmgr->hwmgr_func->backend_init(hwmgr);
         if (ret)
-                goto err;
+                goto err1;
 
         pr_info("amdgpu: powerplay initialized\n");
 
         return 0;
+err1:
+        if (hwmgr->pptable_func->pptable_fini)
+                hwmgr->pptable_func->pptable_fini(hwmgr);
 err:
         pr_err("amdgpu: powerplay initialization failed\n");
         return ret;
@@ -100,6 +103,9 @@ static int pp_sw_fini(void *handle)
         if (hwmgr->hwmgr_func->backend_fini != NULL)
                 ret = hwmgr->hwmgr_func->backend_fini(hwmgr);
 
+        if (hwmgr->pptable_func->pptable_fini)
+                hwmgr->pptable_func->pptable_fini(hwmgr);
+
         return ret;
 }
 
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c b/drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c
index 46410e3c7349..fb88e4e5d625 100644
--- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c
@@ -58,9 +58,6 @@ static void pem_fini(struct pp_eventmgr *eventmgr)
         pem_unregister_interrupts(eventmgr);
 
         pem_handle_event(eventmgr, AMD_PP_EVENT_UNINITIALIZE, &event_data);
-
-        if (eventmgr != NULL)
-                kfree(eventmgr);
 }
 
 int eventmgr_init(struct pp_instance *handle)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
index 24a16e49b571..586f73276226 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
@@ -1830,7 +1830,7 @@ static uint16_t fiji_find_closest_vddci(struct pp_hwmgr *hwmgr, uint16_t vddci)
 
         PP_ASSERT_WITH_CODE(false,
                         "VDDCI is larger than max VDDCI in VDDCI Voltage Table!",
-                        return vddci_table->entries[i].value);
+                        return vddci_table->entries[i-1].value);
 }
 
 static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index 1c48917da3cf..20f20e075588 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -93,6 +93,13 @@ int hwmgr_fini(struct pp_hwmgr *hwmgr)
         if (hwmgr == NULL || hwmgr->ps == NULL)
                 return -EINVAL;
 
+        /* do hwmgr finish*/
+        kfree(hwmgr->backend);
+
+        kfree(hwmgr->start_thermal_controller.function_list);
+
+        kfree(hwmgr->set_temperature_range.function_list);
+
         kfree(hwmgr->ps);
         kfree(hwmgr);
         return 0;
@@ -462,7 +469,7 @@ uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, u
 
         PP_ASSERT_WITH_CODE(false,
                         "VDDCI is larger than max VDDCI in VDDCI Voltage Table!",
-                        return vddci_table->entries[i].value);
+                        return vddci_table->entries[i-1].value);
 }
 
 int phm_find_boot_level(void *table,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.c
index 0b99ab3ba0c5..ae96f14b827c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.c
@@ -286,7 +286,7 @@ int polaris10_populate_pm_fuses(struct pp_hwmgr *hwmgr)
 
                 if (polaris10_copy_bytes_to_smc(hwmgr->smumgr, pm_fuse_table_offset,
                                 (uint8_t *)&data->power_tune_table,
-                                sizeof(struct SMU74_Discrete_PmFuses), data->sram_end))
+                                (sizeof(struct SMU74_Discrete_PmFuses) - 92), data->sram_end))
                         PP_ASSERT_WITH_CODE(false,
                                         "Attempt to download PmFuseTable Failed!",
                                         return -EINVAL);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
index 16fed487973b..d27e8c40602a 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
@@ -2847,27 +2847,6 @@ static int tonga_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
                 }
         }
 
-        /* Initialize Vddc DPM table based on allow Vddc values.  And populate corresponding std values. */
-        for (i = 0; i < allowed_vdd_sclk_table->count; i++) {
-                data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].vddc;
-                /* tonga_hwmgr->dpm_table.VddcTable.dpm_levels[i].param1 = stdVoltageTable->entries[i].Leakage; */
-                /* param1 is for corresponding std voltage */
-                data->dpm_table.vddc_table.dpm_levels[i].enabled = 1;
-        }
-        data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count;
-
-        if (NULL != allowed_vdd_mclk_table) {
-                /* Initialize Vddci DPM table based on allow Mclk values */
-                for (i = 0; i < allowed_vdd_mclk_table->count; i++) {
-                        data->dpm_table.vdd_ci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].vddci;
-                        data->dpm_table.vdd_ci_table.dpm_levels[i].enabled = 1;
-                        data->dpm_table.mvdd_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].mvdd;
-                        data->dpm_table.mvdd_table.dpm_levels[i].enabled = 1;
-                }
-                data->dpm_table.vdd_ci_table.count = allowed_vdd_mclk_table->count;
-                data->dpm_table.mvdd_table.count = allowed_vdd_mclk_table->count;
-        }
-
         /* setup PCIE gen speed levels*/
         tonga_setup_default_pcie_tables(hwmgr);
 
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
index 10e3630ee39d..296ec7ef6d45 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
@@ -1040,48 +1040,44 @@ int tonga_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
         struct phm_ppt_v1_information *pp_table_information =
                 (struct phm_ppt_v1_information *)(hwmgr->pptable);
 
-        if (NULL != hwmgr->soft_pp_table) {
-                kfree(hwmgr->soft_pp_table);
+        if (NULL != hwmgr->soft_pp_table)
                 hwmgr->soft_pp_table = NULL;
-        }
 
-        if (NULL != pp_table_information->vdd_dep_on_sclk)
-                pp_table_information->vdd_dep_on_sclk = NULL;
+        kfree(pp_table_information->vdd_dep_on_sclk);
+        pp_table_information->vdd_dep_on_sclk = NULL;
 
-        if (NULL != pp_table_information->vdd_dep_on_mclk)
-                pp_table_information->vdd_dep_on_mclk = NULL;
+        kfree(pp_table_information->vdd_dep_on_mclk);
+        pp_table_information->vdd_dep_on_mclk = NULL;
 
-        if (NULL != pp_table_information->valid_mclk_values)
-                pp_table_information->valid_mclk_values = NULL;
+        kfree(pp_table_information->valid_mclk_values);
+        pp_table_information->valid_mclk_values = NULL;
 
-        if (NULL != pp_table_information->valid_sclk_values)
-                pp_table_information->valid_sclk_values = NULL;
+        kfree(pp_table_information->valid_sclk_values);
+        pp_table_information->valid_sclk_values = NULL;
 
-        if (NULL != pp_table_information->vddc_lookup_table)
-                pp_table_information->vddc_lookup_table = NULL;
+        kfree(pp_table_information->vddc_lookup_table);
+        pp_table_information->vddc_lookup_table = NULL;
 
-        if (NULL != pp_table_information->vddgfx_lookup_table)
-                pp_table_information->vddgfx_lookup_table = NULL;
+        kfree(pp_table_information->vddgfx_lookup_table);
+        pp_table_information->vddgfx_lookup_table = NULL;
 
-        if (NULL != pp_table_information->mm_dep_table)
-                pp_table_information->mm_dep_table = NULL;
+        kfree(pp_table_information->mm_dep_table);
+        pp_table_information->mm_dep_table = NULL;
 
-        if (NULL != pp_table_information->cac_dtp_table)
-                pp_table_information->cac_dtp_table = NULL;
+        kfree(pp_table_information->cac_dtp_table);
+        pp_table_information->cac_dtp_table = NULL;
 
-        if (NULL != hwmgr->dyn_state.cac_dtp_table)
-                hwmgr->dyn_state.cac_dtp_table = NULL;
+        kfree(hwmgr->dyn_state.cac_dtp_table);
+        hwmgr->dyn_state.cac_dtp_table = NULL;
 
-        if (NULL != pp_table_information->ppm_parameter_table)
-                pp_table_information->ppm_parameter_table = NULL;
+        kfree(pp_table_information->ppm_parameter_table);
+        pp_table_information->ppm_parameter_table = NULL;
 
-        if (NULL != pp_table_information->pcie_table)
-                pp_table_information->pcie_table = NULL;
+        kfree(pp_table_information->pcie_table);
+        pp_table_information->pcie_table = NULL;
 
-        if (NULL != hwmgr->pptable) {
-                kfree(hwmgr->pptable);
-                hwmgr->pptable = NULL;
-        }
+        kfree(hwmgr->pptable);
+        hwmgr->pptable = NULL;
 
         return result;
 }
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
index 673a75c74e18..8e52a2e82db5 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
@@ -1006,10 +1006,16 @@ static int fiji_smu_init(struct pp_smumgr *smumgr)
 
 static int fiji_smu_fini(struct pp_smumgr *smumgr)
 {
+        struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
+
+        smu_free_memory(smumgr->device, (void *)priv->header_buffer.handle);
+
         if (smumgr->backend) {
                 kfree(smumgr->backend);
                 smumgr->backend = NULL;
         }
+
+        cgs_rel_firmware(smumgr->device, CGS_UCODE_ID_SMU);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index de618ead9db8..043b6ac09d5f 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -469,6 +469,7 @@ int polaris10_smu_fini(struct pp_smumgr *smumgr)
                 kfree(smumgr->backend);
                 smumgr->backend = NULL;
         }
+        cgs_rel_firmware(smumgr->device, CGS_UCODE_ID_SMU);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
index c483baf6b4fb..0728c1e3d97a 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
@@ -81,6 +81,7 @@ int smum_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
 
 int smum_fini(struct pp_smumgr *smumgr)
 {
+        kfree(smumgr->device);
         kfree(smumgr);
         return 0;
 }
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
index 32820b680d88..b22722eabafc 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
@@ -328,10 +328,17 @@ int tonga_write_smc_sram_dword(struct pp_smumgr *smumgr,
 
 static int tonga_smu_fini(struct pp_smumgr *smumgr)
 {
+        struct tonga_smumgr *priv = (struct tonga_smumgr *)(smumgr->backend);
+
+        smu_free_memory(smumgr->device, (void *)priv->smu_buffer.handle);
+        smu_free_memory(smumgr->device, (void *)priv->header_buffer.handle);
+
         if (smumgr->backend != NULL) {
                 kfree(smumgr->backend);
                 smumgr->backend = NULL;
         }
+
+        cgs_rel_firmware(smumgr->device, CGS_UCODE_ID_SMU);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index fef1b04c2aab..0813c2f06931 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -33,8 +33,17 @@
  *
  */
 
+static void hdlcd_crtc_cleanup(struct drm_crtc *crtc)
+{
+        struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
+
+        /* stop the controller on cleanup */
+        hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);
+        drm_crtc_cleanup(crtc);
+}
+
 static const struct drm_crtc_funcs hdlcd_crtc_funcs = {
-        .destroy = drm_crtc_cleanup,
+        .destroy = hdlcd_crtc_cleanup,
         .set_config = drm_atomic_helper_set_config,
         .page_flip = drm_atomic_helper_page_flip,
         .reset = drm_atomic_helper_crtc_reset,
@@ -97,7 +106,7 @@ static void hdlcd_crtc_mode_set_nofb(struct drm_crtc *crtc)
         struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
         struct drm_display_mode *m = &crtc->state->adjusted_mode;
         struct videomode vm;
-        unsigned int polarities, line_length, err;
+        unsigned int polarities, err;
 
         vm.vfront_porch = m->crtc_vsync_start - m->crtc_vdisplay;
         vm.vback_porch = m->crtc_vtotal - m->crtc_vsync_end;
@@ -113,23 +122,18 @@ static void hdlcd_crtc_mode_set_nofb(struct drm_crtc *crtc)
         if (m->flags & DRM_MODE_FLAG_PVSYNC)
                 polarities |= HDLCD_POLARITY_VSYNC;
 
-        line_length = crtc->primary->state->fb->pitches[0];
-
         /* Allow max number of outstanding requests and largest burst size */
         hdlcd_write(hdlcd, HDLCD_REG_BUS_OPTIONS,
                     HDLCD_BUS_MAX_OUTSTAND | HDLCD_BUS_BURST_16);
 
-        hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, line_length);
-        hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_PITCH, line_length);
-        hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_COUNT, m->crtc_vdisplay - 1);
         hdlcd_write(hdlcd, HDLCD_REG_V_DATA, m->crtc_vdisplay - 1);
         hdlcd_write(hdlcd, HDLCD_REG_V_BACK_PORCH, vm.vback_porch - 1);
         hdlcd_write(hdlcd, HDLCD_REG_V_FRONT_PORCH, vm.vfront_porch - 1);
         hdlcd_write(hdlcd, HDLCD_REG_V_SYNC, vm.vsync_len - 1);
+        hdlcd_write(hdlcd, HDLCD_REG_H_DATA, m->crtc_hdisplay - 1);
         hdlcd_write(hdlcd, HDLCD_REG_H_BACK_PORCH, vm.hback_porch - 1);
         hdlcd_write(hdlcd, HDLCD_REG_H_FRONT_PORCH, vm.hfront_porch - 1);
         hdlcd_write(hdlcd, HDLCD_REG_H_SYNC, vm.hsync_len - 1);
-        hdlcd_write(hdlcd, HDLCD_REG_H_DATA, m->crtc_hdisplay - 1);
         hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities);
 
         err = hdlcd_set_pxl_fmt(crtc);
@@ -144,20 +148,19 @@ static void hdlcd_crtc_enable(struct drm_crtc *crtc)
         struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
 
         clk_prepare_enable(hdlcd->clk);
+        hdlcd_crtc_mode_set_nofb(crtc);
         hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 1);
-        drm_crtc_vblank_on(crtc);
 }
 
 static void hdlcd_crtc_disable(struct drm_crtc *crtc)
 {
         struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
 
-        if (!crtc->primary->fb)
+        if (!crtc->state->active)
                 return;
 
-        clk_disable_unprepare(hdlcd->clk);
         hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);
-        drm_crtc_vblank_off(crtc);
+        clk_disable_unprepare(hdlcd->clk);
 }
 
 static int hdlcd_crtc_atomic_check(struct drm_crtc *crtc,
@@ -179,20 +182,17 @@ static int hdlcd_crtc_atomic_check(struct drm_crtc *crtc,
 static void hdlcd_crtc_atomic_begin(struct drm_crtc *crtc,
                                     struct drm_crtc_state *state)
 {
-        struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
-        unsigned long flags;
-
-        if (crtc->state->event) {
-                struct drm_pending_vblank_event *event = crtc->state->event;
+        struct drm_pending_vblank_event *event = crtc->state->event;
 
+        if (event) {
                 crtc->state->event = NULL;
-                event->pipe = drm_crtc_index(crtc);
-
-                WARN_ON(drm_crtc_vblank_get(crtc) != 0);
 
-                spin_lock_irqsave(&crtc->dev->event_lock, flags);
-                list_add_tail(&event->base.link, &hdlcd->event_list);
-                spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
+                spin_lock_irq(&crtc->dev->event_lock);
+                if (drm_crtc_vblank_get(crtc) == 0)
+                        drm_crtc_arm_vblank_event(crtc, event);
+                else
+                        drm_crtc_send_vblank_event(crtc, event);
+                spin_unlock_irq(&crtc->dev->event_lock);
         }
 }
 
@@ -225,6 +225,15 @@ static const struct drm_crtc_helper_funcs hdlcd_crtc_helper_funcs = {
 static int hdlcd_plane_atomic_check(struct drm_plane *plane,
                                     struct drm_plane_state *state)
 {
+        u32 src_w, src_h;
+
+        src_w = state->src_w >> 16;
+        src_h = state->src_h >> 16;
+
+        /* we can't do any scaling of the plane source */
+        if ((src_w != state->crtc_w) || (src_h != state->crtc_h))
+                return -EINVAL;
+
         return 0;
 }
 
@@ -233,20 +242,31 @@ static void hdlcd_plane_atomic_update(struct drm_plane *plane,
 {
         struct hdlcd_drm_private *hdlcd;
         struct drm_gem_cma_object *gem;
+        unsigned int depth, bpp;
+        u32 src_w, src_h, dest_w, dest_h;
         dma_addr_t scanout_start;
 
-        if (!plane->state->crtc || !plane->state->fb)
+        if (!plane->state->fb)
                 return;
 
-        hdlcd = crtc_to_hdlcd_priv(plane->state->crtc);
+        drm_fb_get_bpp_depth(plane->state->fb->pixel_format, &depth, &bpp);
+        src_w = plane->state->src_w >> 16;
+        src_h = plane->state->src_h >> 16;
+        dest_w = plane->state->crtc_w;
+        dest_h = plane->state->crtc_h;
         gem = drm_fb_cma_get_gem_obj(plane->state->fb, 0);
-        scanout_start = gem->paddr;
+        scanout_start = gem->paddr + plane->state->fb->offsets[0] +
+                plane->state->crtc_y * plane->state->fb->pitches[0] +
+                plane->state->crtc_x * bpp / 8;
+
+        hdlcd = plane->dev->dev_private;
+        hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, plane->state->fb->pitches[0]);
+        hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_PITCH, plane->state->fb->pitches[0]);
+        hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_COUNT, dest_h - 1);
         hdlcd_write(hdlcd, HDLCD_REG_FB_BASE, scanout_start);
 }
 
 static const struct drm_plane_helper_funcs hdlcd_plane_helper_funcs = {
-        .prepare_fb = NULL,
-        .cleanup_fb = NULL,
         .atomic_check = hdlcd_plane_atomic_check,
         .atomic_update = hdlcd_plane_atomic_update,
 };
@@ -294,16 +314,6 @@ static struct drm_plane *hdlcd_plane_init(struct drm_device *drm)
         return plane;
 }
 
-void hdlcd_crtc_suspend(struct drm_crtc *crtc)
-{
-        hdlcd_crtc_disable(crtc);
-}
-
-void hdlcd_crtc_resume(struct drm_crtc *crtc)
-{
-        hdlcd_crtc_enable(crtc);
-}
-
 int hdlcd_setup_crtc(struct drm_device *drm)
 {
         struct hdlcd_drm_private *hdlcd = drm->dev_private;
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
index b987c63ba8d6..a6ca36f0096f 100644
--- a/drivers/gpu/drm/arm/hdlcd_drv.c
+++ b/drivers/gpu/drm/arm/hdlcd_drv.c
@@ -49,8 +49,6 @@ static int hdlcd_load(struct drm_device *drm, unsigned long flags)
         atomic_set(&hdlcd->dma_end_count, 0);
 #endif
 
-        INIT_LIST_HEAD(&hdlcd->event_list);
-
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         hdlcd->mmio = devm_ioremap_resource(drm->dev, res);
         if (IS_ERR(hdlcd->mmio)) {
@@ -84,11 +82,7 @@ static int hdlcd_load(struct drm_device *drm, unsigned long flags)
                 goto setup_fail;
         }
 
-        pm_runtime_enable(drm->dev);
-
-        pm_runtime_get_sync(drm->dev);
         ret = drm_irq_install(drm, platform_get_irq(pdev, 0));
-        pm_runtime_put_sync(drm->dev);
         if (ret < 0) {
                 DRM_ERROR("failed to install IRQ handler\n");
                 goto irq_fail;
@@ -164,24 +158,9 @@ static irqreturn_t hdlcd_irq(int irq, void *arg)
                 atomic_inc(&hdlcd->vsync_count);
 
 #endif
-        if (irq_status & HDLCD_INTERRUPT_VSYNC) {
-                bool events_sent = false;
-                unsigned long flags;
-                struct drm_pending_vblank_event *e, *t;
-
+        if (irq_status & HDLCD_INTERRUPT_VSYNC)
                 drm_crtc_handle_vblank(&hdlcd->crtc);
 
-                spin_lock_irqsave(&drm->event_lock, flags);
-                list_for_each_entry_safe(e, t, &hdlcd->event_list, base.link) {
-                        list_del(&e->base.link);
-                        drm_crtc_send_vblank_event(&hdlcd->crtc, e);
-                        events_sent = true;
-                }
-                if (events_sent)
-                        drm_crtc_vblank_put(&hdlcd->crtc);
-                spin_unlock_irqrestore(&drm->event_lock, flags);
-        }
-
         /* acknowledge interrupt(s) */
         hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status);
 
@@ -275,6 +254,7 @@ static int hdlcd_show_pxlclock(struct seq_file *m, void *arg)
 static struct drm_info_list hdlcd_debugfs_list[] = {
         { "interrupt_count", hdlcd_show_underrun_count, 0 },
         { "clocks", hdlcd_show_pxlclock, 0 },
+        { "fb", drm_fb_cma_debugfs_show, 0 },
 };
 
 static int hdlcd_debugfs_init(struct drm_minor *minor)
@@ -357,6 +337,8 @@ static int hdlcd_drm_bind(struct device *dev)
                 return -ENOMEM;
 
         drm->dev_private = hdlcd;
+        dev_set_drvdata(dev, drm);
+
         hdlcd_setup_mode_config(drm);
         ret = hdlcd_load(drm, 0);
         if (ret)
@@ -366,14 +348,18 @@ static int hdlcd_drm_bind(struct device *dev)
         if (ret)
                 goto err_unload;
 
-        dev_set_drvdata(dev, drm);
-
         ret = component_bind_all(dev, drm);
         if (ret) {
                 DRM_ERROR("Failed to bind all components\n");
                 goto err_unregister;
         }
 
+        ret = pm_runtime_set_active(dev);
+        if (ret)
+                goto err_pm_active;
+
+        pm_runtime_enable(dev);
+
         ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
         if (ret < 0) {
                 DRM_ERROR("failed to initialise vblank\n");
@@ -399,16 +385,16 @@ err_fbdev:
         drm_mode_config_cleanup(drm);
         drm_vblank_cleanup(drm);
 err_vblank:
+        pm_runtime_disable(drm->dev);
+err_pm_active:
         component_unbind_all(dev, drm);
 err_unregister:
         drm_dev_unregister(drm);
 err_unload:
-        pm_runtime_get_sync(drm->dev);
         drm_irq_uninstall(drm);
-        pm_runtime_put_sync(drm->dev);
-        pm_runtime_disable(drm->dev);
         of_reserved_mem_device_release(drm->dev);
 err_free:
+        dev_set_drvdata(dev, NULL);
         drm_dev_unref(drm);
 
         return ret;
@@ -495,30 +481,34 @@ MODULE_DEVICE_TABLE(of, hdlcd_of_match);
 static int __maybe_unused hdlcd_pm_suspend(struct device *dev)
 {
         struct drm_device *drm = dev_get_drvdata(dev);
-        struct drm_crtc *crtc;
+        struct hdlcd_drm_private *hdlcd = drm ? drm->dev_private : NULL;
 
-        if (pm_runtime_suspended(dev))
+        if (!hdlcd)
                 return 0;
 
-        drm_modeset_lock_all(drm);
-        list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
-                hdlcd_crtc_suspend(crtc);
-        drm_modeset_unlock_all(drm);
+        drm_kms_helper_poll_disable(drm);
+
+        hdlcd->state = drm_atomic_helper_suspend(drm);
+        if (IS_ERR(hdlcd->state)) {
+                drm_kms_helper_poll_enable(drm);
+                return PTR_ERR(hdlcd->state);
+        }
+
         return 0;
 }
 
 static int __maybe_unused hdlcd_pm_resume(struct device *dev)
 {
         struct drm_device *drm = dev_get_drvdata(dev);
-        struct drm_crtc *crtc;
+        struct hdlcd_drm_private *hdlcd = drm ? drm->dev_private : NULL;
 
-        if (!pm_runtime_suspended(dev))
+        if (!hdlcd)
                 return 0;
 
-        drm_modeset_lock_all(drm);
-        list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
-                hdlcd_crtc_resume(crtc);
-        drm_modeset_unlock_all(drm);
+        drm_atomic_helper_resume(drm, hdlcd->state);
+        drm_kms_helper_poll_enable(drm);
+        pm_runtime_set_active(dev);
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.h b/drivers/gpu/drm/arm/hdlcd_drv.h
index aa234784f053..e3950a071152 100644
--- a/drivers/gpu/drm/arm/hdlcd_drv.h
+++ b/drivers/gpu/drm/arm/hdlcd_drv.h
@@ -9,10 +9,9 @@ struct hdlcd_drm_private {
         void __iomem                    *mmio;
         struct clk                      *clk;
         struct drm_fbdev_cma            *fbdev;
-        struct drm_framebuffer          *fb;
-        struct list_head                event_list;
         struct drm_crtc                 crtc;
         struct drm_plane                *plane;
+        struct drm_atomic_state         *state;
 #ifdef CONFIG_DEBUG_FS
         atomic_t buffer_underrun_count;
         atomic_t bus_error_count;
@@ -36,7 +35,5 @@ static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg)
 
 int hdlcd_setup_crtc(struct drm_device *dev);
 void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
-void hdlcd_crtc_suspend(struct drm_crtc *crtc);
-void hdlcd_crtc_resume(struct drm_crtc *crtc);
 
 #endif /* __HDLCD_DRV_H__ */
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index cf23a755f777..bd12231ab0cd 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -391,12 +391,11 @@ void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
 {
         struct atmel_hlcdc_crtc_state *state;
 
-        if (crtc->state && crtc->state->mode_blob)
-                drm_property_unreference_blob(crtc->state->mode_blob);
-
         if (crtc->state) {
+                __drm_atomic_helper_crtc_destroy_state(crtc->state);
                 state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
                 kfree(state);
+                crtc->state = NULL;
         }
 
         state = kzalloc(sizeof(*state), GFP_KERNEL);
@@ -415,8 +414,9 @@ atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
                 return NULL;
 
         state = kmalloc(sizeof(*state), GFP_KERNEL);
-        if (state)
-                __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
+        if (!state)
+                return NULL;
+        __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
 
         cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
         state->output_mode = cur->output_mode;
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 3ff1ed7b33db..c204ef32df16 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -351,6 +351,8 @@ int drm_atomic_set_mode_prop_for_crtc(struct drm_crtc_state *state,
         drm_property_unreference_blob(state->mode_blob);
         state->mode_blob = NULL;
 
+        memset(&state->mode, 0, sizeof(state->mode));
+
         if (blob) {
                 if (blob->length != sizeof(struct drm_mode_modeinfo) ||
                     drm_mode_convert_umode(&state->mode,
@@ -363,7 +365,6 @@ int drm_atomic_set_mode_prop_for_crtc(struct drm_crtc_state *state,
                 DRM_DEBUG_ATOMIC("Set [MODE:%s] for CRTC state %p\n",
                                  state->mode.name, state);
         } else {
-                memset(&state->mode, 0, sizeof(state->mode));
                 state->enable = false;
                 DRM_DEBUG_ATOMIC("Set [NOMODE] for CRTC state %p\n",
                                  state);
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index d2a6d958ca76..0e3cc66aa8b7 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -2821,8 +2821,6 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
                         goto out;
                 }
 
-                drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
-
                 /*
                  * Check whether the primary plane supports the fb pixel format.
                  * Drivers not implementing the universal planes API use a
@@ -4841,7 +4839,8 @@ bool drm_property_change_valid_get(struct drm_property *property,
                 if (value == 0)
                         return true;
 
-                return _object_find(property->dev, value, property->values[0]) != NULL;
+                *ref = _object_find(property->dev, value, property->values[0]);
+                return *ref != NULL;
         }
 
         for (i = 0; i < property->num_values; i++)
diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c b/drivers/gpu/drm/drm_fb_cma_helper.c
index 172cafe11c71..5075fae3c4e2 100644
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -445,7 +445,7 @@ err_cma_destroy:
 err_fb_info_destroy:
         drm_fb_helper_release_fbi(helper);
 err_gem_free_object:
-        dev->driver->gem_free_object(&obj->base);
+        drm_gem_object_unreference_unlocked(&obj->base);
         return ret;
 }
 EXPORT_SYMBOL(drm_fbdev_cma_create_with_funcs);
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c
index e1ab008b3f08..1d6c335584ec 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -121,7 +121,7 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
         return cma_obj;
 
 error:
-        drm->driver->gem_free_object(&cma_obj->base);
+        drm_gem_object_unreference_unlocked(&cma_obj->base);
         return ERR_PTR(ret);
 }
 EXPORT_SYMBOL_GPL(drm_gem_cma_create);
@@ -162,18 +162,12 @@ drm_gem_cma_create_with_handle(struct drm_file *file_priv,
          * and handle has the id what user can see.
          */
         ret = drm_gem_handle_create(file_priv, gem_obj, handle);
-        if (ret)
-                goto err_handle_create;
-
         /* drop reference from allocate - handle holds it now. */
         drm_gem_object_unreference_unlocked(gem_obj);
+        if (ret)
+                return ERR_PTR(ret);
 
         return cma_obj;
-
-err_handle_create:
-        drm->driver->gem_free_object(gem_obj);
-
-        return ERR_PTR(ret);
 }
 
 /**
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 7def3d58da18..e5e6f504d8cc 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1518,6 +1518,8 @@ int drm_mode_convert_umode(struct drm_display_mode *out,
         if (out->status != MODE_OK)
                 goto out;
 
+        drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V);
+
         ret = 0;
 
 out:
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index 0ec1ad961e0d..dc723f7ead7d 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -42,9 +42,10 @@ static const struct regmap_config fsl_dcu_regmap_config = {
         .reg_bits = 32,
         .reg_stride = 4,
         .val_bits = 32,
-        .cache_type = REGCACHE_RBTREE,
+        .cache_type = REGCACHE_FLAT,
 
         .volatile_reg = fsl_dcu_drm_is_volatile_reg,
+        .max_register = 0x11fc,
 };
 
 static int fsl_dcu_drm_irq_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index 1f14b602882b..82656654fb21 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -97,8 +97,8 @@ static struct imx_drm_crtc *imx_drm_find_crtc(struct drm_crtc *crtc)
         return NULL;
 }
 
-int imx_drm_set_bus_format_pins(struct drm_encoder *encoder, u32 bus_format,
-                int hsync_pin, int vsync_pin)
+int imx_drm_set_bus_config(struct drm_encoder *encoder, u32 bus_format,
+                int hsync_pin, int vsync_pin, u32 bus_flags)
 {
         struct imx_drm_crtc_helper_funcs *helper;
         struct imx_drm_crtc *imx_crtc;
@@ -110,14 +110,17 @@ int imx_drm_set_bus_format_pins(struct drm_encoder *encoder, u32 bus_format,
         helper = &imx_crtc->imx_drm_helper_funcs;
         if (helper->set_interface_pix_fmt)
                 return helper->set_interface_pix_fmt(encoder->crtc,
-                                        bus_format, hsync_pin, vsync_pin);
+                                        bus_format, hsync_pin, vsync_pin,
+                                        bus_flags);
         return 0;
 }
-EXPORT_SYMBOL_GPL(imx_drm_set_bus_format_pins);
+EXPORT_SYMBOL_GPL(imx_drm_set_bus_config);
 
 int imx_drm_set_bus_format(struct drm_encoder *encoder, u32 bus_format)
 {
-        return imx_drm_set_bus_format_pins(encoder, bus_format, 2, 3);
+        return imx_drm_set_bus_config(encoder, bus_format, 2, 3,
+                                      DRM_BUS_FLAG_DE_HIGH |
+                                      DRM_BUS_FLAG_PIXDATA_NEGEDGE);
 }
 EXPORT_SYMBOL_GPL(imx_drm_set_bus_format);
 
diff --git a/drivers/gpu/drm/imx/imx-drm.h b/drivers/gpu/drm/imx/imx-drm.h
index b0241b9d1334..74320a1723b7 100644
--- a/drivers/gpu/drm/imx/imx-drm.h
+++ b/drivers/gpu/drm/imx/imx-drm.h
@@ -19,7 +19,8 @@ struct imx_drm_crtc_helper_funcs {
         int (*enable_vblank)(struct drm_crtc *crtc);
         void (*disable_vblank)(struct drm_crtc *crtc);
         int (*set_interface_pix_fmt)(struct drm_crtc *crtc,
-                        u32 bus_format, int hsync_pin, int vsync_pin);
+                        u32 bus_format, int hsync_pin, int vsync_pin,
+                        u32 bus_flags);
         const struct drm_crtc_helper_funcs *crtc_helper_funcs;
         const struct drm_crtc_funcs *crtc_funcs;
 };
@@ -41,8 +42,8 @@ void imx_drm_mode_config_init(struct drm_device *drm);
 
 struct drm_gem_cma_object *imx_drm_fb_get_obj(struct drm_framebuffer *fb);
 
-int imx_drm_set_bus_format_pins(struct drm_encoder *encoder,
-                u32 bus_format, int hsync_pin, int vsync_pin);
+int imx_drm_set_bus_config(struct drm_encoder *encoder, u32 bus_format,
+                int hsync_pin, int vsync_pin, u32 bus_flags);
 int imx_drm_set_bus_format(struct drm_encoder *encoder,
                 u32 bus_format);
 
diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index a58eee59550a..beff793bb717 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -25,6 +25,7 @@
 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
 #include <linux/of_device.h>
 #include <linux/of_graph.h>
+#include <video/of_display_timing.h>
 #include <video/of_videomode.h>
 #include <linux/regmap.h>
 #include <linux/videodev2.h>
@@ -59,6 +60,7 @@ struct imx_ldb_channel {
         struct drm_encoder encoder;
         struct drm_panel *panel;
         struct device_node *child;
+        struct i2c_adapter *ddc;
         int chno;
         void *edid;
         int edid_len;
@@ -107,6 +109,9 @@ static int imx_ldb_connector_get_modes(struct drm_connector *connector)
                         return num_modes;
         }
 
+        if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
+                imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
+
         if (imx_ldb_ch->edid) {
                 drm_mode_connector_update_edid_property(connector,
                                                         imx_ldb_ch->edid);
@@ -553,7 +558,8 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 
         for_each_child_of_node(np, child) {
                 struct imx_ldb_channel *channel;
-                struct device_node *port;
+                struct device_node *ddc_node;
+                struct device_node *ep;
 
                 ret = of_property_read_u32(child, "reg", &i);
                 if (ret || i < 0 || i > 1)
@@ -576,33 +582,54 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
                  * The output port is port@4 with an external 4-port mux or
                  * port@2 with the internal 2-port mux.
                  */
-                port = of_graph_get_port_by_id(child, imx_ldb->lvds_mux ? 4 : 2);
-                if (port) {
-                        struct device_node *endpoint, *remote;
-
-                        endpoint = of_get_child_by_name(port, "endpoint");
-                        if (endpoint) {
-                                remote = of_graph_get_remote_port_parent(endpoint);
-                                if (remote)
-                                        channel->panel = of_drm_find_panel(remote);
-                                else
-                                        return -EPROBE_DEFER;
-                                if (!channel->panel) {
-                                        dev_err(dev, "panel not found: %s\n",
-                                                remote->full_name);
-                                        return -EPROBE_DEFER;
-                                }
+                ep = of_graph_get_endpoint_by_regs(child,
+                                                   imx_ldb->lvds_mux ? 4 : 2,
+                                                   -1);
+                if (ep) {
+                        struct device_node *remote;
+
+                        remote = of_graph_get_remote_port_parent(ep);
+                        of_node_put(ep);
+                        if (remote)
+                                channel->panel = of_drm_find_panel(remote);
+                        else
+                                return -EPROBE_DEFER;
+                        of_node_put(remote);
+                        if (!channel->panel) {
+                                dev_err(dev, "panel not found: %s\n",
+                                        remote->full_name);
+                                return -EPROBE_DEFER;
                         }
                 }
 
-                edidp = of_get_property(child, "edid", &channel->edid_len);
-                if (edidp) {
-                        channel->edid = kmemdup(edidp, channel->edid_len,
-                                                GFP_KERNEL);
-                } else if (!channel->panel) {
-                        ret = of_get_drm_display_mode(child, &channel->mode, 0);
-                        if (!ret)
-                                channel->mode_valid = 1;
+                ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
+                if (ddc_node) {
+                        channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
+                        of_node_put(ddc_node);
+                        if (!channel->ddc) {
+                                dev_warn(dev, "failed to get ddc i2c adapter\n");
+                                return -EPROBE_DEFER;
+                        }
+                }
+
+                if (!channel->ddc) {
+                        /* if no DDC available, fallback to hardcoded EDID */
+                        dev_dbg(dev, "no ddc available\n");
+
+                        edidp = of_get_property(child, "edid",
+                                                &channel->edid_len);
+                        if (edidp) {
+                                channel->edid = kmemdup(edidp,
+                                                        channel->edid_len,
+                                                        GFP_KERNEL);
+                        } else if (!channel->panel) {
+                                /* fallback to display-timings node */
+                                ret = of_get_drm_display_mode(child,
+                                                              &channel->mode,
+                                                              OF_USE_NATIVE_MODE);
+                                if (!ret)
+                                        channel->mode_valid = 1;
+                        }
                 }
 
                 channel->bus_format = of_get_bus_format(dev, child);
@@ -647,6 +674,7 @@ static void imx_ldb_unbind(struct device *dev, struct device *master,
                 channel->encoder.funcs->destroy(&channel->encoder);
 
                 kfree(channel->edid);
+                i2c_put_adapter(channel->ddc);
         }
 }
 
diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c
index ae7a9fb3b8a2..baf788121287 100644
--- a/drivers/gpu/drm/imx/imx-tve.c
+++ b/drivers/gpu/drm/imx/imx-tve.c
@@ -294,8 +294,10 @@ static void imx_tve_encoder_prepare(struct drm_encoder *encoder)
 
         switch (tve->mode) {
         case TVE_MODE_VGA:
-                imx_drm_set_bus_format_pins(encoder, MEDIA_BUS_FMT_GBR888_1X24,
-                                            tve->hsync_pin, tve->vsync_pin);
+                imx_drm_set_bus_config(encoder, MEDIA_BUS_FMT_GBR888_1X24,
+                                       tve->hsync_pin, tve->vsync_pin,
+                                       DRM_BUS_FLAG_DE_HIGH |
+                                       DRM_BUS_FLAG_PIXDATA_NEGEDGE);
                 break;
         case TVE_MODE_TVOUT:
                 imx_drm_set_bus_format(encoder, MEDIA_BUS_FMT_YUV8_1X24);
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index b2c30b8d9816..fc040417e1e8 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -66,6 +66,7 @@ struct ipu_crtc {
         struct ipu_flip_work    *flip_work;
         int                     irq;
         u32                     bus_format;
+        u32                     bus_flags;
         int                     di_hsync_pin;
         int                     di_vsync_pin;
 };
@@ -271,8 +272,10 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
         else
                 sig_cfg.clkflags = 0;
 
-        sig_cfg.enable_pol = 1;
-        sig_cfg.clk_pol = 0;
+        sig_cfg.enable_pol = !(ipu_crtc->bus_flags & DRM_BUS_FLAG_DE_LOW);
+        /* Default to driving pixel data on negative clock edges */
+        sig_cfg.clk_pol = !!(ipu_crtc->bus_flags &
+                             DRM_BUS_FLAG_PIXDATA_POSEDGE);
         sig_cfg.bus_format = ipu_crtc->bus_format;
         sig_cfg.v_to_h_sync = 0;
         sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
@@ -396,11 +399,12 @@ static void ipu_disable_vblank(struct drm_crtc *crtc)
 }
 
 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc,
-                u32 bus_format, int hsync_pin, int vsync_pin)
+                u32 bus_format, int hsync_pin, int vsync_pin, u32 bus_flags)
 {
         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 
         ipu_crtc->bus_format = bus_format;
+        ipu_crtc->bus_flags = bus_flags;
         ipu_crtc->di_hsync_pin = hsync_pin;
         ipu_crtc->di_vsync_pin = vsync_pin;
 
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 681ec6eb77d9..a4bb44118d33 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -38,6 +38,8 @@ static const uint32_t ipu_plane_formats[] = {
         DRM_FORMAT_RGBX8888,
         DRM_FORMAT_BGRA8888,
         DRM_FORMAT_BGRA8888,
+        DRM_FORMAT_UYVY,
+        DRM_FORMAT_VYUY,
         DRM_FORMAT_YUYV,
         DRM_FORMAT_YVYU,
         DRM_FORMAT_YUV420,
@@ -428,7 +430,6 @@ static int ipu_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
         if (crtc != plane->crtc)
                 dev_dbg(plane->dev->dev, "crtc change: %p -> %p\n",
                                 plane->crtc, crtc);
-        plane->crtc = crtc;
 
         if (!ipu_plane->enabled)
                 ipu_plane_enable(ipu_plane);
@@ -461,7 +462,7 @@ static void ipu_plane_destroy(struct drm_plane *plane)
         kfree(ipu_plane);
 }
 
-static struct drm_plane_funcs ipu_plane_funcs = {
+static const struct drm_plane_funcs ipu_plane_funcs = {
         .update_plane   = ipu_update_plane,
         .disable_plane  = ipu_disable_plane,
         .destroy        = ipu_plane_destroy,
diff --git a/drivers/gpu/drm/imx/parallel-display.c b/drivers/gpu/drm/imx/parallel-display.c
index 363e2c7741e2..2d1fd02cd3d6 100644
--- a/drivers/gpu/drm/imx/parallel-display.c
+++ b/drivers/gpu/drm/imx/parallel-display.c
@@ -35,7 +35,6 @@ struct imx_parallel_display {
         void *edid;
         int edid_len;
         u32 bus_format;
-        int mode_valid;
         struct drm_display_mode mode;
         struct drm_panel *panel;
 };
@@ -68,17 +67,6 @@ static int imx_pd_connector_get_modes(struct drm_connector *connector)
                 num_modes = drm_add_edid_modes(connector, imxpd->edid);
         }
 
-        if (imxpd->mode_valid) {
-                struct drm_display_mode *mode = drm_mode_create(connector->dev);
-
-                if (!mode)
-                        return -EINVAL;
-                drm_mode_copy(mode, &imxpd->mode);
-                mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
-                drm_mode_probed_add(connector, mode);
-                num_modes++;
-        }
-
         if (np) {
                 struct drm_display_mode *mode = drm_mode_create(connector->dev);
 
@@ -115,8 +103,8 @@ static void imx_pd_encoder_dpms(struct drm_encoder *encoder, int mode)
 static void imx_pd_encoder_prepare(struct drm_encoder *encoder)
 {
         struct imx_parallel_display *imxpd = enc_to_imxpd(encoder);
-
-        imx_drm_set_bus_format(encoder, imxpd->bus_format);
+        imx_drm_set_bus_config(encoder, imxpd->bus_format, 2, 3,
+                               imxpd->connector.display_info.bus_flags);
 }
 
 static void imx_pd_encoder_commit(struct drm_encoder *encoder)
@@ -203,7 +191,7 @@ static int imx_pd_bind(struct device *dev, struct device *master, void *data)
 {
         struct drm_device *drm = data;
         struct device_node *np = dev->of_node;
-        struct device_node *port;
+        struct device_node *ep;
         const u8 *edidp;
         struct imx_parallel_display *imxpd;
         int ret;
@@ -230,18 +218,18 @@ static int imx_pd_bind(struct device *dev, struct device *master, void *data)
         }
 
         /* port@1 is the output port */
-        port = of_graph_get_port_by_id(np, 1);
-        if (port) {
-                struct device_node *endpoint, *remote;
-
-                endpoint = of_get_child_by_name(port, "endpoint");
-                if (endpoint) {
-                        remote = of_graph_get_remote_port_parent(endpoint);
-                        if (remote)
-                                imxpd->panel = of_drm_find_panel(remote);
-                        if (!imxpd->panel)
-                                return -EPROBE_DEFER;
+        ep = of_graph_get_endpoint_by_regs(np, 1, -1);
+        if (ep) {
+                struct device_node *remote;
+
+                remote = of_graph_get_remote_port_parent(ep);
+                of_node_put(ep);
+                if (remote) {
+                        imxpd->panel = of_drm_find_panel(remote);
+                        of_node_put(remote);
                 }
+                if (!imxpd->panel)
+                        return -EPROBE_DEFER;
         }
 
         imxpd->dev = dev;
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index d05ca7901315..0186e500d2a5 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -432,11 +432,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
         unsigned long pll_rate;
         unsigned int factor;
 
-        if (!dpi) {
-                dev_err(dpi->dev, "invalid argument\n");
-                return -EINVAL;
-        }
-
         pix_rate = 1000UL * mode->clock;
         if (mode->clock <= 74000)
                 factor = 8 * 3;
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 2d808e59fefd..769559124562 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -695,10 +695,8 @@ static void mtk_dsi_destroy_conn_enc(struct mtk_dsi *dsi)
 {
         drm_encoder_cleanup(&dsi->encoder);
         /* Skip connector cleanup if creation was delegated to the bridge */
-        if (dsi->conn.dev) {
-                drm_connector_unregister(&dsi->conn);
+        if (dsi->conn.dev)
                 drm_connector_cleanup(&dsi->conn);
-        }
 }
 
 static void mtk_dsi_ddp_start(struct mtk_ddp_comp *comp)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 14e64e08909e..d347dca17267 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -182,7 +182,7 @@ static int mga_g200se_set_plls(struct mga_device *mdev, long clock)
                         }
                 }
 
-                fvv = pllreffreq * testn / testm;
+                fvv = pllreffreq * (n + 1) / (m + 1);
                 fvv = (fvv - 800000) / 50000;
 
                 if (fvv > 15)
@@ -202,6 +202,14 @@ static int mga_g200se_set_plls(struct mga_device *mdev, long clock)
         WREG_DAC(MGA1064_PIX_PLLC_M, m);
         WREG_DAC(MGA1064_PIX_PLLC_N, n);
         WREG_DAC(MGA1064_PIX_PLLC_P, p);
+
+        if (mdev->unique_rev_id >= 0x04) {
+                WREG_DAC(0x1a, 0x09);
+                msleep(20);
+                WREG_DAC(0x1a, 0x01);
+
+        }
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index fbe304ee6c80..2aec27dbb5bb 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -408,7 +408,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
         }
 
         adreno_gpu->memptrs = msm_gem_vaddr(adreno_gpu->memptrs_bo);
-        if (!adreno_gpu->memptrs) {
+        if (IS_ERR(adreno_gpu->memptrs)) {
                 dev_err(drm->dev, "could not vmap memptrs\n");
                 return -ENOMEM;
         }
diff --git a/drivers/gpu/drm/msm/msm_fbdev.c b/drivers/gpu/drm/msm/msm_fbdev.c
index d9759bf3482e..c6cf837c5193 100644
--- a/drivers/gpu/drm/msm/msm_fbdev.c
+++ b/drivers/gpu/drm/msm/msm_fbdev.c
@@ -159,6 +159,10 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
         dev->mode_config.fb_base = paddr;
 
         fbi->screen_base = msm_gem_vaddr_locked(fbdev->bo);
+        if (IS_ERR(fbi->screen_base)) {
+                ret = PTR_ERR(fbi->screen_base);
+                goto fail_unlock;
+        }
         fbi->screen_size = fbdev->bo->size;
         fbi->fix.smem_start = paddr;
         fbi->fix.smem_len = fbdev->bo->size;
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 7daf4054dd2b..69836f5685b1 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -398,6 +398,8 @@ void *msm_gem_vaddr_locked(struct drm_gem_object *obj)
                         return ERR_CAST(pages);
                 msm_obj->vaddr = vmap(pages, obj->size >> PAGE_SHIFT,
                                 VM_MAP, pgprot_writecombine(PAGE_KERNEL));
+                if (msm_obj->vaddr == NULL)
+                        return ERR_PTR(-ENOMEM);
         }
         return msm_obj->vaddr;
 }
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c
index b89ca5174863..eb4bb8b2f3a5 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -40,12 +40,14 @@ static struct msm_gem_submit *submit_create(struct drm_device *dev,
 
         submit->dev = dev;
         submit->gpu = gpu;
+        submit->fence = NULL;
         submit->pid = get_pid(task_pid(current));
 
         /* initially, until copy_from_user() and bo lookup succeeds: */
         submit->nr_bos = 0;
         submit->nr_cmds = 0;
 
+        INIT_LIST_HEAD(&submit->node);
         INIT_LIST_HEAD(&submit->bo_list);
         ww_acquire_init(&submit->ticket, &reservation_ww_class);
 
@@ -75,6 +77,11 @@ static int submit_lookup_objects(struct msm_gem_submit *submit,
                 void __user *userptr =
                         u64_to_user_ptr(args->bos + (i * sizeof(submit_bo)));
 
+                /* make sure we don't have garbage flags, in case we hit
+                 * error path before flags is initialized:
+                 */
+                submit->bos[i].flags = 0;
+
                 ret = copy_from_user(&submit_bo, userptr, sizeof(submit_bo));
                 if (ret) {
                         ret = -EFAULT;
diff --git a/drivers/gpu/drm/msm/msm_rd.c b/drivers/gpu/drm/msm/msm_rd.c
index b48f73ac6389..0857710c2ff2 100644
--- a/drivers/gpu/drm/msm/msm_rd.c
+++ b/drivers/gpu/drm/msm/msm_rd.c
@@ -312,6 +312,9 @@ void msm_rd_dump_submit(struct msm_gem_submit *submit)
                 struct msm_gem_object *obj = submit->bos[idx].obj;
                 const char *buf = msm_gem_vaddr_locked(&obj->base);
 
+                if (IS_ERR(buf))
+                        continue;
+
                 buf += iova - submit->bos[idx].iova;
 
                 rd_write_section(rd, RD_GPUADDR,
diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/msm_ringbuffer.c
index 1f14b908b221..42f5359cf988 100644
--- a/drivers/gpu/drm/msm/msm_ringbuffer.c
+++ b/drivers/gpu/drm/msm/msm_ringbuffer.c
@@ -40,6 +40,10 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size)
         }
 
         ring->start = msm_gem_vaddr_locked(ring->bo);
+        if (IS_ERR(ring->start)) {
+                ret = PTR_ERR(ring->start);
+                goto fail;
+        }
         ring->end   = ring->start + (size / 4);
         ring->cur   = ring->start;
 
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
index c612dc1f1eb4..126a85cc81bc 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
@@ -16,9 +16,9 @@ enum nvkm_devidx {
         NVKM_SUBDEV_MC,
         NVKM_SUBDEV_BUS,
         NVKM_SUBDEV_TIMER,
+        NVKM_SUBDEV_INSTMEM,
         NVKM_SUBDEV_FB,
         NVKM_SUBDEV_LTC,
-        NVKM_SUBDEV_INSTMEM,
         NVKM_SUBDEV_MMU,
         NVKM_SUBDEV_BAR,
         NVKM_SUBDEV_PMU,
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h
index db10c11f0595..c5a6ebd5a478 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h
@@ -25,7 +25,8 @@ u16 nvbios_outp_match(struct nvkm_bios *, u16 type, u16 mask,
                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
 
 struct nvbios_ocfg {
-        u16 match;
+        u8  proto;
+        u8  flags;
         u16 clkcmp[2];
 };
 
@@ -33,7 +34,7 @@ u16 nvbios_ocfg_entry(struct nvkm_bios *, u16 outp, u8 idx,
                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
 u16 nvbios_ocfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
-u16 nvbios_ocfg_match(struct nvkm_bios *, u16 outp, u16 type,
+u16 nvbios_ocfg_match(struct nvkm_bios *, u16 outp, u8 proto, u8 flags,
                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
 u16 nvbios_oclk_match(struct nvkm_bios *, u16 cmp, u32 khz);
 #endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 57aaf98a26f9..300ea03be8f0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -552,6 +552,7 @@ nouveau_fbcon_init(struct drm_device *dev)
         if (ret)
                 goto fini;
 
+        fbcon->helper.fbdev->pixmap.buf_align = 4;
         return 0;
 
 fini:
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 0f3e4bb411cc..7d9248b8c664 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -82,7 +82,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         uint32_t fg;
         uint32_t bg;
         uint32_t dsize;
-        uint32_t width;
         uint32_t *data = (uint32_t *)image->data;
         int ret;
 
@@ -93,9 +92,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         if (ret)
                 return ret;
 
-        width = ALIGN(image->width, 8);
-        dsize = ALIGN(width * image->height, 32) >> 5;
-
         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
             info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
                 fg = ((uint32_t *) info->pseudo_palette)[image->fg_color];
@@ -111,10 +107,11 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
                          ((image->dx + image->width) & 0xffff));
         OUT_RING(chan, bg);
         OUT_RING(chan, fg);
-        OUT_RING(chan, (image->height << 16) | width);
+        OUT_RING(chan, (image->height << 16) | image->width);
         OUT_RING(chan, (image->height << 16) | image->width);
         OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
 
+        dsize = ALIGN(image->width * image->height, 32) >> 5;
         while (dsize) {
                 int iter_len = dsize > 128 ? 128 : dsize;
 
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 33d9ee0fac40..1aeb698e9707 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -95,7 +95,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         struct nouveau_fbdev *nfbdev = info->par;
         struct nouveau_drm *drm = nouveau_drm(nfbdev->dev);
         struct nouveau_channel *chan = drm->channel;
-        uint32_t width, dwords, *data = (uint32_t *)image->data;
+        uint32_t dwords, *data = (uint32_t *)image->data;
         uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
         uint32_t *palette = info->pseudo_palette;
         int ret;
@@ -107,9 +107,6 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         if (ret)
                 return ret;
 
-        width = ALIGN(image->width, 32);
-        dwords = (width * image->height) >> 5;
-
         BEGIN_NV04(chan, NvSub2D, 0x0814, 2);
         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
             info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
@@ -128,6 +125,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         OUT_RING(chan, 0);
         OUT_RING(chan, image->dy);
 
+        dwords = ALIGN(image->width * image->height, 32) >> 5;
         while (dwords) {
                 int push = dwords > 2047 ? 2047 : dwords;
 
diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
index a0913359ac05..839f4c8c1805 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
@@ -95,7 +95,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         struct nouveau_fbdev *nfbdev = info->par;
         struct nouveau_drm *drm = nouveau_drm(nfbdev->dev);
         struct nouveau_channel *chan = drm->channel;
-        uint32_t width, dwords, *data = (uint32_t *)image->data;
+        uint32_t dwords, *data = (uint32_t *)image->data;
         uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
         uint32_t *palette = info->pseudo_palette;
         int ret;
@@ -107,9 +107,6 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         if (ret)
                 return ret;
 
-        width = ALIGN(image->width, 32);
-        dwords = (width * image->height) >> 5;
-
         BEGIN_NVC0(chan, NvSub2D, 0x0814, 2);
         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
             info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
@@ -128,6 +125,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         OUT_RING  (chan, 0);
         OUT_RING  (chan, image->dy);
 
+        dwords = ALIGN(image->width * image->height, 32) >> 5;
         while (dwords) {
                 int push = dwords > 2047 ? 2047 : dwords;
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
index a74c5dd27dc0..e2a64ed14b22 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
@@ -18,6 +18,7 @@ nvkm-y += nvkm/engine/disp/piornv50.o
 nvkm-y += nvkm/engine/disp/sornv50.o
 nvkm-y += nvkm/engine/disp/sorg94.o
 nvkm-y += nvkm/engine/disp/sorgf119.o
+nvkm-y += nvkm/engine/disp/sorgm107.o
 nvkm-y += nvkm/engine/disp/sorgm200.o
 nvkm-y += nvkm/engine/disp/dport.o
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
index f0314664349c..5dd34382f55a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
@@ -76,6 +76,7 @@ exec_lookup(struct nv50_disp *disp, int head, int or, u32 ctrl,
         mask |= 0x0001 << or;
         mask |= 0x0100 << head;
 
+
         list_for_each_entry(outp, &disp->base.outp, head) {
                 if ((outp->info.hasht & 0xff) == type &&
                     (outp->info.hashm & mask) == mask) {
@@ -155,25 +156,21 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf)
         if (!outp)
                 return NULL;
 
+        *conf = (ctrl & 0x00000f00) >> 8;
         switch (outp->info.type) {
         case DCB_OUTPUT_TMDS:
-                *conf = (ctrl & 0x00000f00) >> 8;
                 if (*conf == 5)
                         *conf |= 0x0100;
                 break;
         case DCB_OUTPUT_LVDS:
-                *conf = disp->sor.lvdsconf;
-                break;
-        case DCB_OUTPUT_DP:
-                *conf = (ctrl & 0x00000f00) >> 8;
+                *conf |= disp->sor.lvdsconf;
                 break;
-        case DCB_OUTPUT_ANALOG:
         default:
-                *conf = 0x00ff;
                 break;
         }
 
-        data = nvbios_ocfg_match(bios, data, *conf, &ver, &hdr, &cnt, &len, &info2);
+        data = nvbios_ocfg_match(bios, data, *conf & 0xff, *conf >> 8,
+                                 &ver, &hdr, &cnt, &len, &info2);
         if (data && id < 0xff) {
                 data = nvbios_oclk_match(bios, info2.clkcmp[id], pclk);
                 if (data) {
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
index b6944142d616..f4b9cf8574be 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
@@ -36,7 +36,7 @@ gm107_disp = {
         .outp.internal.crt = nv50_dac_output_new,
         .outp.internal.tmds = nv50_sor_output_new,
         .outp.internal.lvds = nv50_sor_output_new,
-        .outp.internal.dp = gf119_sor_dp_new,
+        .outp.internal.dp = gm107_sor_dp_new,
         .dac.nr = 3,
         .dac.power = nv50_dac_power,
         .dac.sense = nv50_dac_sense,
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
index 4226d2153b9c..fcb1b0c46d64 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
@@ -387,22 +387,17 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf)
         if (!outp)
                 return NULL;
 
+        *conf = (ctrl & 0x00000f00) >> 8;
         if (outp->info.location == 0) {
                 switch (outp->info.type) {
                 case DCB_OUTPUT_TMDS:
-                        *conf = (ctrl & 0x00000f00) >> 8;
                         if (*conf == 5)
                                 *conf |= 0x0100;
                         break;
                 case DCB_OUTPUT_LVDS:
-                        *conf = disp->sor.lvdsconf;
+                        *conf |= disp->sor.lvdsconf;
                         break;
-                case DCB_OUTPUT_DP:
-                        *conf = (ctrl & 0x00000f00) >> 8;
-                        break;
-                case DCB_OUTPUT_ANALOG:
                 default:
-                        *conf = 0x00ff;
                         break;
                 }
         } else {
@@ -410,7 +405,8 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf)
                 pclk = pclk / 2;
         }
 
-        data = nvbios_ocfg_match(bios, data, *conf, &ver, &hdr, &cnt, &len, &info2);
+        data = nvbios_ocfg_match(bios, data, *conf & 0xff, *conf >> 8,
+                                 &ver, &hdr, &cnt, &len, &info2);
         if (data && id < 0xff) {
                 data = nvbios_oclk_match(bios, info2.clkcmp[id], pclk);
                 if (data) {
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h
index e9067ba4e179..4e983f6d7032 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h
@@ -62,7 +62,12 @@ int g94_sor_dp_lnk_pwr(struct nvkm_output_dp *, int);
 int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
                      struct nvkm_output **);
 int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool);
+int gf119_sor_dp_drv_ctl(struct nvkm_output_dp *, int, int, int, int);
 
-int  gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
-                      struct nvkm_output **);
+int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
+                     struct nvkm_output **);
+int gm107_sor_dp_pattern(struct nvkm_output_dp *, int);
+
+int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
+                     struct nvkm_output **);
 #endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
index b4b41b135643..22706c0a54b5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
@@ -40,8 +40,7 @@ static int
 gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
 {
         struct nvkm_device *device = outp->base.disp->engine.subdev.device;
-        const u32 loff = gf119_sor_loff(outp);
-        nvkm_mask(device, 0x61c110 + loff, 0x0f0f0f0f, 0x01010101 * pattern);
+        nvkm_mask(device, 0x61c110, 0x0f0f0f0f, 0x01010101 * pattern);
         return 0;
 }
 
@@ -64,7 +63,7 @@ gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)
         return 0;
 }
 
-static int
+int
 gf119_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
                      int ln, int vs, int pe, int pc)
 {
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
new file mode 100644
index 000000000000..37790b2617c5
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "nv50.h"
+#include "outpdp.h"
+
+int
+gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
+{
+        struct nvkm_device *device = outp->base.disp->engine.subdev.device;
+        const u32 soff = outp->base.or * 0x800;
+        const u32 data = 0x01010101 * pattern;
+        if (outp->base.info.sorconf.link & 1)
+                nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
+        else
+                nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
+        return 0;
+}
+
+static const struct nvkm_output_dp_func
+gm107_sor_dp_func = {
+        .pattern = gm107_sor_dp_pattern,
+        .lnk_pwr = g94_sor_dp_lnk_pwr,
+        .lnk_ctl = gf119_sor_dp_lnk_ctl,
+        .drv_ctl = gf119_sor_dp_drv_ctl,
+};
+
+int
+gm107_sor_dp_new(struct nvkm_disp *disp, int index,
+                 struct dcb_output *dcbE, struct nvkm_output **poutp)
+{
+        return nvkm_output_dp_new_(&gm107_sor_dp_func, disp, index, dcbE, poutp);
+}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
index 2cfbef9c344f..c44fa7ea672a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
@@ -57,19 +57,6 @@ gm200_sor_dp_lane_map(struct nvkm_device *device, u8 lane)
 }
 
 static int
-gm200_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
-{
-        struct nvkm_device *device = outp->base.disp->engine.subdev.device;
-        const u32 soff = gm200_sor_soff(outp);
-        const u32 data = 0x01010101 * pattern;
-        if (outp->base.info.sorconf.link & 1)
-                nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
-        else
-                nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
-        return 0;
-}
-
-static int
 gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 {
         struct nvkm_device *device = outp->base.disp->engine.subdev.device;
@@ -129,7 +116,7 @@ gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
 
 static const struct nvkm_output_dp_func
 gm200_sor_dp_func = {
-        .pattern = gm200_sor_dp_pattern,
+        .pattern = gm107_sor_dp_pattern,
         .lnk_pwr = gm200_sor_dp_lnk_pwr,
         .lnk_ctl = gf119_sor_dp_lnk_ctl,
         .drv_ctl = gm200_sor_dp_drv_ctl,
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
index 9513badb8220..ae9ab5b1ab97 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -949,22 +949,41 @@ gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc)
 }
 
 static const struct nvkm_enum gf100_mp_warp_error[] = {
-        { 0x00, "NO_ERROR" },
-        { 0x01, "STACK_MISMATCH" },
+        { 0x01, "STACK_ERROR" },
+        { 0x02, "API_STACK_ERROR" },
+        { 0x03, "RET_EMPTY_STACK_ERROR" },
+        { 0x04, "PC_WRAP" },
         { 0x05, "MISALIGNED_PC" },
-        { 0x08, "MISALIGNED_GPR" },
-        { 0x09, "INVALID_OPCODE" },
-        { 0x0d, "GPR_OUT_OF_BOUNDS" },
-        { 0x0e, "MEM_OUT_OF_BOUNDS" },
-        { 0x0f, "UNALIGNED_MEM_ACCESS" },
+        { 0x06, "PC_OVERFLOW" },
+        { 0x07, "MISALIGNED_IMMC_ADDR" },
+        { 0x08, "MISALIGNED_REG" },
+        { 0x09, "ILLEGAL_INSTR_ENCODING" },
+        { 0x0a, "ILLEGAL_SPH_INSTR_COMBO" },
+        { 0x0b, "ILLEGAL_INSTR_PARAM" },
+        { 0x0c, "INVALID_CONST_ADDR" },
+        { 0x0d, "OOR_REG" },
+        { 0x0e, "OOR_ADDR" },
+        { 0x0f, "MISALIGNED_ADDR" },
         { 0x10, "INVALID_ADDR_SPACE" },
-        { 0x11, "INVALID_PARAM" },
+        { 0x11, "ILLEGAL_INSTR_PARAM2" },
+        { 0x12, "INVALID_CONST_ADDR_LDC" },
+        { 0x13, "GEOMETRY_SM_ERROR" },
+        { 0x14, "DIVERGENT" },
+        { 0x15, "WARP_EXIT" },
         {}
 };
 
 static const struct nvkm_bitfield gf100_mp_global_error[] = {
+        { 0x00000001, "SM_TO_SM_FAULT" },
+        { 0x00000002, "L1_ERROR" },
         { 0x00000004, "MULTIPLE_WARP_ERRORS" },
-        { 0x00000008, "OUT_OF_STACK_SPACE" },
+        { 0x00000008, "PHYSICAL_STACK_OVERFLOW" },
+        { 0x00000010, "BPT_INT" },
+        { 0x00000020, "BPT_PAUSE" },
+        { 0x00000040, "SINGLE_STEP_COMPLETE" },
+        { 0x20000000, "ECC_SEC_ERROR" },
+        { 0x40000000, "ECC_DED_ERROR" },
+        { 0x80000000, "TIMEOUT" },
         {}
 };
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c
index a5e92135cd77..9efb1b48cd54 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c
@@ -141,7 +141,8 @@ nvbios_ocfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx,
 {
         u16 data = nvbios_ocfg_entry(bios, outp, idx, ver, hdr, cnt, len);
         if (data) {
-                info->match     = nvbios_rd16(bios, data + 0x00);
+                info->proto     = nvbios_rd08(bios, data + 0x00);
+                info->flags     = nvbios_rd16(bios, data + 0x01);
                 info->clkcmp[0] = nvbios_rd16(bios, data + 0x02);
                 info->clkcmp[1] = nvbios_rd16(bios, data + 0x04);
         }
@@ -149,12 +150,13 @@ nvbios_ocfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx,
 }
 
 u16
-nvbios_ocfg_match(struct nvkm_bios *bios, u16 outp, u16 type,
+nvbios_ocfg_match(struct nvkm_bios *bios, u16 outp, u8 proto, u8 flags,
                   u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *info)
 {
         u16 data, idx = 0;
         while ((data = nvbios_ocfg_parse(bios, outp, idx++, ver, hdr, cnt, len, info))) {
-                if (info->match == type)
+                if ((info->proto == proto || info->proto == 0xff) &&
+                    (info->flags == flags))
                         break;
         }
         return data;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c
index e292f5679418..389fb13a1998 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c
@@ -69,11 +69,11 @@ gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth)
 }
 
 static void
-gm107_ltc_lts_isr(struct nvkm_ltc *ltc, int c, int s)
+gm107_ltc_intr_lts(struct nvkm_ltc *ltc, int c, int s)
 {
         struct nvkm_subdev *subdev = &ltc->subdev;
         struct nvkm_device *device = subdev->device;
-        u32 base = 0x140000 + (c * 0x2000) + (s * 0x200);
+        u32 base = 0x140400 + (c * 0x2000) + (s * 0x200);
         u32 stat = nvkm_rd32(device, base + 0x00c);
 
         if (stat) {
@@ -92,7 +92,7 @@ gm107_ltc_intr(struct nvkm_ltc *ltc)
         while (mask) {
                 u32 s, c = __ffs(mask);
                 for (s = 0; s < ltc->lts_nr; s++)
-                        gm107_ltc_lts_isr(ltc, c, s);
+                        gm107_ltc_intr_lts(ltc, c, s);
                 mask &= ~(1 << c);
         }
 }
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c
index 2a29bfd5125a..e18e0dc19ec8 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c
@@ -46,7 +46,7 @@ static const struct nvkm_ltc_func
 gm200_ltc = {
         .oneinit = gm200_ltc_oneinit,
         .init = gm200_ltc_init,
-        .intr = gm107_ltc_intr, /*XXX: not validated */
+        .intr = gm107_ltc_intr,
         .cbc_clear = gm107_ltc_cbc_clear,
         .cbc_wait = gm107_ltc_cbc_wait,
         .zbc = 16,
diff --git a/drivers/gpu/drm/omapdrm/Kconfig b/drivers/gpu/drm/omapdrm/Kconfig
index 73241c4eb7aa..336ad4de9981 100644
--- a/drivers/gpu/drm/omapdrm/Kconfig
+++ b/drivers/gpu/drm/omapdrm/Kconfig
@@ -2,6 +2,7 @@ config DRM_OMAP
         tristate "OMAP DRM"
         depends on DRM
         depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM
+        select OMAP2_DSS
         select DRM_KMS_HELPER
         select DRM_KMS_FB_HELPER
         select FB_SYS_FILLRECT
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 225fd8d6ab31..667ca4a24ece 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -9,6 +9,7 @@
  * the Free Software Foundation.
  */
 
+#include <linux/gpio/consumer.h>
 #include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/encoder-opa362.c b/drivers/gpu/drm/omapdrm/displays/encoder-opa362.c
index 8c246c213e06..9594ff7a2b0c 100644
--- a/drivers/gpu/drm/omapdrm/displays/encoder-opa362.c
+++ b/drivers/gpu/drm/omapdrm/displays/encoder-opa362.c
@@ -14,7 +14,7 @@
  * the Free Software Foundation.
  */
 
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
index 2fd5602880a7..671806ca7d6a 100644
--- a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
+++ b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
@@ -9,7 +9,7 @@
  * the Free Software Foundation.
  */
 
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
index e780fd4f8b46..7c2331be8d15 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
@@ -9,7 +9,7 @@
  * the Free Software Foundation.
  */
 
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index 36485c2137ce..2b118071b5a1 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -14,7 +14,7 @@
 #include <linux/backlight.h>
 #include <linux/delay.h>
 #include <linux/fb.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/interrupt.h>
 #include <linux/jiffies.h>
 #include <linux/module.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 458f77bc473d..ac680e1de603 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -15,6 +15,7 @@
 #include <linux/spi/spi.h>
 #include <linux/mutex.h>
 #include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 
 #include <video/omapdss.h>
 #include <video/omap-panel-data.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index 780cb263a318..38d2920a95e6 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -15,7 +15,7 @@
 #include <linux/delay.h>
 #include <linux/spi/spi.h>
 #include <linux/fb.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/of_gpio.h>
 
 #include <video/omapdss.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index 529a017602e4..4363fffc87e3 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -10,7 +10,7 @@
  */
 
 #include <linux/delay.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_gpio.h>
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
index 31efcca801bd..deb416736aad 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
@@ -29,7 +29,7 @@
 #include <linux/sched.h>
 #include <linux/backlight.h>
 #include <linux/fb.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/of.h>
 #include <linux/of_gpio.h>
 
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
index 03e2beb7b4f0..d93175b03a12 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
@@ -14,7 +14,7 @@
 #include <linux/delay.h>
 #include <linux/spi/spi.h>
 #include <linux/regulator/consumer.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/err.h>
 #include <linux/slab.h>
 #include <linux/of_gpio.h>
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 8730646a0cbb..56c43f355ce3 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -1167,7 +1167,6 @@ static int dsi_regulator_init(struct platform_device *dsidev)
 {
         struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
         struct regulator *vdds_dsi;
-        int r;
 
         if (dsi->vdds_dsi_reg != NULL)
                 return 0;
@@ -1180,15 +1179,6 @@ static int dsi_regulator_init(struct platform_device *dsidev)
                 return PTR_ERR(vdds_dsi);
         }
 
-        if (regulator_can_change_voltage(vdds_dsi)) {
-                r = regulator_set_voltage(vdds_dsi, 1800000, 1800000);
-                if (r) {
-                        devm_regulator_put(vdds_dsi);
-                        DSSERR("can't set the DSI regulator voltage\n");
-                        return r;
-                }
-        }
-
         dsi->vdds_dsi_reg = vdds_dsi;
 
         return 0;
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c
index f95ff319e68e..3303cfad4838 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -30,6 +30,7 @@
 #include <linux/delay.h>
 #include <linux/seq_file.h>
 #include <linux/clk.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/gfp.h>
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index f892ae157ff3..4d46cdf7a037 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -33,6 +33,7 @@
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
 #include <linux/component.h>
+#include <linux/of.h>
 #include <video/omapdss.h>
 #include <sound/omap-hdmi-audio.h>
 
@@ -100,7 +101,6 @@ static irqreturn_t hdmi_irq_handler(int irq, void *data)
 
 static int hdmi_init_regulator(void)
 {
-        int r;
         struct regulator *reg;
 
         if (hdmi.vdda_reg != NULL)
@@ -114,15 +114,6 @@ static int hdmi_init_regulator(void)
                 return PTR_ERR(reg);
         }
 
-        if (regulator_can_change_voltage(reg)) {
-                r = regulator_set_voltage(reg, 1800000, 1800000);
-                if (r) {
-                        devm_regulator_put(reg);
-                        DSSWARN("can't set the regulator voltage\n");
-                        return r;
-                }
-        }
-
         hdmi.vdda_reg = reg;
 
         return 0;
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
index fa72e735dad2..ef3afe99e487 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
@@ -211,7 +211,7 @@ static void hdmi_core_init(struct hdmi_core_video_config *video_cfg)
 static void hdmi_core_powerdown_disable(struct hdmi_core_data *core)
 {
         DSSDBG("Enter hdmi_core_powerdown_disable\n");
-        REG_FLD_MOD(core->base, HDMI_CORE_SYS_SYS_CTRL1, 0x0, 0, 0);
+        REG_FLD_MOD(core->base, HDMI_CORE_SYS_SYS_CTRL1, 0x1, 0, 0);
 }
 
 static void hdmi_core_swreset_release(struct hdmi_core_data *core)
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index a43f7b10e113..9255c0e1e4a7 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -38,6 +38,7 @@
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
 #include <linux/component.h>
+#include <linux/of.h>
 #include <video/omapdss.h>
 #include <sound/omap-hdmi-audio.h>
 
@@ -119,7 +120,6 @@ static irqreturn_t hdmi_irq_handler(int irq, void *data)
 
 static int hdmi_init_regulator(void)
 {
-        int r;
         struct regulator *reg;
 
         if (hdmi.vdda_reg != NULL)
@@ -131,15 +131,6 @@ static int hdmi_init_regulator(void)
                 return PTR_ERR(reg);
         }
 
-        if (regulator_can_change_voltage(reg)) {
-                r = regulator_set_voltage(reg, 1800000, 1800000);
-                if (r) {
-                        devm_regulator_put(reg);
-                        DSSWARN("can't set the regulator voltage\n");
-                        return r;
-                }
-        }
-
         hdmi.vdda_reg = reg;
 
         return 0;
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index 6a397520cae5..8ab2093daa12 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -51,8 +51,8 @@ static void hdmi_core_ddc_init(struct hdmi_core_data *core)
 {
         void __iomem *base = core->base;
         const unsigned long long iclk = 266000000;      /* DSS L3 ICLK */
-        const unsigned ss_scl_high = 4000;              /* ns */
-        const unsigned ss_scl_low = 4700;               /* ns */
+        const unsigned ss_scl_high = 4600;              /* ns */
+        const unsigned ss_scl_low = 5400;               /* ns */
         const unsigned fs_scl_high = 600;               /* ns */
         const unsigned fs_scl_low = 1300;               /* ns */
         const unsigned sda_hold = 1000;                 /* ns */
@@ -458,7 +458,7 @@ static void hdmi_core_write_avi_infoframe(struct hdmi_core_data *core,
 
         c = (ptr[1] >> 6) & 0x3;
         m = (ptr[1] >> 4) & 0x3;
-        r = (ptr[1] >> 0) & 0x3;
+        r = (ptr[1] >> 0) & 0xf;
 
         itc = (ptr[2] >> 7) & 0x1;
         ec = (ptr[2] >> 4) & 0x7;
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_phy.c b/drivers/gpu/drm/omapdrm/dss/hdmi_phy.c
index 1f5d19c119ce..f98b750fc499 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_phy.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_phy.c
@@ -13,6 +13,7 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
+#include <linux/seq_file.h>
 #include <video/omapdss.h>
 
 #include "dss.h"
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
index 06e23a7c432c..f1015e8b8267 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/seq_file.h>
 
 #include <video/omapdss.h>
 
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
index 13442b9052d1..055f62fca5dc 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
@@ -14,6 +14,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
+#include <linux/seq_file.h>
 #include <video/omapdss.h>
 
 #include "dss.h"
diff --git a/drivers/gpu/drm/omapdrm/omap_debugfs.c b/drivers/gpu/drm/omapdrm/omap_debugfs.c
index 6f5fc14fc015..479bf24050f8 100644
--- a/drivers/gpu/drm/omapdrm/omap_debugfs.c
+++ b/drivers/gpu/drm/omapdrm/omap_debugfs.c
@@ -17,6 +17,8 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#include <linux/seq_file.h>
+
 #include <drm/drm_crtc.h>
 #include <drm/drm_fb_helper.h>
 
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
index de275a5be1db..4ceed7a9762f 100644
--- a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
+++ b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
@@ -27,6 +27,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h> /* platform_device() */
 #include <linux/sched.h>
+#include <linux/seq_file.h>
 #include <linux/slab.h>
 #include <linux/time.h>
 #include <linux/vmalloc.h>
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c
index 94ec06d3d737..f84570d1636c 100644
--- a/drivers/gpu/drm/omapdrm/omap_fb.c
+++ b/drivers/gpu/drm/omapdrm/omap_fb.c
@@ -17,6 +17,8 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#include <linux/seq_file.h>
+
 #include <drm/drm_crtc.h>
 #include <drm/drm_crtc_helper.h>
 
diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c
index b97afc281778..03698b6c806c 100644
--- a/drivers/gpu/drm/omapdrm/omap_gem.c
+++ b/drivers/gpu/drm/omapdrm/omap_gem.c
@@ -17,6 +17,7 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#include <linux/seq_file.h>
 #include <linux/shmem_fs.h>
 #include <linux/spinlock.h>
 #include <linux/pfn_t.h>
diff --git a/drivers/gpu/drm/sti/sti_crtc.c b/drivers/gpu/drm/sti/sti_crtc.c
index 505620c7c2c8..e04deedabd4a 100644
--- a/drivers/gpu/drm/sti/sti_crtc.c
+++ b/drivers/gpu/drm/sti/sti_crtc.c
@@ -51,15 +51,6 @@ static void sti_crtc_disabling(struct drm_crtc *crtc)
         mixer->status = STI_MIXER_DISABLING;
 }
 
-static bool sti_crtc_mode_fixup(struct drm_crtc *crtc,
-                                const struct drm_display_mode *mode,
-                                struct drm_display_mode *adjusted_mode)
-{
-        /* accept the provided drm_display_mode, do not fix it up */
-        drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
-        return true;
-}
-
 static int
 sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode)
 {
@@ -230,7 +221,6 @@ static void sti_crtc_atomic_flush(struct drm_crtc *crtc,
 static const struct drm_crtc_helper_funcs sti_crtc_helper_funcs = {
         .enable = sti_crtc_enable,
         .disable = sti_crtc_disabling,
-        .mode_fixup = sti_crtc_mode_fixup,
         .mode_set = drm_helper_crtc_mode_set,
         .mode_set_nofb = sti_crtc_mode_set_nofb,
         .mode_set_base = drm_helper_crtc_mode_set_base,
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 904d0754ad78..0f18b76c7906 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -456,14 +456,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
 
         WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
 
-        HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-                  vc4_state->mm.start);
-
-        if (debug_dump_regs) {
-                DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
-                vc4_hvs_dump_state(dev);
-        }
-
         if (crtc->state->event) {
                 unsigned long flags;
 
@@ -473,8 +465,20 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
 
                 spin_lock_irqsave(&dev->event_lock, flags);
                 vc4_crtc->event = crtc->state->event;
-                spin_unlock_irqrestore(&dev->event_lock, flags);
                 crtc->state->event = NULL;
+
+                HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+                          vc4_state->mm.start);
+
+                spin_unlock_irqrestore(&dev->event_lock, flags);
+        } else {
+                HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+                          vc4_state->mm.start);
+        }
+
+        if (debug_dump_regs) {
+                DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
+                vc4_hvs_dump_state(dev);
         }
 }
 
@@ -500,12 +504,17 @@ static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc)
 {
         struct drm_crtc *crtc = &vc4_crtc->base;
         struct drm_device *dev = crtc->dev;
+        struct vc4_dev *vc4 = to_vc4_dev(dev);
+        struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+        u32 chan = vc4_crtc->channel;
         unsigned long flags;
 
         spin_lock_irqsave(&dev->event_lock, flags);
-        if (vc4_crtc->event) {
+        if (vc4_crtc->event &&
+            (vc4_state->mm.start == HVS_READ(SCALER_DISPLACTX(chan)))) {
                 drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
                 vc4_crtc->event = NULL;
+                drm_crtc_vblank_put(crtc);
         }
         spin_unlock_irqrestore(&dev->event_lock, flags);
 }
@@ -556,6 +565,7 @@ vc4_async_page_flip_complete(struct vc4_seqno_cb *cb)
                 spin_unlock_irqrestore(&dev->event_lock, flags);
         }
 
+        drm_crtc_vblank_put(crtc);
         drm_framebuffer_unreference(flip_state->fb);
         kfree(flip_state);
 
@@ -598,6 +608,8 @@ static int vc4_async_page_flip(struct drm_crtc *crtc,
                 return ret;
         }
 
+        WARN_ON(drm_crtc_vblank_get(crtc) != 0);
+
         /* Immediately update the plane's legacy fb pointer, so that later
          * modeset prep sees the state that will be present when the semaphore
          * is released.
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index 3446ece21b4a..250ed7e3754c 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -66,12 +66,12 @@ static const struct file_operations vc4_drm_fops = {
 };
 
 static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
-        DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, 0),
-        DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, 0),
-        DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, 0),
-        DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, 0),
-        DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, 0),
-        DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, 0),
+        DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
         DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
                           DRM_ROOT_ONLY),
 };
@@ -91,7 +91,7 @@ static struct drm_driver vc4_drm_driver = {
 
         .enable_vblank = vc4_enable_vblank,
         .disable_vblank = vc4_disable_vblank,
-        .get_vblank_counter = drm_vblank_count,
+        .get_vblank_counter = drm_vblank_no_hw_counter,
 
 #if defined(CONFIG_DEBUG_FS)
         .debugfs_init = vc4_debugfs_init,
diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
index cb37751bc99f..861a623bc185 100644
--- a/drivers/gpu/drm/vc4/vc4_kms.c
+++ b/drivers/gpu/drm/vc4/vc4_kms.c
@@ -117,10 +117,18 @@ static int vc4_atomic_commit(struct drm_device *dev,
                 return -ENOMEM;
 
         /* Make sure that any outstanding modesets have finished. */
-        ret = down_interruptible(&vc4->async_modeset);
-        if (ret) {
-                kfree(c);
-                return ret;
+        if (nonblock) {
+                ret = down_trylock(&vc4->async_modeset);
+                if (ret) {
+                        kfree(c);
+                        return -EBUSY;
+                }
+        } else {
+                ret = down_interruptible(&vc4->async_modeset);
+                if (ret) {
+                        kfree(c);
+                        return ret;
+                }
         }
 
         ret = drm_atomic_helper_prepare_planes(dev, state);
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index 6163b95c5411..f99eece4cc97 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -341,6 +341,10 @@
 #define SCALER_DISPLACT0                        0x00000030
 #define SCALER_DISPLACT1                        0x00000034
 #define SCALER_DISPLACT2                        0x00000038
+#define SCALER_DISPLACTX(x)                     (SCALER_DISPLACT0 +     \
+                                                 (x) * (SCALER_DISPLACT1 - \
+                                                        SCALER_DISPLACT0))
+
 #define SCALER_DISPCTRL0                        0x00000040
 # define SCALER_DISPCTRLX_ENABLE                BIT(31)
 # define SCALER_DISPCTRLX_RESET                 BIT(30)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
index 6de283c8fa3e..f0374f9b56ca 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c
@@ -28,6 +28,7 @@
 #include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/frame.h>
 #include <asm/hypervisor.h>
 #include "drmP.h"
 #include "vmwgfx_msg.h"
@@ -194,7 +195,7 @@ static int vmw_send_msg(struct rpc_channel *channel, const char *msg)
 
         return -EINVAL;
 }
-
+STACK_FRAME_NON_STANDARD(vmw_send_msg);
 
 
 /**
@@ -304,6 +305,7 @@ static int vmw_recv_msg(struct rpc_channel *channel, void **msg,
 
         return 0;
 }
+STACK_FRAME_NON_STANDARD(vmw_recv_msg);
 
 
 /**