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-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c60
1 files changed, 47 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
index df8937b9a9ac..0fddac9f7cb4 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
@@ -28,6 +28,12 @@
28#include "amd_acpi.h" 28#include "amd_acpi.h"
29#include "amd_powerplay.h" 29#include "amd_powerplay.h"
30 30
31#define PHM_FUNC_CHECK(hw) \
32 do { \
33 if ((hw) == NULL || (hw)->hwmgr_func == NULL) \
34 return -EINVAL; \
35 } while (0)
36
31void phm_init_dynamic_caps(struct pp_hwmgr *hwmgr) 37void phm_init_dynamic_caps(struct pp_hwmgr *hwmgr)
32{ 38{
33 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableVoltageTransition); 39 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableVoltageTransition);
@@ -70,6 +76,8 @@ int phm_block_hw_access(struct pp_hwmgr *hwmgr, bool block)
70 76
71int phm_setup_asic(struct pp_hwmgr *hwmgr) 77int phm_setup_asic(struct pp_hwmgr *hwmgr)
72{ 78{
79 PHM_FUNC_CHECK(hwmgr);
80
73 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, 81 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
74 PHM_PlatformCaps_TablelessHardwareInterface)) { 82 PHM_PlatformCaps_TablelessHardwareInterface)) {
75 if (NULL != hwmgr->hwmgr_func->asic_setup) 83 if (NULL != hwmgr->hwmgr_func->asic_setup)
@@ -88,6 +96,8 @@ int phm_set_power_state(struct pp_hwmgr *hwmgr,
88{ 96{
89 struct phm_set_power_state_input states; 97 struct phm_set_power_state_input states;
90 98
99 PHM_FUNC_CHECK(hwmgr);
100
91 states.pcurrent_state = pcurrent_state; 101 states.pcurrent_state = pcurrent_state;
92 states.pnew_state = pnew_power_state; 102 states.pnew_state = pnew_power_state;
93 103
@@ -104,6 +114,8 @@ int phm_set_power_state(struct pp_hwmgr *hwmgr,
104 114
105int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) 115int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)
106{ 116{
117 PHM_FUNC_CHECK(hwmgr);
118
107 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, 119 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
108 PHM_PlatformCaps_TablelessHardwareInterface)) { 120 PHM_PlatformCaps_TablelessHardwareInterface)) {
109 if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable) 121 if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable)
@@ -118,6 +130,8 @@ int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)
118 130
119int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) 131int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level)
120{ 132{
133 PHM_FUNC_CHECK(hwmgr);
134
121 if (hwmgr->hwmgr_func->force_dpm_level != NULL) 135 if (hwmgr->hwmgr_func->force_dpm_level != NULL)
122 return hwmgr->hwmgr_func->force_dpm_level(hwmgr, level); 136 return hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);
123 137
@@ -128,6 +142,8 @@ int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
128 struct pp_power_state *adjusted_ps, 142 struct pp_power_state *adjusted_ps,
129 const struct pp_power_state *current_ps) 143 const struct pp_power_state *current_ps)
130{ 144{
145 PHM_FUNC_CHECK(hwmgr);
146
131 if (hwmgr->hwmgr_func->apply_state_adjust_rules != NULL) 147 if (hwmgr->hwmgr_func->apply_state_adjust_rules != NULL)
132 return hwmgr->hwmgr_func->apply_state_adjust_rules( 148 return hwmgr->hwmgr_func->apply_state_adjust_rules(
133 hwmgr, 149 hwmgr,
@@ -138,6 +154,8 @@ int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
138 154
139int phm_powerdown_uvd(struct pp_hwmgr *hwmgr) 155int phm_powerdown_uvd(struct pp_hwmgr *hwmgr)
140{ 156{
157 PHM_FUNC_CHECK(hwmgr);
158
141 if (hwmgr->hwmgr_func->powerdown_uvd != NULL) 159 if (hwmgr->hwmgr_func->powerdown_uvd != NULL)
142 return hwmgr->hwmgr_func->powerdown_uvd(hwmgr); 160 return hwmgr->hwmgr_func->powerdown_uvd(hwmgr);
143 return 0; 161 return 0;
@@ -145,6 +163,8 @@ int phm_powerdown_uvd(struct pp_hwmgr *hwmgr)
145 163
146int phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool gate) 164int phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool gate)
147{ 165{
166 PHM_FUNC_CHECK(hwmgr);
167
148 if (hwmgr->hwmgr_func->powergate_uvd != NULL) 168 if (hwmgr->hwmgr_func->powergate_uvd != NULL)
149 return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate); 169 return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);
150 return 0; 170 return 0;
@@ -152,6 +172,8 @@ int phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool gate)
152 172
153int phm_powergate_vce(struct pp_hwmgr *hwmgr, bool gate) 173int phm_powergate_vce(struct pp_hwmgr *hwmgr, bool gate)
154{ 174{
175 PHM_FUNC_CHECK(hwmgr);
176
155 if (hwmgr->hwmgr_func->powergate_vce != NULL) 177 if (hwmgr->hwmgr_func->powergate_vce != NULL)
156 return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate); 178 return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);
157 return 0; 179 return 0;
@@ -159,6 +181,8 @@ int phm_powergate_vce(struct pp_hwmgr *hwmgr, bool gate)
159 181
160int phm_enable_clock_power_gatings(struct pp_hwmgr *hwmgr) 182int phm_enable_clock_power_gatings(struct pp_hwmgr *hwmgr)
161{ 183{
184 PHM_FUNC_CHECK(hwmgr);
185
162 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, 186 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
163 PHM_PlatformCaps_TablelessHardwareInterface)) { 187 PHM_PlatformCaps_TablelessHardwareInterface)) {
164 if (NULL != hwmgr->hwmgr_func->enable_clock_power_gating) 188 if (NULL != hwmgr->hwmgr_func->enable_clock_power_gating)
@@ -171,8 +195,7 @@ int phm_enable_clock_power_gatings(struct pp_hwmgr *hwmgr)
171 195
172int phm_display_configuration_changed(struct pp_hwmgr *hwmgr) 196int phm_display_configuration_changed(struct pp_hwmgr *hwmgr)
173{ 197{
174 if (hwmgr == NULL) 198 PHM_FUNC_CHECK(hwmgr);
175 return -EINVAL;
176 199
177 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, 200 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
178 PHM_PlatformCaps_TablelessHardwareInterface)) { 201 PHM_PlatformCaps_TablelessHardwareInterface)) {
@@ -185,8 +208,7 @@ int phm_display_configuration_changed(struct pp_hwmgr *hwmgr)
185 208
186int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr) 209int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
187{ 210{
188 if (hwmgr == NULL) 211 PHM_FUNC_CHECK(hwmgr);
189 return -EINVAL;
190 212
191 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, 213 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
192 PHM_PlatformCaps_TablelessHardwareInterface)) 214 PHM_PlatformCaps_TablelessHardwareInterface))
@@ -198,7 +220,9 @@ int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
198 220
199int phm_stop_thermal_controller(struct pp_hwmgr *hwmgr) 221int phm_stop_thermal_controller(struct pp_hwmgr *hwmgr)
200{ 222{
201 if (hwmgr == NULL || hwmgr->hwmgr_func->stop_thermal_controller == NULL) 223 PHM_FUNC_CHECK(hwmgr);
224
225 if (hwmgr->hwmgr_func->stop_thermal_controller == NULL)
202 return -EINVAL; 226 return -EINVAL;
203 227
204 return hwmgr->hwmgr_func->stop_thermal_controller(hwmgr); 228 return hwmgr->hwmgr_func->stop_thermal_controller(hwmgr);
@@ -206,7 +230,9 @@ int phm_stop_thermal_controller(struct pp_hwmgr *hwmgr)
206 230
207int phm_register_thermal_interrupt(struct pp_hwmgr *hwmgr, const void *info) 231int phm_register_thermal_interrupt(struct pp_hwmgr *hwmgr, const void *info)
208{ 232{
209 if (hwmgr == NULL || hwmgr->hwmgr_func->register_internal_thermal_interrupt == NULL) 233 PHM_FUNC_CHECK(hwmgr);
234
235 if (hwmgr->hwmgr_func->register_internal_thermal_interrupt == NULL)
210 return -EINVAL; 236 return -EINVAL;
211 237
212 return hwmgr->hwmgr_func->register_internal_thermal_interrupt(hwmgr, info); 238 return hwmgr->hwmgr_func->register_internal_thermal_interrupt(hwmgr, info);
@@ -228,7 +254,9 @@ int phm_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRa
228 254
229bool phm_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) 255bool phm_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
230{ 256{
231 if (hwmgr == NULL || hwmgr->hwmgr_func->check_smc_update_required_for_display_configuration == NULL) 257 PHM_FUNC_CHECK(hwmgr);
258
259 if (hwmgr->hwmgr_func->check_smc_update_required_for_display_configuration == NULL)
232 return -EINVAL; 260 return -EINVAL;
233 261
234 return hwmgr->hwmgr_func->check_smc_update_required_for_display_configuration(hwmgr); 262 return hwmgr->hwmgr_func->check_smc_update_required_for_display_configuration(hwmgr);
@@ -240,7 +268,9 @@ int phm_check_states_equal(struct pp_hwmgr *hwmgr,
240 const struct pp_hw_power_state *pstate2, 268 const struct pp_hw_power_state *pstate2,
241 bool *equal) 269 bool *equal)
242{ 270{
243 if (hwmgr == NULL || hwmgr->hwmgr_func->check_states_equal == NULL) 271 PHM_FUNC_CHECK(hwmgr);
272
273 if (hwmgr->hwmgr_func->check_states_equal == NULL)
244 return -EINVAL; 274 return -EINVAL;
245 275
246 return hwmgr->hwmgr_func->check_states_equal(hwmgr, pstate1, pstate2, equal); 276 return hwmgr->hwmgr_func->check_states_equal(hwmgr, pstate1, pstate2, equal);
@@ -249,8 +279,9 @@ int phm_check_states_equal(struct pp_hwmgr *hwmgr,
249int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr, 279int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,
250 const struct amd_pp_display_configuration *display_config) 280 const struct amd_pp_display_configuration *display_config)
251{ 281{
282 PHM_FUNC_CHECK(hwmgr);
252 283
253 if (hwmgr == NULL) 284 if (hwmgr->hwmgr_func->store_cc6_data == NULL)
254 return -EINVAL; 285 return -EINVAL;
255 286
256 hwmgr->display_config = *display_config; 287 hwmgr->display_config = *display_config;
@@ -267,10 +298,11 @@ int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,
267} 298}
268 299
269int phm_get_dal_power_level(struct pp_hwmgr *hwmgr, 300int phm_get_dal_power_level(struct pp_hwmgr *hwmgr,
270 struct amd_pp_dal_clock_info*info) 301 struct amd_pp_dal_clock_info *info)
271{ 302{
272 if (info == NULL || hwmgr == NULL || 303 PHM_FUNC_CHECK(hwmgr);
273 hwmgr->hwmgr_func->get_dal_power_level == NULL) 304
305 if (info == NULL || hwmgr->hwmgr_func->get_dal_power_level == NULL)
274 return -EINVAL; 306 return -EINVAL;
275 307
276 return hwmgr->hwmgr_func->get_dal_power_level(hwmgr, info); 308 return hwmgr->hwmgr_func->get_dal_power_level(hwmgr, info);
@@ -278,7 +310,9 @@ int phm_get_dal_power_level(struct pp_hwmgr *hwmgr,
278 310
279int phm_set_cpu_power_state(struct pp_hwmgr *hwmgr) 311int phm_set_cpu_power_state(struct pp_hwmgr *hwmgr)
280{ 312{
281 if (hwmgr != NULL && hwmgr->hwmgr_func->set_cpu_power_state != NULL) 313 PHM_FUNC_CHECK(hwmgr);
314
315 if (hwmgr->hwmgr_func->set_cpu_power_state != NULL)
282 return hwmgr->hwmgr_func->set_cpu_power_state(hwmgr); 316 return hwmgr->hwmgr_func->set_cpu_power_state(hwmgr);
283 317
284 return 0; 318 return 0;