4 files changed, 119 insertions, 31 deletions

diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c
index 2a95d10e9d92..a24631fdf4ad 100644
--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
@@ -225,8 +225,6 @@ static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
         if (!iores)
                 return -ENXIO;
 
-        platform_set_drvdata(pdev, hdmi);
-
         encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
         /*
          * If we failed to find the CRTC(s) which this encoder is
@@ -245,7 +243,16 @@ static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
         drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
                          DRM_MODE_ENCODER_TMDS, NULL);
 
-        return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
+        ret = dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
+
+        /*
+         * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
+         * which would have called the encoder cleanup.  Do it manually.
+         */
+        if (ret)
+                drm_encoder_cleanup(encoder);
+
+        return ret;
 }
 
 static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index 9876e0f0c3e1..e26dcdec2aba 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -326,7 +326,6 @@ int imx_drm_add_crtc(struct drm_device *drm, struct drm_crtc *crtc,
 {
         struct imx_drm_device *imxdrm = drm->dev_private;
         struct imx_drm_crtc *imx_drm_crtc;
-        int ret;
 
         /*
          * The vblank arrays are dimensioned by MAX_CRTC - we can't
@@ -351,10 +350,6 @@ int imx_drm_add_crtc(struct drm_device *drm, struct drm_crtc *crtc,
 
         *new_crtc = imx_drm_crtc;
 
-        ret = drm_mode_crtc_set_gamma_size(imx_drm_crtc->crtc, 256);
-        if (ret)
-                goto err_register;
-
         drm_crtc_helper_add(crtc,
                         imx_drm_crtc->imx_drm_helper_funcs.crtc_helper_funcs);
 
@@ -362,11 +357,6 @@ int imx_drm_add_crtc(struct drm_device *drm, struct drm_crtc *crtc,
                         imx_drm_crtc->imx_drm_helper_funcs.crtc_funcs, NULL);
 
         return 0;
-
-err_register:
-        imxdrm->crtc[--imxdrm->pipes] = NULL;
-        kfree(imx_drm_crtc);
-        return ret;
 }
 EXPORT_SYMBOL_GPL(imx_drm_add_crtc);
 
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 588827844f30..681ec6eb77d9 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -72,22 +72,101 @@ static inline int calc_bandwidth(int width, int height, unsigned int vref)
 int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
                        int x, int y)
 {
-        struct drm_gem_cma_object *cma_obj;
-        unsigned long eba;
-        int active;
-
-        cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
-        if (!cma_obj) {
-                DRM_DEBUG_KMS("entry is null.\n");
-                return -EFAULT;
+        struct drm_gem_cma_object *cma_obj[3];
+        unsigned long eba, ubo, vbo;
+        int active, i;
+
+        for (i = 0; i < drm_format_num_planes(fb->pixel_format); i++) {
+                cma_obj[i] = drm_fb_cma_get_gem_obj(fb, i);
+                if (!cma_obj[i]) {
+                        DRM_DEBUG_KMS("plane %d entry is null.\n", i);
+                        return -EFAULT;
+                }
         }
 
-        dev_dbg(ipu_plane->base.dev->dev, "phys = %pad, x = %d, y = %d",
-                &cma_obj->paddr, x, y);
-
-        eba = cma_obj->paddr + fb->offsets[0] +
+        eba = cma_obj[0]->paddr + fb->offsets[0] +
               fb->pitches[0] * y + (fb->bits_per_pixel >> 3) * x;
 
+        if (eba & 0x7) {
+                DRM_DEBUG_KMS("base address must be a multiple of 8.\n");
+                return -EINVAL;
+        }
+
+        if (fb->pitches[0] < 1 || fb->pitches[0] > 16384) {
+                DRM_DEBUG_KMS("pitches out of range.\n");
+                return -EINVAL;
+        }
+
+        if (ipu_plane->enabled && fb->pitches[0] != ipu_plane->stride[0]) {
+                DRM_DEBUG_KMS("pitches must not change while plane is enabled.\n");
+                return -EINVAL;
+        }
+
+        ipu_plane->stride[0] = fb->pitches[0];
+
+        switch (fb->pixel_format) {
+        case DRM_FORMAT_YUV420:
+        case DRM_FORMAT_YVU420:
+                /*
+                 * Multiplanar formats have to meet the following restrictions:
+                 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
+                 * - EBA, UBO and VBO are a multiple of 8
+                 * - UBO and VBO are unsigned and not larger than 0xfffff8
+                 * - Only EBA may be changed while scanout is active
+                 * - The strides of U and V planes must be identical.
+                 */
+                ubo = cma_obj[1]->paddr + fb->offsets[1] +
+                      fb->pitches[1] * y / 2 + x / 2 - eba;
+                vbo = cma_obj[2]->paddr + fb->offsets[2] +
+                      fb->pitches[2] * y / 2 + x / 2 - eba;
+
+                if ((ubo & 0x7) || (vbo & 0x7)) {
+                        DRM_DEBUG_KMS("U/V buffer offsets must be a multiple of 8.\n");
+                        return -EINVAL;
+                }
+
+                if ((ubo > 0xfffff8) || (vbo > 0xfffff8)) {
+                        DRM_DEBUG_KMS("U/V buffer offsets must be positive and not larger than 0xfffff8.\n");
+                        return -EINVAL;
+                }
+
+                if (ipu_plane->enabled && ((ipu_plane->u_offset != ubo) ||
+                                           (ipu_plane->v_offset != vbo))) {
+                        DRM_DEBUG_KMS("U/V buffer offsets must not change while plane is enabled.\n");
+                        return -EINVAL;
+                }
+
+                if (fb->pitches[1] != fb->pitches[2]) {
+                        DRM_DEBUG_KMS("U/V pitches must be identical.\n");
+                        return -EINVAL;
+                }
+
+                if (fb->pitches[1] < 1 || fb->pitches[1] > 16384) {
+                        DRM_DEBUG_KMS("U/V pitches out of range.\n");
+                        return -EINVAL;
+                }
+
+                if (ipu_plane->enabled &&
+                    (ipu_plane->stride[1] != fb->pitches[1])) {
+                        DRM_DEBUG_KMS("U/V pitches must not change while plane is enabled.\n");
+                        return -EINVAL;
+                }
+
+                ipu_plane->u_offset = ubo;
+                ipu_plane->v_offset = vbo;
+                ipu_plane->stride[1] = fb->pitches[1];
+
+                dev_dbg(ipu_plane->base.dev->dev,
+                        "phys = %pad %pad %pad, x = %d, y = %d",
+                        &cma_obj[0]->paddr, &cma_obj[1]->paddr,
+                        &cma_obj[2]->paddr, x, y);
+                break;
+        default:
+                dev_dbg(ipu_plane->base.dev->dev, "phys = %pad, x = %d, y = %d",
+                        &cma_obj[0]->paddr, x, y);
+                break;
+        }
+
         if (ipu_plane->enabled) {
                 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
                 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
@@ -201,12 +280,6 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
                 }
         }
 
-        ret = ipu_dmfc_init_channel(ipu_plane->dmfc, crtc_w);
-        if (ret) {
-                dev_err(dev, "initializing dmfc channel failed with %d\n", ret);
-                return ret;
-        }
-
         ret = ipu_dmfc_alloc_bandwidth(ipu_plane->dmfc,
                         calc_bandwidth(crtc_w, crtc_h,
                                        calc_vref(mode)), 64);
@@ -215,6 +288,8 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
                 return ret;
         }
 
+        ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w);
+
         ipu_cpmem_zero(ipu_plane->ipu_ch);
         ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h);
         ret = ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->pixel_format);
@@ -233,6 +308,18 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
         if (interlaced)
                 ipu_cpmem_interlaced_scan(ipu_plane->ipu_ch, fb->pitches[0]);
 
+        if (fb->pixel_format == DRM_FORMAT_YUV420) {
+                ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
+                                              ipu_plane->stride[1],
+                                              ipu_plane->u_offset,
+                                              ipu_plane->v_offset);
+        } else if (fb->pixel_format == DRM_FORMAT_YVU420) {
+                ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
+                                              ipu_plane->stride[1],
+                                              ipu_plane->v_offset,
+                                              ipu_plane->u_offset);
+        }
+
         ipu_plane->w = src_w;
         ipu_plane->h = src_h;
 
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.h b/drivers/gpu/drm/imx/ipuv3-plane.h
index 3a443b413c60..4448fd4ad4eb 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.h
+++ b/drivers/gpu/drm/imx/ipuv3-plane.h
@@ -29,6 +29,10 @@ struct ipu_plane {
         int                     w;
         int                     h;
 
+        unsigned int            u_offset;
+        unsigned int            v_offset;
+        unsigned int            stride[2];
+
         bool                    enabled;
 };