diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index aeb637dc1fdf..91cb4c422ad5 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
@@ -1095,14 +1095,6 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine) | |||
1095 | WA_SET_BIT_MASKED(HDC_CHICKEN0, | 1095 | WA_SET_BIT_MASKED(HDC_CHICKEN0, |
1096 | HDC_FENCE_DEST_SLM_DISABLE); | 1096 | HDC_FENCE_DEST_SLM_DISABLE); |
1097 | 1097 | ||
1098 | /* GEN8_L3SQCREG4 has a dependency with WA batch so any new changes | ||
1099 | * involving this register should also be added to WA batch as required. | ||
1100 | */ | ||
1101 | if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_E0)) | ||
1102 | /* WaDisableLSQCROPERFforOCL:kbl */ | ||
1103 | I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) | | ||
1104 | GEN8_LQSC_RO_PERF_DIS); | ||
1105 | |||
1106 | /* WaToEnableHwFixForPushConstHWBug:kbl */ | 1098 | /* WaToEnableHwFixForPushConstHWBug:kbl */ |
1107 | if (IS_KBL_REVID(dev_priv, KBL_REVID_C0, REVID_FOREVER)) | 1099 | if (IS_KBL_REVID(dev_priv, KBL_REVID_C0, REVID_FOREVER)) |
1108 | WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2, | 1100 | WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2, |