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path: root/drivers/gpu/drm/i915/intel_hdmi.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_hdmi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index e2c6a2b3e8f2..07e803a604bd 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -115,6 +115,8 @@ static u32 hsw_infoframe_enable(unsigned int type)
115 switch (type) { 115 switch (type) {
116 case DP_SDP_VSC: 116 case DP_SDP_VSC:
117 return VIDEO_DIP_ENABLE_VSC_HSW; 117 return VIDEO_DIP_ENABLE_VSC_HSW;
118 case DP_SDP_PPS:
119 return VDIP_ENABLE_PPS;
118 case HDMI_INFOFRAME_TYPE_AVI: 120 case HDMI_INFOFRAME_TYPE_AVI:
119 return VIDEO_DIP_ENABLE_AVI_HSW; 121 return VIDEO_DIP_ENABLE_AVI_HSW;
120 case HDMI_INFOFRAME_TYPE_SPD: 122 case HDMI_INFOFRAME_TYPE_SPD:
@@ -136,6 +138,8 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
136 switch (type) { 138 switch (type) {
137 case DP_SDP_VSC: 139 case DP_SDP_VSC:
138 return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i); 140 return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i);
141 case DP_SDP_PPS:
142 return ICL_VIDEO_DIP_PPS_DATA(cpu_transcoder, i);
139 case HDMI_INFOFRAME_TYPE_AVI: 143 case HDMI_INFOFRAME_TYPE_AVI:
140 return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder, i); 144 return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder, i);
141 case HDMI_INFOFRAME_TYPE_SPD: 145 case HDMI_INFOFRAME_TYPE_SPD:
@@ -148,6 +152,18 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
148 } 152 }
149} 153}
150 154
155static int hsw_dip_data_size(unsigned int type)
156{
157 switch (type) {
158 case DP_SDP_VSC:
159 return VIDEO_DIP_VSC_DATA_SIZE;
160 case DP_SDP_PPS:
161 return VIDEO_DIP_PPS_DATA_SIZE;
162 default:
163 return VIDEO_DIP_DATA_SIZE;
164 }
165}
166
151static void g4x_write_infoframe(struct intel_encoder *encoder, 167static void g4x_write_infoframe(struct intel_encoder *encoder,
152 const struct intel_crtc_state *crtc_state, 168 const struct intel_crtc_state *crtc_state,
153 unsigned int type, 169 unsigned int type,
@@ -382,11 +398,12 @@ static void hsw_write_infoframe(struct intel_encoder *encoder,
382 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 398 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
383 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 399 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
384 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); 400 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
385 int data_size = type == DP_SDP_VSC ? 401 int data_size;
386 VIDEO_DIP_VSC_DATA_SIZE : VIDEO_DIP_DATA_SIZE;
387 int i; 402 int i;
388 u32 val = I915_READ(ctl_reg); 403 u32 val = I915_READ(ctl_reg);
389 404
405 data_size = hsw_dip_data_size(type);
406
390 val &= ~hsw_infoframe_enable(type); 407 val &= ~hsw_infoframe_enable(type);
391 I915_WRITE(ctl_reg, val); 408 I915_WRITE(ctl_reg, val);
392 409