diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 233 |
1 files changed, 173 insertions, 60 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index f8dc84b2d2d3..a7d9ac912125 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -381,6 +381,15 @@ struct intel_hdcp_shim { | |||
381 | bool *hdcp_capable); | 381 | bool *hdcp_capable); |
382 | }; | 382 | }; |
383 | 383 | ||
384 | struct intel_hdcp { | ||
385 | const struct intel_hdcp_shim *shim; | ||
386 | /* Mutex for hdcp state of the connector */ | ||
387 | struct mutex mutex; | ||
388 | u64 value; | ||
389 | struct delayed_work check_work; | ||
390 | struct work_struct prop_work; | ||
391 | }; | ||
392 | |||
384 | struct intel_connector { | 393 | struct intel_connector { |
385 | struct drm_connector base; | 394 | struct drm_connector base; |
386 | /* | 395 | /* |
@@ -413,11 +422,7 @@ struct intel_connector { | |||
413 | /* Work struct to schedule a uevent on link train failure */ | 422 | /* Work struct to schedule a uevent on link train failure */ |
414 | struct work_struct modeset_retry_work; | 423 | struct work_struct modeset_retry_work; |
415 | 424 | ||
416 | const struct intel_hdcp_shim *hdcp_shim; | 425 | struct intel_hdcp hdcp; |
417 | struct mutex hdcp_mutex; | ||
418 | uint64_t hdcp_value; /* protected by hdcp_mutex */ | ||
419 | struct delayed_work hdcp_check_work; | ||
420 | struct work_struct hdcp_prop_work; | ||
421 | }; | 426 | }; |
422 | 427 | ||
423 | struct intel_digital_connector_state { | 428 | struct intel_digital_connector_state { |
@@ -539,6 +544,26 @@ struct intel_plane_state { | |||
539 | */ | 544 | */ |
540 | int scaler_id; | 545 | int scaler_id; |
541 | 546 | ||
547 | /* | ||
548 | * linked_plane: | ||
549 | * | ||
550 | * ICL planar formats require 2 planes that are updated as pairs. | ||
551 | * This member is used to make sure the other plane is also updated | ||
552 | * when required, and for update_slave() to find the correct | ||
553 | * plane_state to pass as argument. | ||
554 | */ | ||
555 | struct intel_plane *linked_plane; | ||
556 | |||
557 | /* | ||
558 | * slave: | ||
559 | * If set don't update use the linked plane's state for updating | ||
560 | * this plane during atomic commit with the update_slave() callback. | ||
561 | * | ||
562 | * It's also used by the watermark code to ignore wm calculations on | ||
563 | * this plane. They're calculated by the linked plane's wm code. | ||
564 | */ | ||
565 | u32 slave; | ||
566 | |||
542 | struct drm_intel_sprite_colorkey ckey; | 567 | struct drm_intel_sprite_colorkey ckey; |
543 | }; | 568 | }; |
544 | 569 | ||
@@ -547,6 +572,7 @@ struct intel_initial_plane_config { | |||
547 | unsigned int tiling; | 572 | unsigned int tiling; |
548 | int size; | 573 | int size; |
549 | u32 base; | 574 | u32 base; |
575 | u8 rotation; | ||
550 | }; | 576 | }; |
551 | 577 | ||
552 | #define SKL_MIN_SRC_W 8 | 578 | #define SKL_MIN_SRC_W 8 |
@@ -712,6 +738,13 @@ struct intel_crtc_wm_state { | |||
712 | bool need_postvbl_update; | 738 | bool need_postvbl_update; |
713 | }; | 739 | }; |
714 | 740 | ||
741 | enum intel_output_format { | ||
742 | INTEL_OUTPUT_FORMAT_INVALID, | ||
743 | INTEL_OUTPUT_FORMAT_RGB, | ||
744 | INTEL_OUTPUT_FORMAT_YCBCR420, | ||
745 | INTEL_OUTPUT_FORMAT_YCBCR444, | ||
746 | }; | ||
747 | |||
715 | struct intel_crtc_state { | 748 | struct intel_crtc_state { |
716 | struct drm_crtc_state base; | 749 | struct drm_crtc_state base; |
717 | 750 | ||
@@ -899,8 +932,11 @@ struct intel_crtc_state { | |||
899 | /* HDMI High TMDS char rate ratio */ | 932 | /* HDMI High TMDS char rate ratio */ |
900 | bool hdmi_high_tmds_clock_ratio; | 933 | bool hdmi_high_tmds_clock_ratio; |
901 | 934 | ||
902 | /* output format is YCBCR 4:2:0 */ | 935 | /* Output format RGB/YCBCR etc */ |
903 | bool ycbcr420; | 936 | enum intel_output_format output_format; |
937 | |||
938 | /* Output down scaling is done in LSPCON device */ | ||
939 | bool lspcon_downsampling; | ||
904 | }; | 940 | }; |
905 | 941 | ||
906 | struct intel_crtc { | 942 | struct intel_crtc { |
@@ -973,6 +1009,9 @@ struct intel_plane { | |||
973 | void (*update_plane)(struct intel_plane *plane, | 1009 | void (*update_plane)(struct intel_plane *plane, |
974 | const struct intel_crtc_state *crtc_state, | 1010 | const struct intel_crtc_state *crtc_state, |
975 | const struct intel_plane_state *plane_state); | 1011 | const struct intel_plane_state *plane_state); |
1012 | void (*update_slave)(struct intel_plane *plane, | ||
1013 | const struct intel_crtc_state *crtc_state, | ||
1014 | const struct intel_plane_state *plane_state); | ||
976 | void (*disable_plane)(struct intel_plane *plane, | 1015 | void (*disable_plane)(struct intel_plane *plane, |
977 | struct intel_crtc *crtc); | 1016 | struct intel_crtc *crtc); |
978 | bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe); | 1017 | bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe); |
@@ -1070,13 +1109,13 @@ struct intel_dp { | |||
1070 | bool link_mst; | 1109 | bool link_mst; |
1071 | bool link_trained; | 1110 | bool link_trained; |
1072 | bool has_audio; | 1111 | bool has_audio; |
1073 | bool detect_done; | ||
1074 | bool reset_link_params; | 1112 | bool reset_link_params; |
1075 | enum aux_ch aux_ch; | ||
1076 | uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; | 1113 | uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; |
1077 | uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; | 1114 | uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; |
1078 | uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; | 1115 | uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; |
1079 | uint8_t edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]; | 1116 | uint8_t edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]; |
1117 | u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]; | ||
1118 | u8 fec_capable; | ||
1080 | /* source rates */ | 1119 | /* source rates */ |
1081 | int num_source_rates; | 1120 | int num_source_rates; |
1082 | const int *source_rates; | 1121 | const int *source_rates; |
@@ -1094,7 +1133,6 @@ struct intel_dp { | |||
1094 | /* sink or branch descriptor */ | 1133 | /* sink or branch descriptor */ |
1095 | struct drm_dp_desc desc; | 1134 | struct drm_dp_desc desc; |
1096 | struct drm_dp_aux aux; | 1135 | struct drm_dp_aux aux; |
1097 | enum intel_display_power_domain aux_power_domain; | ||
1098 | uint8_t train_set[4]; | 1136 | uint8_t train_set[4]; |
1099 | int panel_power_up_delay; | 1137 | int panel_power_up_delay; |
1100 | int panel_power_down_delay; | 1138 | int panel_power_down_delay; |
@@ -1156,9 +1194,15 @@ struct intel_dp { | |||
1156 | struct intel_dp_compliance compliance; | 1194 | struct intel_dp_compliance compliance; |
1157 | }; | 1195 | }; |
1158 | 1196 | ||
1197 | enum lspcon_vendor { | ||
1198 | LSPCON_VENDOR_MCA, | ||
1199 | LSPCON_VENDOR_PARADE | ||
1200 | }; | ||
1201 | |||
1159 | struct intel_lspcon { | 1202 | struct intel_lspcon { |
1160 | bool active; | 1203 | bool active; |
1161 | enum drm_lspcon_mode mode; | 1204 | enum drm_lspcon_mode mode; |
1205 | enum lspcon_vendor vendor; | ||
1162 | }; | 1206 | }; |
1163 | 1207 | ||
1164 | struct intel_digital_port { | 1208 | struct intel_digital_port { |
@@ -1170,18 +1214,20 @@ struct intel_digital_port { | |||
1170 | enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool); | 1214 | enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool); |
1171 | bool release_cl2_override; | 1215 | bool release_cl2_override; |
1172 | uint8_t max_lanes; | 1216 | uint8_t max_lanes; |
1217 | /* Used for DP and ICL+ TypeC/DP and TypeC/HDMI ports. */ | ||
1218 | enum aux_ch aux_ch; | ||
1173 | enum intel_display_power_domain ddi_io_power_domain; | 1219 | enum intel_display_power_domain ddi_io_power_domain; |
1174 | enum tc_port_type tc_type; | 1220 | enum tc_port_type tc_type; |
1175 | 1221 | ||
1176 | void (*write_infoframe)(struct drm_encoder *encoder, | 1222 | void (*write_infoframe)(struct intel_encoder *encoder, |
1177 | const struct intel_crtc_state *crtc_state, | 1223 | const struct intel_crtc_state *crtc_state, |
1178 | unsigned int type, | 1224 | unsigned int type, |
1179 | const void *frame, ssize_t len); | 1225 | const void *frame, ssize_t len); |
1180 | void (*set_infoframes)(struct drm_encoder *encoder, | 1226 | void (*set_infoframes)(struct intel_encoder *encoder, |
1181 | bool enable, | 1227 | bool enable, |
1182 | const struct intel_crtc_state *crtc_state, | 1228 | const struct intel_crtc_state *crtc_state, |
1183 | const struct drm_connector_state *conn_state); | 1229 | const struct drm_connector_state *conn_state); |
1184 | bool (*infoframe_enabled)(struct drm_encoder *encoder, | 1230 | bool (*infoframe_enabled)(struct intel_encoder *encoder, |
1185 | const struct intel_crtc_state *pipe_config); | 1231 | const struct intel_crtc_state *pipe_config); |
1186 | }; | 1232 | }; |
1187 | 1233 | ||
@@ -1281,6 +1327,12 @@ enc_to_dig_port(struct drm_encoder *encoder) | |||
1281 | return NULL; | 1327 | return NULL; |
1282 | } | 1328 | } |
1283 | 1329 | ||
1330 | static inline struct intel_digital_port * | ||
1331 | conn_to_dig_port(struct intel_connector *connector) | ||
1332 | { | ||
1333 | return enc_to_dig_port(&intel_attached_encoder(&connector->base)->base); | ||
1334 | } | ||
1335 | |||
1284 | static inline struct intel_dp_mst_encoder * | 1336 | static inline struct intel_dp_mst_encoder * |
1285 | enc_to_mst(struct drm_encoder *encoder) | 1337 | enc_to_mst(struct drm_encoder *encoder) |
1286 | { | 1338 | { |
@@ -1306,6 +1358,12 @@ static inline bool intel_encoder_is_dp(struct intel_encoder *encoder) | |||
1306 | } | 1358 | } |
1307 | } | 1359 | } |
1308 | 1360 | ||
1361 | static inline struct intel_lspcon * | ||
1362 | enc_to_intel_lspcon(struct drm_encoder *encoder) | ||
1363 | { | ||
1364 | return &enc_to_dig_port(encoder)->lspcon; | ||
1365 | } | ||
1366 | |||
1309 | static inline struct intel_digital_port * | 1367 | static inline struct intel_digital_port * |
1310 | dp_to_dig_port(struct intel_dp *intel_dp) | 1368 | dp_to_dig_port(struct intel_dp *intel_dp) |
1311 | { | 1369 | { |
@@ -1331,6 +1389,27 @@ hdmi_to_dig_port(struct intel_hdmi *intel_hdmi) | |||
1331 | } | 1389 | } |
1332 | 1390 | ||
1333 | static inline struct intel_plane_state * | 1391 | static inline struct intel_plane_state * |
1392 | intel_atomic_get_plane_state(struct intel_atomic_state *state, | ||
1393 | struct intel_plane *plane) | ||
1394 | { | ||
1395 | struct drm_plane_state *ret = | ||
1396 | drm_atomic_get_plane_state(&state->base, &plane->base); | ||
1397 | |||
1398 | if (IS_ERR(ret)) | ||
1399 | return ERR_CAST(ret); | ||
1400 | |||
1401 | return to_intel_plane_state(ret); | ||
1402 | } | ||
1403 | |||
1404 | static inline struct intel_plane_state * | ||
1405 | intel_atomic_get_old_plane_state(struct intel_atomic_state *state, | ||
1406 | struct intel_plane *plane) | ||
1407 | { | ||
1408 | return to_intel_plane_state(drm_atomic_get_old_plane_state(&state->base, | ||
1409 | &plane->base)); | ||
1410 | } | ||
1411 | |||
1412 | static inline struct intel_plane_state * | ||
1334 | intel_atomic_get_new_plane_state(struct intel_atomic_state *state, | 1413 | intel_atomic_get_new_plane_state(struct intel_atomic_state *state, |
1335 | struct intel_plane *plane) | 1414 | struct intel_plane *plane) |
1336 | { | 1415 | { |
@@ -1444,6 +1523,7 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc, | |||
1444 | void icl_unmap_plls_to_ports(struct drm_crtc *crtc, | 1523 | void icl_unmap_plls_to_ports(struct drm_crtc *crtc, |
1445 | struct intel_crtc_state *crtc_state, | 1524 | struct intel_crtc_state *crtc_state, |
1446 | struct drm_atomic_state *old_state); | 1525 | struct drm_atomic_state *old_state); |
1526 | void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); | ||
1447 | 1527 | ||
1448 | unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, | 1528 | unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, |
1449 | int color_plane, unsigned int height); | 1529 | int color_plane, unsigned int height); |
@@ -1488,7 +1568,6 @@ void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state, | |||
1488 | void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe); | 1568 | void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe); |
1489 | void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe); | 1569 | void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe); |
1490 | enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc); | 1570 | enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc); |
1491 | void intel_update_rawclk(struct drm_i915_private *dev_priv); | ||
1492 | int vlv_get_hpll_vco(struct drm_i915_private *dev_priv); | 1571 | int vlv_get_hpll_vco(struct drm_i915_private *dev_priv); |
1493 | int vlv_get_cck_clock(struct drm_i915_private *dev_priv, | 1572 | int vlv_get_cck_clock(struct drm_i915_private *dev_priv, |
1494 | const char *name, u32 reg, int ref_freq); | 1573 | const char *name, u32 reg, int ref_freq); |
@@ -1509,20 +1588,12 @@ void intel_mark_idle(struct drm_i915_private *dev_priv); | |||
1509 | int intel_display_suspend(struct drm_device *dev); | 1588 | int intel_display_suspend(struct drm_device *dev); |
1510 | void intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv); | 1589 | void intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv); |
1511 | void intel_encoder_destroy(struct drm_encoder *encoder); | 1590 | void intel_encoder_destroy(struct drm_encoder *encoder); |
1512 | int intel_connector_init(struct intel_connector *); | ||
1513 | struct intel_connector *intel_connector_alloc(void); | ||
1514 | void intel_connector_free(struct intel_connector *connector); | ||
1515 | bool intel_connector_get_hw_state(struct intel_connector *connector); | ||
1516 | void intel_connector_attach_encoder(struct intel_connector *connector, | ||
1517 | struct intel_encoder *encoder); | ||
1518 | struct drm_display_mode * | 1591 | struct drm_display_mode * |
1519 | intel_encoder_current_mode(struct intel_encoder *encoder); | 1592 | intel_encoder_current_mode(struct intel_encoder *encoder); |
1520 | bool intel_port_is_combophy(struct drm_i915_private *dev_priv, enum port port); | 1593 | bool intel_port_is_combophy(struct drm_i915_private *dev_priv, enum port port); |
1521 | bool intel_port_is_tc(struct drm_i915_private *dev_priv, enum port port); | 1594 | bool intel_port_is_tc(struct drm_i915_private *dev_priv, enum port port); |
1522 | enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, | 1595 | enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, |
1523 | enum port port); | 1596 | enum port port); |
1524 | |||
1525 | enum pipe intel_get_pipe_from_connector(struct intel_connector *connector); | ||
1526 | int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data, | 1597 | int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data, |
1527 | struct drm_file *file_priv); | 1598 | struct drm_file *file_priv); |
1528 | enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, | 1599 | enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, |
@@ -1628,9 +1699,11 @@ void bxt_enable_dc9(struct drm_i915_private *dev_priv); | |||
1628 | void bxt_disable_dc9(struct drm_i915_private *dev_priv); | 1699 | void bxt_disable_dc9(struct drm_i915_private *dev_priv); |
1629 | void gen9_enable_dc5(struct drm_i915_private *dev_priv); | 1700 | void gen9_enable_dc5(struct drm_i915_private *dev_priv); |
1630 | unsigned int skl_cdclk_get_vco(unsigned int freq); | 1701 | unsigned int skl_cdclk_get_vco(unsigned int freq); |
1702 | void skl_enable_dc6(struct drm_i915_private *dev_priv); | ||
1631 | void intel_dp_get_m_n(struct intel_crtc *crtc, | 1703 | void intel_dp_get_m_n(struct intel_crtc *crtc, |
1632 | struct intel_crtc_state *pipe_config); | 1704 | struct intel_crtc_state *pipe_config); |
1633 | void intel_dp_set_m_n(struct intel_crtc *crtc, enum link_m_n_set m_n); | 1705 | void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state, |
1706 | enum link_m_n_set m_n); | ||
1634 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); | 1707 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); |
1635 | bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock, | 1708 | bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock, |
1636 | struct dpll *best_clock); | 1709 | struct dpll *best_clock); |
@@ -1641,12 +1714,14 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state); | |||
1641 | void hsw_enable_ips(const struct intel_crtc_state *crtc_state); | 1714 | void hsw_enable_ips(const struct intel_crtc_state *crtc_state); |
1642 | void hsw_disable_ips(const struct intel_crtc_state *crtc_state); | 1715 | void hsw_disable_ips(const struct intel_crtc_state *crtc_state); |
1643 | enum intel_display_power_domain intel_port_to_power_domain(enum port port); | 1716 | enum intel_display_power_domain intel_port_to_power_domain(enum port port); |
1717 | enum intel_display_power_domain | ||
1718 | intel_aux_power_domain(struct intel_digital_port *dig_port); | ||
1644 | void intel_mode_from_pipe_config(struct drm_display_mode *mode, | 1719 | void intel_mode_from_pipe_config(struct drm_display_mode *mode, |
1645 | struct intel_crtc_state *pipe_config); | 1720 | struct intel_crtc_state *pipe_config); |
1646 | void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, | 1721 | void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, |
1647 | struct intel_crtc_state *crtc_state); | 1722 | struct intel_crtc_state *crtc_state); |
1648 | 1723 | ||
1649 | u16 skl_scaler_calc_phase(int sub, bool chroma_center); | 1724 | u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center); |
1650 | int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); | 1725 | int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state); |
1651 | int skl_max_scale(const struct intel_crtc_state *crtc_state, | 1726 | int skl_max_scale(const struct intel_crtc_state *crtc_state, |
1652 | u32 pixel_format); | 1727 | u32 pixel_format); |
@@ -1670,6 +1745,24 @@ unsigned int i9xx_plane_max_stride(struct intel_plane *plane, | |||
1670 | u32 pixel_format, u64 modifier, | 1745 | u32 pixel_format, u64 modifier, |
1671 | unsigned int rotation); | 1746 | unsigned int rotation); |
1672 | 1747 | ||
1748 | /* intel_connector.c */ | ||
1749 | int intel_connector_init(struct intel_connector *connector); | ||
1750 | struct intel_connector *intel_connector_alloc(void); | ||
1751 | void intel_connector_free(struct intel_connector *connector); | ||
1752 | void intel_connector_destroy(struct drm_connector *connector); | ||
1753 | int intel_connector_register(struct drm_connector *connector); | ||
1754 | void intel_connector_unregister(struct drm_connector *connector); | ||
1755 | void intel_connector_attach_encoder(struct intel_connector *connector, | ||
1756 | struct intel_encoder *encoder); | ||
1757 | bool intel_connector_get_hw_state(struct intel_connector *connector); | ||
1758 | enum pipe intel_connector_get_pipe(struct intel_connector *connector); | ||
1759 | int intel_connector_update_modes(struct drm_connector *connector, | ||
1760 | struct edid *edid); | ||
1761 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); | ||
1762 | void intel_attach_force_audio_property(struct drm_connector *connector); | ||
1763 | void intel_attach_broadcast_rgb_property(struct drm_connector *connector); | ||
1764 | void intel_attach_aspect_ratio_property(struct drm_connector *connector); | ||
1765 | |||
1673 | /* intel_csr.c */ | 1766 | /* intel_csr.c */ |
1674 | void intel_csr_ucode_init(struct drm_i915_private *); | 1767 | void intel_csr_ucode_init(struct drm_i915_private *); |
1675 | void intel_csr_load_program(struct drm_i915_private *); | 1768 | void intel_csr_load_program(struct drm_i915_private *); |
@@ -1728,9 +1821,6 @@ void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv, | |||
1728 | unsigned int frontbuffer_bits); | 1821 | unsigned int frontbuffer_bits); |
1729 | void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, | 1822 | void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, |
1730 | unsigned int frontbuffer_bits); | 1823 | unsigned int frontbuffer_bits); |
1731 | void icl_program_mg_dp_mode(struct intel_dp *intel_dp); | ||
1732 | void icl_enable_phy_clock_gating(struct intel_digital_port *dig_port); | ||
1733 | void icl_disable_phy_clock_gating(struct intel_digital_port *dig_port); | ||
1734 | 1824 | ||
1735 | void | 1825 | void |
1736 | intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, | 1826 | intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, |
@@ -1748,6 +1838,10 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); | |||
1748 | bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); | 1838 | bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); |
1749 | bool | 1839 | bool |
1750 | intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); | 1840 | intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); |
1841 | uint16_t intel_dp_dsc_get_output_bpp(int link_clock, uint8_t lane_count, | ||
1842 | int mode_clock, int mode_hdisplay); | ||
1843 | uint8_t intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp, int mode_clock, | ||
1844 | int mode_hdisplay); | ||
1751 | 1845 | ||
1752 | static inline unsigned int intel_dp_unused_lane_mask(int lane_count) | 1846 | static inline unsigned int intel_dp_unused_lane_mask(int lane_count) |
1753 | { | 1847 | { |
@@ -1768,6 +1862,9 @@ void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); | |||
1768 | /* vlv_dsi.c */ | 1862 | /* vlv_dsi.c */ |
1769 | void vlv_dsi_init(struct drm_i915_private *dev_priv); | 1863 | void vlv_dsi_init(struct drm_i915_private *dev_priv); |
1770 | 1864 | ||
1865 | /* icl_dsi.c */ | ||
1866 | void icl_dsi_init(struct drm_i915_private *dev_priv); | ||
1867 | |||
1771 | /* intel_dsi_dcs_backlight.c */ | 1868 | /* intel_dsi_dcs_backlight.c */ |
1772 | int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector); | 1869 | int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector); |
1773 | 1870 | ||
@@ -1858,7 +1955,6 @@ bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder, | |||
1858 | void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable); | 1955 | void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable); |
1859 | void intel_infoframe_init(struct intel_digital_port *intel_dig_port); | 1956 | void intel_infoframe_init(struct intel_digital_port *intel_dig_port); |
1860 | 1957 | ||
1861 | |||
1862 | /* intel_lvds.c */ | 1958 | /* intel_lvds.c */ |
1863 | bool intel_lvds_port_enabled(struct drm_i915_private *dev_priv, | 1959 | bool intel_lvds_port_enabled(struct drm_i915_private *dev_priv, |
1864 | i915_reg_t lvds_reg, enum pipe *pipe); | 1960 | i915_reg_t lvds_reg, enum pipe *pipe); |
@@ -1866,19 +1962,9 @@ void intel_lvds_init(struct drm_i915_private *dev_priv); | |||
1866 | struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev); | 1962 | struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev); |
1867 | bool intel_is_dual_link_lvds(struct drm_device *dev); | 1963 | bool intel_is_dual_link_lvds(struct drm_device *dev); |
1868 | 1964 | ||
1869 | |||
1870 | /* intel_modes.c */ | ||
1871 | int intel_connector_update_modes(struct drm_connector *connector, | ||
1872 | struct edid *edid); | ||
1873 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); | ||
1874 | void intel_attach_force_audio_property(struct drm_connector *connector); | ||
1875 | void intel_attach_broadcast_rgb_property(struct drm_connector *connector); | ||
1876 | void intel_attach_aspect_ratio_property(struct drm_connector *connector); | ||
1877 | |||
1878 | |||
1879 | /* intel_overlay.c */ | 1965 | /* intel_overlay.c */ |
1880 | void intel_setup_overlay(struct drm_i915_private *dev_priv); | 1966 | void intel_overlay_setup(struct drm_i915_private *dev_priv); |
1881 | void intel_cleanup_overlay(struct drm_i915_private *dev_priv); | 1967 | void intel_overlay_cleanup(struct drm_i915_private *dev_priv); |
1882 | int intel_overlay_switch_off(struct intel_overlay *overlay); | 1968 | int intel_overlay_switch_off(struct intel_overlay *overlay); |
1883 | int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data, | 1969 | int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data, |
1884 | struct drm_file *file_priv); | 1970 | struct drm_file *file_priv); |
@@ -1907,7 +1993,6 @@ int intel_panel_setup_backlight(struct drm_connector *connector, | |||
1907 | void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, | 1993 | void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, |
1908 | const struct drm_connector_state *conn_state); | 1994 | const struct drm_connector_state *conn_state); |
1909 | void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state); | 1995 | void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state); |
1910 | void intel_panel_destroy_backlight(struct drm_connector *connector); | ||
1911 | extern struct drm_display_mode *intel_find_panel_downclock( | 1996 | extern struct drm_display_mode *intel_find_panel_downclock( |
1912 | struct drm_i915_private *dev_priv, | 1997 | struct drm_i915_private *dev_priv, |
1913 | struct drm_display_mode *fixed_mode, | 1998 | struct drm_display_mode *fixed_mode, |
@@ -1936,6 +2021,7 @@ int intel_hdcp_enable(struct intel_connector *connector); | |||
1936 | int intel_hdcp_disable(struct intel_connector *connector); | 2021 | int intel_hdcp_disable(struct intel_connector *connector); |
1937 | int intel_hdcp_check_link(struct intel_connector *connector); | 2022 | int intel_hdcp_check_link(struct intel_connector *connector); |
1938 | bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port); | 2023 | bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port); |
2024 | bool intel_hdcp_capable(struct intel_connector *connector); | ||
1939 | 2025 | ||
1940 | /* intel_psr.c */ | 2026 | /* intel_psr.c */ |
1941 | #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) | 2027 | #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) |
@@ -1962,11 +2048,16 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp); | |||
1962 | int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, | 2048 | int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, |
1963 | u32 *out_value); | 2049 | u32 *out_value); |
1964 | 2050 | ||
2051 | /* intel_quirks.c */ | ||
2052 | void intel_init_quirks(struct drm_i915_private *dev_priv); | ||
2053 | |||
1965 | /* intel_runtime_pm.c */ | 2054 | /* intel_runtime_pm.c */ |
1966 | int intel_power_domains_init(struct drm_i915_private *); | 2055 | int intel_power_domains_init(struct drm_i915_private *); |
1967 | void intel_power_domains_cleanup(struct drm_i915_private *dev_priv); | 2056 | void intel_power_domains_cleanup(struct drm_i915_private *dev_priv); |
1968 | void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume); | 2057 | void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume); |
1969 | void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv); | 2058 | void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv); |
2059 | void icl_display_core_init(struct drm_i915_private *dev_priv, bool resume); | ||
2060 | void icl_display_core_uninit(struct drm_i915_private *dev_priv); | ||
1970 | void intel_power_domains_enable(struct drm_i915_private *dev_priv); | 2061 | void intel_power_domains_enable(struct drm_i915_private *dev_priv); |
1971 | void intel_power_domains_disable(struct drm_i915_private *dev_priv); | 2062 | void intel_power_domains_disable(struct drm_i915_private *dev_priv); |
1972 | 2063 | ||
@@ -2101,10 +2192,9 @@ int intel_enable_sagv(struct drm_i915_private *dev_priv); | |||
2101 | int intel_disable_sagv(struct drm_i915_private *dev_priv); | 2192 | int intel_disable_sagv(struct drm_i915_private *dev_priv); |
2102 | bool skl_wm_level_equals(const struct skl_wm_level *l1, | 2193 | bool skl_wm_level_equals(const struct skl_wm_level *l1, |
2103 | const struct skl_wm_level *l2); | 2194 | const struct skl_wm_level *l2); |
2104 | bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv, | 2195 | bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb, |
2105 | const struct skl_ddb_entry **entries, | 2196 | const struct skl_ddb_entry entries[], |
2106 | const struct skl_ddb_entry *ddb, | 2197 | int num_entries, int ignore_idx); |
2107 | int ignore); | ||
2108 | bool ilk_disable_lp_wm(struct drm_device *dev); | 2198 | bool ilk_disable_lp_wm(struct drm_device *dev); |
2109 | int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc, | 2199 | int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc, |
2110 | struct intel_crtc_state *cstate); | 2200 | struct intel_crtc_state *cstate); |
@@ -2127,23 +2217,29 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data, | |||
2127 | struct drm_file *file_priv); | 2217 | struct drm_file *file_priv); |
2128 | void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state); | 2218 | void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state); |
2129 | void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state); | 2219 | void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state); |
2130 | void skl_update_plane(struct intel_plane *plane, | ||
2131 | const struct intel_crtc_state *crtc_state, | ||
2132 | const struct intel_plane_state *plane_state); | ||
2133 | void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc); | ||
2134 | bool skl_plane_get_hw_state(struct intel_plane *plane, enum pipe *pipe); | ||
2135 | bool skl_plane_has_ccs(struct drm_i915_private *dev_priv, | ||
2136 | enum pipe pipe, enum plane_id plane_id); | ||
2137 | bool skl_plane_has_planar(struct drm_i915_private *dev_priv, | ||
2138 | enum pipe pipe, enum plane_id plane_id); | ||
2139 | unsigned int skl_plane_max_stride(struct intel_plane *plane, | ||
2140 | u32 pixel_format, u64 modifier, | ||
2141 | unsigned int rotation); | ||
2142 | int skl_plane_check(struct intel_crtc_state *crtc_state, | ||
2143 | struct intel_plane_state *plane_state); | ||
2144 | int intel_plane_check_stride(const struct intel_plane_state *plane_state); | 2220 | int intel_plane_check_stride(const struct intel_plane_state *plane_state); |
2145 | int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state); | 2221 | int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state); |
2146 | int chv_plane_check_rotation(const struct intel_plane_state *plane_state); | 2222 | int chv_plane_check_rotation(const struct intel_plane_state *plane_state); |
2223 | struct intel_plane * | ||
2224 | skl_universal_plane_create(struct drm_i915_private *dev_priv, | ||
2225 | enum pipe pipe, enum plane_id plane_id); | ||
2226 | |||
2227 | static inline bool icl_is_nv12_y_plane(enum plane_id id) | ||
2228 | { | ||
2229 | /* Don't need to do a gen check, these planes are only available on gen11 */ | ||
2230 | if (id == PLANE_SPRITE4 || id == PLANE_SPRITE5) | ||
2231 | return true; | ||
2232 | |||
2233 | return false; | ||
2234 | } | ||
2235 | |||
2236 | static inline bool icl_is_hdr_plane(struct intel_plane *plane) | ||
2237 | { | ||
2238 | if (INTEL_GEN(to_i915(plane->base.dev)) < 11) | ||
2239 | return false; | ||
2240 | |||
2241 | return plane->id < PLANE_SPRITE2; | ||
2242 | } | ||
2147 | 2243 | ||
2148 | /* intel_tv.c */ | 2244 | /* intel_tv.c */ |
2149 | void intel_tv_init(struct drm_i915_private *dev_priv); | 2245 | void intel_tv_init(struct drm_i915_private *dev_priv); |
@@ -2185,11 +2281,16 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, | |||
2185 | struct intel_crtc_state *crtc_state); | 2281 | struct intel_crtc_state *crtc_state); |
2186 | 2282 | ||
2187 | /* intel_atomic_plane.c */ | 2283 | /* intel_atomic_plane.c */ |
2188 | struct intel_plane_state *intel_create_plane_state(struct drm_plane *plane); | 2284 | struct intel_plane *intel_plane_alloc(void); |
2285 | void intel_plane_free(struct intel_plane *plane); | ||
2189 | struct drm_plane_state *intel_plane_duplicate_state(struct drm_plane *plane); | 2286 | struct drm_plane_state *intel_plane_duplicate_state(struct drm_plane *plane); |
2190 | void intel_plane_destroy_state(struct drm_plane *plane, | 2287 | void intel_plane_destroy_state(struct drm_plane *plane, |
2191 | struct drm_plane_state *state); | 2288 | struct drm_plane_state *state); |
2192 | extern const struct drm_plane_helper_funcs intel_plane_helper_funcs; | 2289 | extern const struct drm_plane_helper_funcs intel_plane_helper_funcs; |
2290 | void intel_update_planes_on_crtc(struct intel_atomic_state *old_state, | ||
2291 | struct intel_crtc *crtc, | ||
2292 | struct intel_crtc_state *old_crtc_state, | ||
2293 | struct intel_crtc_state *new_crtc_state); | ||
2193 | int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state, | 2294 | int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state, |
2194 | struct intel_crtc_state *crtc_state, | 2295 | struct intel_crtc_state *crtc_state, |
2195 | const struct intel_plane_state *old_plane_state, | 2296 | const struct intel_plane_state *old_plane_state, |
@@ -2205,6 +2306,18 @@ void intel_color_load_luts(struct drm_crtc_state *crtc_state); | |||
2205 | bool lspcon_init(struct intel_digital_port *intel_dig_port); | 2306 | bool lspcon_init(struct intel_digital_port *intel_dig_port); |
2206 | void lspcon_resume(struct intel_lspcon *lspcon); | 2307 | void lspcon_resume(struct intel_lspcon *lspcon); |
2207 | void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon); | 2308 | void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon); |
2309 | void lspcon_write_infoframe(struct intel_encoder *encoder, | ||
2310 | const struct intel_crtc_state *crtc_state, | ||
2311 | unsigned int type, | ||
2312 | const void *buf, ssize_t len); | ||
2313 | void lspcon_set_infoframes(struct intel_encoder *encoder, | ||
2314 | bool enable, | ||
2315 | const struct intel_crtc_state *crtc_state, | ||
2316 | const struct drm_connector_state *conn_state); | ||
2317 | bool lspcon_infoframe_enabled(struct intel_encoder *encoder, | ||
2318 | const struct intel_crtc_state *pipe_config); | ||
2319 | void lspcon_ycbcr420_config(struct drm_connector *connector, | ||
2320 | struct intel_crtc_state *crtc_state); | ||
2208 | 2321 | ||
2209 | /* intel_pipe_crc.c */ | 2322 | /* intel_pipe_crc.c */ |
2210 | #ifdef CONFIG_DEBUG_FS | 2323 | #ifdef CONFIG_DEBUG_FS |