diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_request.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_request.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_request.h b/drivers/gpu/drm/i915/i915_request.h index eddbd4245cb3..7ee220ded9c9 100644 --- a/drivers/gpu/drm/i915/i915_request.h +++ b/drivers/gpu/drm/i915/i915_request.h | |||
| @@ -93,8 +93,9 @@ struct i915_request { | |||
| 93 | * i915_request_free() will then decrement the refcount on the | 93 | * i915_request_free() will then decrement the refcount on the |
| 94 | * context. | 94 | * context. |
| 95 | */ | 95 | */ |
| 96 | struct i915_gem_context *ctx; | 96 | struct i915_gem_context *gem_context; |
| 97 | struct intel_engine_cs *engine; | 97 | struct intel_engine_cs *engine; |
| 98 | struct intel_context *hw_context; | ||
| 98 | struct intel_ring *ring; | 99 | struct intel_ring *ring; |
| 99 | struct i915_timeline *timeline; | 100 | struct i915_timeline *timeline; |
| 100 | struct intel_signal_node signaling; | 101 | struct intel_signal_node signaling; |
| @@ -133,6 +134,9 @@ struct i915_request { | |||
| 133 | /** Position in the ring of the start of the request */ | 134 | /** Position in the ring of the start of the request */ |
| 134 | u32 head; | 135 | u32 head; |
| 135 | 136 | ||
| 137 | /** Position in the ring of the start of the user packets */ | ||
| 138 | u32 infix; | ||
| 139 | |||
| 136 | /** | 140 | /** |
| 137 | * Position in the ring of the start of the postfix. | 141 | * Position in the ring of the start of the postfix. |
| 138 | * This is required to calculate the maximum available ring space | 142 | * This is required to calculate the maximum available ring space |
| @@ -249,9 +253,7 @@ int i915_request_await_object(struct i915_request *to, | |||
| 249 | int i915_request_await_dma_fence(struct i915_request *rq, | 253 | int i915_request_await_dma_fence(struct i915_request *rq, |
| 250 | struct dma_fence *fence); | 254 | struct dma_fence *fence); |
| 251 | 255 | ||
| 252 | void __i915_request_add(struct i915_request *rq, bool flush_caches); | 256 | void i915_request_add(struct i915_request *rq); |
| 253 | #define i915_request_add(rq) \ | ||
| 254 | __i915_request_add(rq, false) | ||
| 255 | 257 | ||
| 256 | void __i915_request_submit(struct i915_request *request); | 258 | void __i915_request_submit(struct i915_request *request); |
| 257 | void i915_request_submit(struct i915_request *request); | 259 | void i915_request_submit(struct i915_request *request); |
| @@ -266,6 +268,7 @@ long i915_request_wait(struct i915_request *rq, | |||
| 266 | #define I915_WAIT_INTERRUPTIBLE BIT(0) | 268 | #define I915_WAIT_INTERRUPTIBLE BIT(0) |
| 267 | #define I915_WAIT_LOCKED BIT(1) /* struct_mutex held, handle GPU reset */ | 269 | #define I915_WAIT_LOCKED BIT(1) /* struct_mutex held, handle GPU reset */ |
| 268 | #define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */ | 270 | #define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */ |
| 271 | #define I915_WAIT_FOR_IDLE_BOOST BIT(3) | ||
| 269 | 272 | ||
| 270 | static inline u32 intel_engine_get_seqno(struct intel_engine_cs *engine); | 273 | static inline u32 intel_engine_get_seqno(struct intel_engine_cs *engine); |
| 271 | 274 | ||
