1 files changed, 45 insertions, 196 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8624b4bdc242..4064e49dbf70 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -54,6 +54,7 @@
 #include <drm/drm_cache.h>
 #include <drm/drm_util.h>
 
+#include "i915_fixed.h"
 #include "i915_params.h"
 #include "i915_reg.h"
 #include "i915_utils.h"
@@ -87,8 +88,8 @@
 
 #define DRIVER_NAME             "i915"
 #define DRIVER_DESC             "Intel Graphics"
-#define DRIVER_DATE             "20180921"
-#define DRIVER_TIMESTAMP        1537521997
+#define DRIVER_DATE             "20181122"
+#define DRIVER_TIMESTAMP        1542898187
 
 /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
  * WARN_ON()) for hw state sanity checks to check for unexpected conditions
@@ -127,144 +128,6 @@ bool i915_error_injected(void);
         __i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \
                       fmt, ##__VA_ARGS__)
 
-typedef struct {
-        uint32_t val;
-} uint_fixed_16_16_t;
-
-#define FP_16_16_MAX ({ \
-        uint_fixed_16_16_t fp; \
-        fp.val = UINT_MAX; \
-        fp; \
-})
-
-static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
-{
-        if (val.val == 0)
-                return true;
-        return false;
-}
-
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
-{
-        uint_fixed_16_16_t fp;
-
-        WARN_ON(val > U16_MAX);
-
-        fp.val = val << 16;
-        return fp;
-}
-
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
-{
-        return DIV_ROUND_UP(fp.val, 1 << 16);
-}
-
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
-{
-        return fp.val >> 16;
-}
-
-static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
-                                                 uint_fixed_16_16_t min2)
-{
-        uint_fixed_16_16_t min;
-
-        min.val = min(min1.val, min2.val);
-        return min;
-}
-
-static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
-                                                 uint_fixed_16_16_t max2)
-{
-        uint_fixed_16_16_t max;
-
-        max.val = max(max1.val, max2.val);
-        return max;
-}
-
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
-{
-        uint_fixed_16_16_t fp;
-        WARN_ON(val > U32_MAX);
-        fp.val = (uint32_t) val;
-        return fp;
-}
-
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
-                                            uint_fixed_16_16_t d)
-{
-        return DIV_ROUND_UP(val.val, d.val);
-}
-
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
-                                                uint_fixed_16_16_t mul)
-{
-        uint64_t intermediate_val;
-
-        intermediate_val = (uint64_t) val * mul.val;
-        intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
-        WARN_ON(intermediate_val > U32_MAX);
-        return (uint32_t) intermediate_val;
-}
-
-static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
-                                             uint_fixed_16_16_t mul)
-{
-        uint64_t intermediate_val;
-
-        intermediate_val = (uint64_t) val.val * mul.val;
-        intermediate_val = intermediate_val >> 16;
-        return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
-{
-        uint64_t interm_val;
-
-        interm_val = (uint64_t)val << 16;
-        interm_val = DIV_ROUND_UP_ULL(interm_val, d);
-        return clamp_u64_to_fixed16(interm_val);
-}
-
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
-                                                uint_fixed_16_16_t d)
-{
-        uint64_t interm_val;
-
-        interm_val = (uint64_t)val << 16;
-        interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
-        WARN_ON(interm_val > U32_MAX);
-        return (uint32_t) interm_val;
-}
-
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
-                                                     uint_fixed_16_16_t mul)
-{
-        uint64_t intermediate_val;
-
-        intermediate_val = (uint64_t) val * mul.val;
-        return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
-                                             uint_fixed_16_16_t add2)
-{
-        uint64_t interm_sum;
-
-        interm_sum = (uint64_t) add1.val + add2.val;
-        return clamp_u64_to_fixed16(interm_sum);
-}
-
-static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
-                                                 uint32_t add2)
-{
-        uint64_t interm_sum;
-        uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
-
-        interm_sum = (uint64_t) add1.val + interm_add2.val;
-        return clamp_u64_to_fixed16(interm_sum);
-}
-
 enum hpd_pin {
         HPD_NONE = 0,
         HPD_TV = HPD_NONE,     /* TV is known to be unreliable */
@@ -283,7 +146,8 @@ enum hpd_pin {
 #define for_each_hpd_pin(__pin) \
         for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
 
-#define HPD_STORM_DEFAULT_THRESHOLD 5
+/* Threshold == 5 for long IRQs, 50 for short */
+#define HPD_STORM_DEFAULT_THRESHOLD 50
 
 struct i915_hotplug {
         struct work_struct hotplug_work;
@@ -308,6 +172,8 @@ struct i915_hotplug {
         bool poll_enabled;
 
         unsigned int hpd_storm_threshold;
+        /* Whether or not to count short HPD IRQs in HPD storms */
+        u8 hpd_short_storm_enabled;
 
         /*
          * if we get a HPD irq from DP and a HPD irq from non-DP
@@ -465,8 +331,10 @@ struct drm_i915_display_funcs {
 struct intel_csr {
         struct work_struct work;
         const char *fw_path;
+        uint32_t required_version;
+        uint32_t max_fw_size; /* bytes */
         uint32_t *dmc_payload;
-        uint32_t dmc_fw_size;
+        uint32_t dmc_fw_size; /* dwords */
         uint32_t version;
         uint32_t mmio_count;
         i915_reg_t mmioaddr[8];
@@ -546,6 +414,8 @@ struct intel_fbc {
                         int adjusted_y;
 
                         int y;
+
+                        uint16_t pixel_blend_mode;
                 } plane;
 
                 struct {
@@ -630,7 +500,6 @@ struct i915_psr {
         bool sink_psr2_support;
         bool link_standby;
         bool colorimetry_support;
-        bool alpm;
         bool psr2_enabled;
         u8 sink_sync_latency;
         ktime_t last_entry_attempt;
@@ -918,6 +787,11 @@ struct i915_power_well_desc {
                         /* The pw is backing the VGA functionality */
                         bool has_vga:1;
                         bool has_fuses:1;
+                        /*
+                         * The pw is for an ICL+ TypeC PHY port in
+                         * Thunderbolt mode.
+                         */
+                        bool is_tc_tbt:1;
                 } hsw;
         };
         const struct i915_power_well_ops *ops;
@@ -1042,17 +916,6 @@ struct i915_gem_mm {
 
 #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
 
-#define DP_AUX_A 0x40
-#define DP_AUX_B 0x10
-#define DP_AUX_C 0x20
-#define DP_AUX_D 0x30
-#define DP_AUX_E 0x50
-#define DP_AUX_F 0x60
-
-#define DDC_PIN_B  0x05
-#define DDC_PIN_C  0x04
-#define DDC_PIN_D  0x06
-
 struct ddi_vbt_port_info {
         int max_tmds_clock;
 
@@ -1099,6 +962,7 @@ struct intel_vbt_data {
         unsigned int panel_type:4;
         int lvds_ssc_freq;
         unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
+        enum drm_panel_orientation orientation;
 
         enum drrs_support_type drrs_type;
 
@@ -1144,6 +1008,7 @@ struct intel_vbt_data {
                 u8 *data;
                 const u8 *sequence[MIPI_SEQ_MAX];
                 u8 *deassert_seq; /* Used by fixup_mipi_sequences() */
+                enum drm_panel_orientation orientation;
         } dsi;
 
         int crt_ddc_pin;
@@ -1240,9 +1105,9 @@ struct skl_ddb_values {
 };
 
 struct skl_wm_level {
-        bool plane_en;
         uint16_t plane_res_b;
         uint8_t plane_res_l;
+        bool plane_en;
 };
 
 /* Stores plane specific WM parameters */
@@ -1520,30 +1385,12 @@ struct i915_oa_ops {
         bool (*is_valid_flex_reg)(struct drm_i915_private *dev_priv, u32 addr);
 
         /**
-         * @init_oa_buffer: Resets the head and tail pointers of the
-         * circular buffer for periodic OA reports.
-         *
-         * Called when first opening a stream for OA metrics, but also may be
-         * called in response to an OA buffer overflow or other error
-         * condition.
-         *
-         * Note it may be necessary to clear the full OA buffer here as part of
-         * maintaining the invariable that new reports must be written to
-         * zeroed memory for us to be able to reliable detect if an expected
-         * report has not yet landed in memory.  (At least on Haswell the OA
-         * buffer tail pointer is not synchronized with reports being visible
-         * to the CPU)
-         */
-        void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
-
-        /**
          * @enable_metric_set: Selects and applies any MUX configuration to set
          * up the Boolean and Custom (B/C) counters that are part of the
          * counter reports being sampled. May apply system constraints such as
          * disabling EU clock gating as required.
          */
-        int (*enable_metric_set)(struct drm_i915_private *dev_priv,
-                                 const struct i915_oa_config *oa_config);
+        int (*enable_metric_set)(struct i915_perf_stream *stream);
 
         /**
          * @disable_metric_set: Remove system constraints associated with using
@@ -1554,12 +1401,12 @@ struct i915_oa_ops {
         /**
          * @oa_enable: Enable periodic sampling
          */
-        void (*oa_enable)(struct drm_i915_private *dev_priv);
+        void (*oa_enable)(struct i915_perf_stream *stream);
 
         /**
          * @oa_disable: Disable periodic sampling
          */
-        void (*oa_disable)(struct drm_i915_private *dev_priv);
+        void (*oa_disable)(struct i915_perf_stream *stream);
 
         /**
          * @read: Copy data from the circular OA buffer into a given userspace
@@ -1948,7 +1795,6 @@ struct drm_i915_private {
 
         struct dram_info {
                 bool valid;
-                bool valid_dimm;
                 bool is_16gb_dimm;
                 u8 num_channels;
                 enum dram_rank {
@@ -2323,6 +2169,8 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
              (((__iter).curr += PAGE_SIZE) >= (__iter).max) ?           \
              (__iter) = __sgt_iter(__sg_next((__iter).sgp), false), 0 : 0)
 
+bool i915_sg_trim(struct sg_table *orig_st);
+
 static inline unsigned int i915_sg_page_sizes(struct scatterlist *sg)
 {
         unsigned int page_sizes;
@@ -2368,20 +2216,12 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define REVID_FOREVER           0xff
 #define INTEL_REVID(dev_priv)   ((dev_priv)->drm.pdev->revision)
 
-#define GEN_FOREVER (0)
-
 #define INTEL_GEN_MASK(s, e) ( \
         BUILD_BUG_ON_ZERO(!__builtin_constant_p(s)) + \
         BUILD_BUG_ON_ZERO(!__builtin_constant_p(e)) + \
-        GENMASK((e) != GEN_FOREVER ? (e) - 1 : BITS_PER_LONG - 1, \
-                (s) != GEN_FOREVER ? (s) - 1 : 0) \
-)
+        GENMASK((e) - 1, (s) - 1))
 
-/*
- * Returns true if Gen is in inclusive range [Start, End].
- *
- * Use GEN_FOREVER for unbound start and or end.
- */
+/* Returns true if Gen is in inclusive range [Start, End] */
 #define IS_GEN(dev_priv, s, e) \
         (!!((dev_priv)->info.gen_mask & INTEL_GEN_MASK((s), (e))))
 
@@ -2462,6 +2302,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_KBL_ULX(dev_priv)    (INTEL_DEVID(dev_priv) == 0x590E || \
                                  INTEL_DEVID(dev_priv) == 0x5915 || \
                                  INTEL_DEVID(dev_priv) == 0x591E)
+#define IS_AML_ULX(dev_priv)    (INTEL_DEVID(dev_priv) == 0x591C || \
+                                 INTEL_DEVID(dev_priv) == 0x87C0)
 #define IS_SKL_GT2(dev_priv)    (IS_SKYLAKE(dev_priv) && \
                                  (dev_priv)->info.gt == 2)
 #define IS_SKL_GT3(dev_priv)    (IS_SKYLAKE(dev_priv) && \
@@ -2593,9 +2435,14 @@ intel_info(const struct drm_i915_private *dev_priv)
 
 #define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
 
-#define USES_PPGTT(dev_priv)            (i915_modparams.enable_ppgtt)
-#define USES_FULL_PPGTT(dev_priv)       (i915_modparams.enable_ppgtt >= 2)
-#define USES_FULL_48BIT_PPGTT(dev_priv) (i915_modparams.enable_ppgtt == 3)
+#define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt)
+#define HAS_PPGTT(dev_priv) \
+        (INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
+#define HAS_FULL_PPGTT(dev_priv) \
+        (INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
+#define HAS_FULL_48BIT_PPGTT(dev_priv)  \
+        (INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL_4LVL)
+
 #define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
         GEM_BUG_ON((sizes) == 0); \
         ((sizes) & ~(dev_priv)->info.page_sizes) == 0; \
@@ -2743,9 +2590,6 @@ intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *dev_priv)
         return IS_BROXTON(dev_priv) && intel_vtd_active();
 }
 
-int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
-                                int enable_ppgtt);
-
 /* i915_drv.c */
 void __printf(3, 4)
 __i915_printk(struct drm_i915_private *dev_priv, const char *level,
@@ -3230,7 +3074,7 @@ int i915_gem_object_wait(struct drm_i915_gem_object *obj,
 int i915_gem_object_wait_priority(struct drm_i915_gem_object *obj,
                                   unsigned int flags,
                                   const struct i915_sched_attr *attr);
-#define I915_PRIORITY_DISPLAY I915_PRIORITY_MAX
+#define I915_PRIORITY_DISPLAY I915_USER_PRIORITY(I915_PRIORITY_MAX)
 
 int __must_check
 i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write);
@@ -3462,6 +3306,7 @@ bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
                                      enum port port);
 bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
                                 enum port port);
+enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
 
 /* intel_acpi.c */
 #ifdef CONFIG_ACPI
@@ -3483,8 +3328,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
 extern void intel_modeset_init_hw(struct drm_device *dev);
 extern int intel_modeset_init(struct drm_device *dev);
 extern void intel_modeset_cleanup(struct drm_device *dev);
-extern int intel_connector_register(struct drm_connector *);
-extern void intel_connector_unregister(struct drm_connector *);
 extern int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv,
                                        bool state);
 extern void intel_display_resume(struct drm_device *dev);
@@ -3584,6 +3427,12 @@ void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder,
 void vlv_phy_reset_lanes(struct intel_encoder *encoder,
                          const struct intel_crtc_state *old_crtc_state);
 
+/* intel_combo_phy.c */
+void icl_combo_phys_init(struct drm_i915_private *dev_priv);
+void icl_combo_phys_uninit(struct drm_i915_private *dev_priv);
+void cnl_combo_phys_init(struct drm_i915_private *dev_priv);
+void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv);
+
 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
 u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,