diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 241 |
1 files changed, 196 insertions, 45 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 4f3ac0a12889..7f455bca528e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1788,6 +1788,8 @@ static int i915_emon_status(struct seq_file *m, void *unused) | |||
1788 | if (!IS_GEN5(dev_priv)) | 1788 | if (!IS_GEN5(dev_priv)) |
1789 | return -ENODEV; | 1789 | return -ENODEV; |
1790 | 1790 | ||
1791 | intel_runtime_pm_get(dev_priv); | ||
1792 | |||
1791 | ret = mutex_lock_interruptible(&dev->struct_mutex); | 1793 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
1792 | if (ret) | 1794 | if (ret) |
1793 | return ret; | 1795 | return ret; |
@@ -1802,6 +1804,8 @@ static int i915_emon_status(struct seq_file *m, void *unused) | |||
1802 | seq_printf(m, "GFX power: %ld\n", gfx); | 1804 | seq_printf(m, "GFX power: %ld\n", gfx); |
1803 | seq_printf(m, "Total power: %ld\n", chipset + gfx); | 1805 | seq_printf(m, "Total power: %ld\n", chipset + gfx); |
1804 | 1806 | ||
1807 | intel_runtime_pm_put(dev_priv); | ||
1808 | |||
1805 | return 0; | 1809 | return 0; |
1806 | } | 1810 | } |
1807 | 1811 | ||
@@ -2215,8 +2219,23 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) | |||
2215 | struct drm_i915_private *dev_priv = node_to_i915(m->private); | 2219 | struct drm_i915_private *dev_priv = node_to_i915(m->private); |
2216 | struct drm_device *dev = &dev_priv->drm; | 2220 | struct drm_device *dev = &dev_priv->drm; |
2217 | struct intel_rps *rps = &dev_priv->gt_pm.rps; | 2221 | struct intel_rps *rps = &dev_priv->gt_pm.rps; |
2222 | u32 act_freq = rps->cur_freq; | ||
2218 | struct drm_file *file; | 2223 | struct drm_file *file; |
2219 | 2224 | ||
2225 | if (intel_runtime_pm_get_if_in_use(dev_priv)) { | ||
2226 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { | ||
2227 | mutex_lock(&dev_priv->pcu_lock); | ||
2228 | act_freq = vlv_punit_read(dev_priv, | ||
2229 | PUNIT_REG_GPU_FREQ_STS); | ||
2230 | act_freq = (act_freq >> 8) & 0xff; | ||
2231 | mutex_unlock(&dev_priv->pcu_lock); | ||
2232 | } else { | ||
2233 | act_freq = intel_get_cagf(dev_priv, | ||
2234 | I915_READ(GEN6_RPSTAT1)); | ||
2235 | } | ||
2236 | intel_runtime_pm_put(dev_priv); | ||
2237 | } | ||
2238 | |||
2220 | seq_printf(m, "RPS enabled? %d\n", rps->enabled); | 2239 | seq_printf(m, "RPS enabled? %d\n", rps->enabled); |
2221 | seq_printf(m, "GPU busy? %s [%d requests]\n", | 2240 | seq_printf(m, "GPU busy? %s [%d requests]\n", |
2222 | yesno(dev_priv->gt.awake), dev_priv->gt.active_requests); | 2241 | yesno(dev_priv->gt.awake), dev_priv->gt.active_requests); |
@@ -2224,8 +2243,9 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) | |||
2224 | seq_printf(m, "Boosts outstanding? %d\n", | 2243 | seq_printf(m, "Boosts outstanding? %d\n", |
2225 | atomic_read(&rps->num_waiters)); | 2244 | atomic_read(&rps->num_waiters)); |
2226 | seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive)); | 2245 | seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive)); |
2227 | seq_printf(m, "Frequency requested %d\n", | 2246 | seq_printf(m, "Frequency requested %d, actual %d\n", |
2228 | intel_gpu_freq(dev_priv, rps->cur_freq)); | 2247 | intel_gpu_freq(dev_priv, rps->cur_freq), |
2248 | intel_gpu_freq(dev_priv, act_freq)); | ||
2229 | seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n", | 2249 | seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n", |
2230 | intel_gpu_freq(dev_priv, rps->min_freq), | 2250 | intel_gpu_freq(dev_priv, rps->min_freq), |
2231 | intel_gpu_freq(dev_priv, rps->min_freq_softlimit), | 2251 | intel_gpu_freq(dev_priv, rps->min_freq_softlimit), |
@@ -2900,16 +2920,15 @@ static int i915_dmc_info(struct seq_file *m, void *unused) | |||
2900 | seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), | 2920 | seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), |
2901 | CSR_VERSION_MINOR(csr->version)); | 2921 | CSR_VERSION_MINOR(csr->version)); |
2902 | 2922 | ||
2903 | if (IS_KABYLAKE(dev_priv) || | 2923 | if (WARN_ON(INTEL_GEN(dev_priv) > 11)) |
2904 | (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) { | 2924 | goto out; |
2905 | seq_printf(m, "DC3 -> DC5 count: %d\n", | 2925 | |
2906 | I915_READ(SKL_CSR_DC3_DC5_COUNT)); | 2926 | seq_printf(m, "DC3 -> DC5 count: %d\n", |
2927 | I915_READ(IS_BROXTON(dev_priv) ? BXT_CSR_DC3_DC5_COUNT : | ||
2928 | SKL_CSR_DC3_DC5_COUNT)); | ||
2929 | if (!IS_GEN9_LP(dev_priv)) | ||
2907 | seq_printf(m, "DC5 -> DC6 count: %d\n", | 2930 | seq_printf(m, "DC5 -> DC6 count: %d\n", |
2908 | I915_READ(SKL_CSR_DC5_DC6_COUNT)); | 2931 | I915_READ(SKL_CSR_DC5_DC6_COUNT)); |
2909 | } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { | ||
2910 | seq_printf(m, "DC3 -> DC5 count: %d\n", | ||
2911 | I915_READ(BXT_CSR_DC3_DC5_COUNT)); | ||
2912 | } | ||
2913 | 2932 | ||
2914 | out: | 2933 | out: |
2915 | seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); | 2934 | seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); |
@@ -3049,16 +3068,17 @@ static void intel_connector_info(struct seq_file *m, | |||
3049 | seq_printf(m, "connector %d: type %s, status: %s\n", | 3068 | seq_printf(m, "connector %d: type %s, status: %s\n", |
3050 | connector->base.id, connector->name, | 3069 | connector->base.id, connector->name, |
3051 | drm_get_connector_status_name(connector->status)); | 3070 | drm_get_connector_status_name(connector->status)); |
3052 | if (connector->status == connector_status_connected) { | 3071 | |
3053 | seq_printf(m, "\tname: %s\n", connector->display_info.name); | 3072 | if (connector->status == connector_status_disconnected) |
3054 | seq_printf(m, "\tphysical dimensions: %dx%dmm\n", | 3073 | return; |
3055 | connector->display_info.width_mm, | 3074 | |
3056 | connector->display_info.height_mm); | 3075 | seq_printf(m, "\tname: %s\n", connector->display_info.name); |
3057 | seq_printf(m, "\tsubpixel order: %s\n", | 3076 | seq_printf(m, "\tphysical dimensions: %dx%dmm\n", |
3058 | drm_get_subpixel_order_name(connector->display_info.subpixel_order)); | 3077 | connector->display_info.width_mm, |
3059 | seq_printf(m, "\tCEA rev: %d\n", | 3078 | connector->display_info.height_mm); |
3060 | connector->display_info.cea_rev); | 3079 | seq_printf(m, "\tsubpixel order: %s\n", |
3061 | } | 3080 | drm_get_subpixel_order_name(connector->display_info.subpixel_order)); |
3081 | seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); | ||
3062 | 3082 | ||
3063 | if (!intel_encoder) | 3083 | if (!intel_encoder) |
3064 | return; | 3084 | return; |
@@ -4172,6 +4192,7 @@ i915_drop_caches_set(void *data, u64 val) | |||
4172 | 4192 | ||
4173 | DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n", | 4193 | DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n", |
4174 | val, val & DROP_ALL); | 4194 | val, val & DROP_ALL); |
4195 | intel_runtime_pm_get(i915); | ||
4175 | 4196 | ||
4176 | if (val & DROP_RESET_ACTIVE && !intel_engines_are_idle(i915)) | 4197 | if (val & DROP_RESET_ACTIVE && !intel_engines_are_idle(i915)) |
4177 | i915_gem_set_wedged(i915); | 4198 | i915_gem_set_wedged(i915); |
@@ -4181,7 +4202,7 @@ i915_drop_caches_set(void *data, u64 val) | |||
4181 | if (val & (DROP_ACTIVE | DROP_RETIRE | DROP_RESET_SEQNO)) { | 4202 | if (val & (DROP_ACTIVE | DROP_RETIRE | DROP_RESET_SEQNO)) { |
4182 | ret = mutex_lock_interruptible(&i915->drm.struct_mutex); | 4203 | ret = mutex_lock_interruptible(&i915->drm.struct_mutex); |
4183 | if (ret) | 4204 | if (ret) |
4184 | return ret; | 4205 | goto out; |
4185 | 4206 | ||
4186 | if (val & DROP_ACTIVE) | 4207 | if (val & DROP_ACTIVE) |
4187 | ret = i915_gem_wait_for_idle(i915, | 4208 | ret = i915_gem_wait_for_idle(i915, |
@@ -4189,11 +4210,8 @@ i915_drop_caches_set(void *data, u64 val) | |||
4189 | I915_WAIT_LOCKED, | 4210 | I915_WAIT_LOCKED, |
4190 | MAX_SCHEDULE_TIMEOUT); | 4211 | MAX_SCHEDULE_TIMEOUT); |
4191 | 4212 | ||
4192 | if (ret == 0 && val & DROP_RESET_SEQNO) { | 4213 | if (ret == 0 && val & DROP_RESET_SEQNO) |
4193 | intel_runtime_pm_get(i915); | ||
4194 | ret = i915_gem_set_global_seqno(&i915->drm, 1); | 4214 | ret = i915_gem_set_global_seqno(&i915->drm, 1); |
4195 | intel_runtime_pm_put(i915); | ||
4196 | } | ||
4197 | 4215 | ||
4198 | if (val & DROP_RETIRE) | 4216 | if (val & DROP_RETIRE) |
4199 | i915_retire_requests(i915); | 4217 | i915_retire_requests(i915); |
@@ -4231,6 +4249,9 @@ i915_drop_caches_set(void *data, u64 val) | |||
4231 | if (val & DROP_FREED) | 4249 | if (val & DROP_FREED) |
4232 | i915_gem_drain_freed_objects(i915); | 4250 | i915_gem_drain_freed_objects(i915); |
4233 | 4251 | ||
4252 | out: | ||
4253 | intel_runtime_pm_put(i915); | ||
4254 | |||
4234 | return ret; | 4255 | return ret; |
4235 | } | 4256 | } |
4236 | 4257 | ||
@@ -4331,7 +4352,7 @@ static void gen10_sseu_device_status(struct drm_i915_private *dev_priv, | |||
4331 | for (s = 0; s < info->sseu.max_slices; s++) { | 4352 | for (s = 0; s < info->sseu.max_slices; s++) { |
4332 | /* | 4353 | /* |
4333 | * FIXME: Valid SS Mask respects the spec and read | 4354 | * FIXME: Valid SS Mask respects the spec and read |
4334 | * only valid bits for those registers, excluding reserverd | 4355 | * only valid bits for those registers, excluding reserved |
4335 | * although this seems wrong because it would leave many | 4356 | * although this seems wrong because it would leave many |
4336 | * subslices without ACK. | 4357 | * subslices without ACK. |
4337 | */ | 4358 | */ |
@@ -4641,24 +4662,122 @@ static const struct file_operations i915_hpd_storm_ctl_fops = { | |||
4641 | .write = i915_hpd_storm_ctl_write | 4662 | .write = i915_hpd_storm_ctl_write |
4642 | }; | 4663 | }; |
4643 | 4664 | ||
4665 | static int i915_hpd_short_storm_ctl_show(struct seq_file *m, void *data) | ||
4666 | { | ||
4667 | struct drm_i915_private *dev_priv = m->private; | ||
4668 | |||
4669 | seq_printf(m, "Enabled: %s\n", | ||
4670 | yesno(dev_priv->hotplug.hpd_short_storm_enabled)); | ||
4671 | |||
4672 | return 0; | ||
4673 | } | ||
4674 | |||
4675 | static int | ||
4676 | i915_hpd_short_storm_ctl_open(struct inode *inode, struct file *file) | ||
4677 | { | ||
4678 | return single_open(file, i915_hpd_short_storm_ctl_show, | ||
4679 | inode->i_private); | ||
4680 | } | ||
4681 | |||
4682 | static ssize_t i915_hpd_short_storm_ctl_write(struct file *file, | ||
4683 | const char __user *ubuf, | ||
4684 | size_t len, loff_t *offp) | ||
4685 | { | ||
4686 | struct seq_file *m = file->private_data; | ||
4687 | struct drm_i915_private *dev_priv = m->private; | ||
4688 | struct i915_hotplug *hotplug = &dev_priv->hotplug; | ||
4689 | char *newline; | ||
4690 | char tmp[16]; | ||
4691 | int i; | ||
4692 | bool new_state; | ||
4693 | |||
4694 | if (len >= sizeof(tmp)) | ||
4695 | return -EINVAL; | ||
4696 | |||
4697 | if (copy_from_user(tmp, ubuf, len)) | ||
4698 | return -EFAULT; | ||
4699 | |||
4700 | tmp[len] = '\0'; | ||
4701 | |||
4702 | /* Strip newline, if any */ | ||
4703 | newline = strchr(tmp, '\n'); | ||
4704 | if (newline) | ||
4705 | *newline = '\0'; | ||
4706 | |||
4707 | /* Reset to the "default" state for this system */ | ||
4708 | if (strcmp(tmp, "reset") == 0) | ||
4709 | new_state = !HAS_DP_MST(dev_priv); | ||
4710 | else if (kstrtobool(tmp, &new_state) != 0) | ||
4711 | return -EINVAL; | ||
4712 | |||
4713 | DRM_DEBUG_KMS("%sabling HPD short storm detection\n", | ||
4714 | new_state ? "En" : "Dis"); | ||
4715 | |||
4716 | spin_lock_irq(&dev_priv->irq_lock); | ||
4717 | hotplug->hpd_short_storm_enabled = new_state; | ||
4718 | /* Reset the HPD storm stats so we don't accidentally trigger a storm */ | ||
4719 | for_each_hpd_pin(i) | ||
4720 | hotplug->stats[i].count = 0; | ||
4721 | spin_unlock_irq(&dev_priv->irq_lock); | ||
4722 | |||
4723 | /* Re-enable hpd immediately if we were in an irq storm */ | ||
4724 | flush_delayed_work(&dev_priv->hotplug.reenable_work); | ||
4725 | |||
4726 | return len; | ||
4727 | } | ||
4728 | |||
4729 | static const struct file_operations i915_hpd_short_storm_ctl_fops = { | ||
4730 | .owner = THIS_MODULE, | ||
4731 | .open = i915_hpd_short_storm_ctl_open, | ||
4732 | .read = seq_read, | ||
4733 | .llseek = seq_lseek, | ||
4734 | .release = single_release, | ||
4735 | .write = i915_hpd_short_storm_ctl_write, | ||
4736 | }; | ||
4737 | |||
4644 | static int i915_drrs_ctl_set(void *data, u64 val) | 4738 | static int i915_drrs_ctl_set(void *data, u64 val) |
4645 | { | 4739 | { |
4646 | struct drm_i915_private *dev_priv = data; | 4740 | struct drm_i915_private *dev_priv = data; |
4647 | struct drm_device *dev = &dev_priv->drm; | 4741 | struct drm_device *dev = &dev_priv->drm; |
4648 | struct intel_crtc *intel_crtc; | 4742 | struct intel_crtc *crtc; |
4649 | struct intel_encoder *encoder; | ||
4650 | struct intel_dp *intel_dp; | ||
4651 | 4743 | ||
4652 | if (INTEL_GEN(dev_priv) < 7) | 4744 | if (INTEL_GEN(dev_priv) < 7) |
4653 | return -ENODEV; | 4745 | return -ENODEV; |
4654 | 4746 | ||
4655 | drm_modeset_lock_all(dev); | 4747 | for_each_intel_crtc(dev, crtc) { |
4656 | for_each_intel_crtc(dev, intel_crtc) { | 4748 | struct drm_connector_list_iter conn_iter; |
4657 | if (!intel_crtc->base.state->active || | 4749 | struct intel_crtc_state *crtc_state; |
4658 | !intel_crtc->config->has_drrs) | 4750 | struct drm_connector *connector; |
4659 | continue; | 4751 | struct drm_crtc_commit *commit; |
4752 | int ret; | ||
4753 | |||
4754 | ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); | ||
4755 | if (ret) | ||
4756 | return ret; | ||
4757 | |||
4758 | crtc_state = to_intel_crtc_state(crtc->base.state); | ||
4759 | |||
4760 | if (!crtc_state->base.active || | ||
4761 | !crtc_state->has_drrs) | ||
4762 | goto out; | ||
4660 | 4763 | ||
4661 | for_each_encoder_on_crtc(dev, &intel_crtc->base, encoder) { | 4764 | commit = crtc_state->base.commit; |
4765 | if (commit) { | ||
4766 | ret = wait_for_completion_interruptible(&commit->hw_done); | ||
4767 | if (ret) | ||
4768 | goto out; | ||
4769 | } | ||
4770 | |||
4771 | drm_connector_list_iter_begin(dev, &conn_iter); | ||
4772 | drm_for_each_connector_iter(connector, &conn_iter) { | ||
4773 | struct intel_encoder *encoder; | ||
4774 | struct intel_dp *intel_dp; | ||
4775 | |||
4776 | if (!(crtc_state->base.connector_mask & | ||
4777 | drm_connector_mask(connector))) | ||
4778 | continue; | ||
4779 | |||
4780 | encoder = intel_attached_encoder(connector); | ||
4662 | if (encoder->type != INTEL_OUTPUT_EDP) | 4781 | if (encoder->type != INTEL_OUTPUT_EDP) |
4663 | continue; | 4782 | continue; |
4664 | 4783 | ||
@@ -4668,13 +4787,18 @@ static int i915_drrs_ctl_set(void *data, u64 val) | |||
4668 | intel_dp = enc_to_intel_dp(&encoder->base); | 4787 | intel_dp = enc_to_intel_dp(&encoder->base); |
4669 | if (val) | 4788 | if (val) |
4670 | intel_edp_drrs_enable(intel_dp, | 4789 | intel_edp_drrs_enable(intel_dp, |
4671 | intel_crtc->config); | 4790 | crtc_state); |
4672 | else | 4791 | else |
4673 | intel_edp_drrs_disable(intel_dp, | 4792 | intel_edp_drrs_disable(intel_dp, |
4674 | intel_crtc->config); | 4793 | crtc_state); |
4675 | } | 4794 | } |
4795 | drm_connector_list_iter_end(&conn_iter); | ||
4796 | |||
4797 | out: | ||
4798 | drm_modeset_unlock(&crtc->base.mutex); | ||
4799 | if (ret) | ||
4800 | return ret; | ||
4676 | } | 4801 | } |
4677 | drm_modeset_unlock_all(dev); | ||
4678 | 4802 | ||
4679 | return 0; | 4803 | return 0; |
4680 | } | 4804 | } |
@@ -4818,6 +4942,7 @@ static const struct i915_debugfs_files { | |||
4818 | {"i915_guc_log_level", &i915_guc_log_level_fops}, | 4942 | {"i915_guc_log_level", &i915_guc_log_level_fops}, |
4819 | {"i915_guc_log_relay", &i915_guc_log_relay_fops}, | 4943 | {"i915_guc_log_relay", &i915_guc_log_relay_fops}, |
4820 | {"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops}, | 4944 | {"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops}, |
4945 | {"i915_hpd_short_storm_ctl", &i915_hpd_short_storm_ctl_fops}, | ||
4821 | {"i915_ipc_status", &i915_ipc_status_fops}, | 4946 | {"i915_ipc_status", &i915_ipc_status_fops}, |
4822 | {"i915_drrs_ctl", &i915_drrs_ctl_fops}, | 4947 | {"i915_drrs_ctl", &i915_drrs_ctl_fops}, |
4823 | {"i915_edp_psr_debug", &i915_edp_psr_debug_fops} | 4948 | {"i915_edp_psr_debug", &i915_edp_psr_debug_fops} |
@@ -4899,13 +5024,10 @@ static int i915_dpcd_show(struct seq_file *m, void *data) | |||
4899 | continue; | 5024 | continue; |
4900 | 5025 | ||
4901 | err = drm_dp_dpcd_read(&intel_dp->aux, b->offset, buf, size); | 5026 | err = drm_dp_dpcd_read(&intel_dp->aux, b->offset, buf, size); |
4902 | if (err <= 0) { | 5027 | if (err < 0) |
4903 | DRM_ERROR("dpcd read (%zu bytes at %u) failed (%zd)\n", | 5028 | seq_printf(m, "%04x: ERROR %d\n", b->offset, (int)err); |
4904 | size, b->offset, err); | 5029 | else |
4905 | continue; | 5030 | seq_printf(m, "%04x: %*ph\n", b->offset, (int)err, buf); |
4906 | } | ||
4907 | |||
4908 | seq_printf(m, "%04x: %*ph\n", b->offset, (int) size, buf); | ||
4909 | } | 5031 | } |
4910 | 5032 | ||
4911 | return 0; | 5033 | return 0; |
@@ -4934,6 +5056,28 @@ static int i915_panel_show(struct seq_file *m, void *data) | |||
4934 | } | 5056 | } |
4935 | DEFINE_SHOW_ATTRIBUTE(i915_panel); | 5057 | DEFINE_SHOW_ATTRIBUTE(i915_panel); |
4936 | 5058 | ||
5059 | static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) | ||
5060 | { | ||
5061 | struct drm_connector *connector = m->private; | ||
5062 | struct intel_connector *intel_connector = to_intel_connector(connector); | ||
5063 | |||
5064 | if (connector->status != connector_status_connected) | ||
5065 | return -ENODEV; | ||
5066 | |||
5067 | /* HDCP is supported by connector */ | ||
5068 | if (!intel_connector->hdcp.shim) | ||
5069 | return -EINVAL; | ||
5070 | |||
5071 | seq_printf(m, "%s:%d HDCP version: ", connector->name, | ||
5072 | connector->base.id); | ||
5073 | seq_printf(m, "%s ", !intel_hdcp_capable(intel_connector) ? | ||
5074 | "None" : "HDCP1.4"); | ||
5075 | seq_puts(m, "\n"); | ||
5076 | |||
5077 | return 0; | ||
5078 | } | ||
5079 | DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); | ||
5080 | |||
4937 | /** | 5081 | /** |
4938 | * i915_debugfs_connector_add - add i915 specific connector debugfs files | 5082 | * i915_debugfs_connector_add - add i915 specific connector debugfs files |
4939 | * @connector: pointer to a registered drm_connector | 5083 | * @connector: pointer to a registered drm_connector |
@@ -4963,5 +5107,12 @@ int i915_debugfs_connector_add(struct drm_connector *connector) | |||
4963 | connector, &i915_psr_sink_status_fops); | 5107 | connector, &i915_psr_sink_status_fops); |
4964 | } | 5108 | } |
4965 | 5109 | ||
5110 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || | ||
5111 | connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || | ||
5112 | connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) { | ||
5113 | debugfs_create_file("i915_hdcp_sink_capability", S_IRUGO, root, | ||
5114 | connector, &i915_hdcp_sink_capability_fops); | ||
5115 | } | ||
5116 | |||
4966 | return 0; | 5117 | return 0; |
4967 | } | 5118 | } |