1 files changed, 90 insertions, 0 deletions

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 37c01b6076ec..6d483487f2b4 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1352,3 +1352,93 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc,
         return 0;
 }
 EXPORT_SYMBOL(drm_dp_read_desc);
+
+/**
+ * DRM DP Helpers for DSC
+ */
+u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
+                                   bool is_edp)
+{
+        u8 slice_cap1 = dsc_dpcd[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT];
+
+        if (is_edp) {
+                /* For eDP, register DSC_SLICE_CAPABILITIES_1 gives slice count */
+                if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK)
+                        return 4;
+                if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK)
+                        return 2;
+                if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK)
+                        return 1;
+        } else {
+                /* For DP, use values from DSC_SLICE_CAP_1 and DSC_SLICE_CAP2 */
+                u8 slice_cap2 = dsc_dpcd[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT];
+
+                if (slice_cap2 & DP_DSC_24_PER_DP_DSC_SINK)
+                        return 24;
+                if (slice_cap2 & DP_DSC_20_PER_DP_DSC_SINK)
+                        return 20;
+                if (slice_cap2 & DP_DSC_16_PER_DP_DSC_SINK)
+                        return 16;
+                if (slice_cap1 & DP_DSC_12_PER_DP_DSC_SINK)
+                        return 12;
+                if (slice_cap1 & DP_DSC_10_PER_DP_DSC_SINK)
+                        return 10;
+                if (slice_cap1 & DP_DSC_8_PER_DP_DSC_SINK)
+                        return 8;
+                if (slice_cap1 & DP_DSC_6_PER_DP_DSC_SINK)
+                        return 6;
+                if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK)
+                        return 4;
+                if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK)
+                        return 2;
+                if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK)
+                        return 1;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(drm_dp_dsc_sink_max_slice_count);
+
+u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+        u8 line_buf_depth = dsc_dpcd[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT];
+
+        switch (line_buf_depth & DP_DSC_LINE_BUF_BIT_DEPTH_MASK) {
+        case DP_DSC_LINE_BUF_BIT_DEPTH_9:
+                return 9;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_10:
+                return 10;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_11:
+                return 11;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_12:
+                return 12;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_13:
+                return 13;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_14:
+                return 14;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_15:
+                return 15;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_16:
+                return 16;
+        case DP_DSC_LINE_BUF_BIT_DEPTH_8:
+                return 8;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(drm_dp_dsc_sink_line_buf_depth);
+
+u8 drm_dp_dsc_sink_max_color_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+        u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT];
+
+        if (color_depth & DP_DSC_12_BPC)
+                return 12;
+        if (color_depth & DP_DSC_10_BPC)
+                return 10;
+        if (color_depth & DP_DSC_8_BPC)
+                return 8;
+
+        return 0;
+}
+EXPORT_SYMBOL(drm_dp_dsc_sink_max_color_depth);