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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h37
1 files changed, 25 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 6647fb26ef25..3fa1397fd7ae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -79,6 +79,8 @@ extern int amdgpu_bapm;
79extern int amdgpu_deep_color; 79extern int amdgpu_deep_color;
80extern int amdgpu_vm_size; 80extern int amdgpu_vm_size;
81extern int amdgpu_vm_block_size; 81extern int amdgpu_vm_block_size;
82extern int amdgpu_vm_fault_stop;
83extern int amdgpu_vm_debug;
82extern int amdgpu_enable_scheduler; 84extern int amdgpu_enable_scheduler;
83extern int amdgpu_sched_jobs; 85extern int amdgpu_sched_jobs;
84extern int amdgpu_sched_hw_submission; 86extern int amdgpu_sched_hw_submission;
@@ -960,6 +962,11 @@ struct amdgpu_ring {
960#define AMDGPU_PTE_FRAG_64KB (4 << 7) 962#define AMDGPU_PTE_FRAG_64KB (4 << 7)
961#define AMDGPU_LOG2_PAGES_PER_FRAG 4 963#define AMDGPU_LOG2_PAGES_PER_FRAG 4
962 964
965/* How to programm VM fault handling */
966#define AMDGPU_VM_FAULT_STOP_NEVER 0
967#define AMDGPU_VM_FAULT_STOP_FIRST 1
968#define AMDGPU_VM_FAULT_STOP_ALWAYS 2
969
963struct amdgpu_vm_pt { 970struct amdgpu_vm_pt {
964 struct amdgpu_bo *bo; 971 struct amdgpu_bo *bo;
965 uint64_t addr; 972 uint64_t addr;
@@ -1708,7 +1715,7 @@ struct amdgpu_vce {
1708/* 1715/*
1709 * SDMA 1716 * SDMA
1710 */ 1717 */
1711struct amdgpu_sdma { 1718struct amdgpu_sdma_instance {
1712 /* SDMA firmware */ 1719 /* SDMA firmware */
1713 const struct firmware *fw; 1720 const struct firmware *fw;
1714 uint32_t fw_version; 1721 uint32_t fw_version;
@@ -1718,6 +1725,13 @@ struct amdgpu_sdma {
1718 bool burst_nop; 1725 bool burst_nop;
1719}; 1726};
1720 1727
1728struct amdgpu_sdma {
1729 struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES];
1730 struct amdgpu_irq_src trap_irq;
1731 struct amdgpu_irq_src illegal_inst_irq;
1732 int num_instances;
1733};
1734
1721/* 1735/*
1722 * Firmware 1736 * Firmware
1723 */ 1737 */
@@ -2064,9 +2078,7 @@ struct amdgpu_device {
2064 struct amdgpu_gfx gfx; 2078 struct amdgpu_gfx gfx;
2065 2079
2066 /* sdma */ 2080 /* sdma */
2067 struct amdgpu_sdma sdma[AMDGPU_MAX_SDMA_INSTANCES]; 2081 struct amdgpu_sdma sdma;
2068 struct amdgpu_irq_src sdma_trap_irq;
2069 struct amdgpu_irq_src sdma_illegal_inst_irq;
2070 2082
2071 /* uvd */ 2083 /* uvd */
2072 bool has_uvd; 2084 bool has_uvd;
@@ -2203,17 +2215,18 @@ static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
2203 ring->ring_free_dw--; 2215 ring->ring_free_dw--;
2204} 2216}
2205 2217
2206static inline struct amdgpu_sdma * amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 2218static inline struct amdgpu_sdma_instance *
2219amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
2207{ 2220{
2208 struct amdgpu_device *adev = ring->adev; 2221 struct amdgpu_device *adev = ring->adev;
2209 int i; 2222 int i;
2210 2223
2211 for (i = 0; i < AMDGPU_MAX_SDMA_INSTANCES; i++) 2224 for (i = 0; i < adev->sdma.num_instances; i++)
2212 if (&adev->sdma[i].ring == ring) 2225 if (&adev->sdma.instance[i].ring == ring)
2213 break; 2226 break;
2214 2227
2215 if (i < AMDGPU_MAX_SDMA_INSTANCES) 2228 if (i < AMDGPU_MAX_SDMA_INSTANCES)
2216 return &adev->sdma[i]; 2229 return &adev->sdma.instance[i];
2217 else 2230 else
2218 return NULL; 2231 return NULL;
2219} 2232}
@@ -2349,10 +2362,10 @@ void amdgpu_driver_preclose_kms(struct drm_device *dev,
2349 struct drm_file *file_priv); 2362 struct drm_file *file_priv);
2350int amdgpu_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 2363int amdgpu_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
2351int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 2364int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
2352u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, int crtc); 2365u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
2353int amdgpu_enable_vblank_kms(struct drm_device *dev, int crtc); 2366int amdgpu_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
2354void amdgpu_disable_vblank_kms(struct drm_device *dev, int crtc); 2367void amdgpu_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
2355int amdgpu_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 2368int amdgpu_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
2356 int *max_error, 2369 int *max_error,
2357 struct timeval *vblank_time, 2370 struct timeval *vblank_time,
2358 unsigned flags); 2371 unsigned flags);