10 files changed, 622 insertions, 24 deletions

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 1ebcef4bab5b..0bb7b5cd6cdc 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -56,6 +56,12 @@ config FPGA_MGR_ZYNQ_FPGA
         help
           FPGA manager driver support for Xilinx Zynq FPGAs.
 
+config FPGA_MGR_STRATIX10_SOC
+        tristate "Intel Stratix10 SoC FPGA Manager"
+        depends on (ARCH_STRATIX10 && INTEL_STRATIX10_SERVICE)
+        help
+          FPGA manager driver support for the Intel Stratix10 SoC.
+
 config FPGA_MGR_XILINX_SPI
         tristate "Xilinx Configuration over Slave Serial (SPI)"
         depends on SPI
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 7a2d73ba7122..c0dd4c82fbdb 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_FPGA_MGR_ICE40_SPI)	+= ice40-spi.o
 obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI)      += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA)          += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)      += socfpga-a10.o
+obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC)    += stratix10-soc.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)           += ts73xx-fpga.o
 obj-$(CONFIG_FPGA_MGR_XILINX_SPI)       += xilinx-spi.o
 obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)        += zynq-fpga.o
diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c
index 610a1558e0ed..35c3aa5792e2 100644
--- a/drivers/fpga/altera-cvp.c
+++ b/drivers/fpga/altera-cvp.c
@@ -403,6 +403,7 @@ static int altera_cvp_probe(struct pci_dev *pdev,
         struct altera_cvp_conf *conf;
         struct fpga_manager *mgr;
         u16 cmd, val;
+        u32 regval;
         int ret;
 
         /*
@@ -416,6 +417,14 @@ static int altera_cvp_probe(struct pci_dev *pdev,
                 return -ENODEV;
         }
 
+        pci_read_config_dword(pdev, VSE_CVP_STATUS, &regval);
+        if (!(regval & VSE_CVP_STATUS_CVP_EN)) {
+                dev_err(&pdev->dev,
+                        "CVP is disabled for this device: CVP_STATUS Reg 0x%x\n",
+                        regval);
+                return -ENODEV;
+        }
+
         conf = devm_kzalloc(&pdev->dev, sizeof(*conf), GFP_KERNEL);
         if (!conf)
                 return -ENOMEM;
@@ -466,18 +475,11 @@ static int altera_cvp_probe(struct pci_dev *pdev,
         if (ret)
                 goto err_unmap;
 
-        ret = driver_create_file(&altera_cvp_driver.driver,
-                                 &driver_attr_chkcfg);
-        if (ret) {
-                dev_err(&pdev->dev, "Can't create sysfs chkcfg file\n");
-                fpga_mgr_unregister(mgr);
-                goto err_unmap;
-        }
-
         return 0;
 
 err_unmap:
-        pci_iounmap(pdev, conf->map);
+        if (conf->map)
+                pci_iounmap(pdev, conf->map);
         pci_release_region(pdev, CVP_BAR);
 err_disable:
         cmd &= ~PCI_COMMAND_MEMORY;
@@ -491,16 +493,39 @@ static void altera_cvp_remove(struct pci_dev *pdev)
         struct altera_cvp_conf *conf = mgr->priv;
         u16 cmd;
 
-        driver_remove_file(&altera_cvp_driver.driver, &driver_attr_chkcfg);
         fpga_mgr_unregister(mgr);
-        pci_iounmap(pdev, conf->map);
+        if (conf->map)
+                pci_iounmap(pdev, conf->map);
         pci_release_region(pdev, CVP_BAR);
         pci_read_config_word(pdev, PCI_COMMAND, &cmd);
         cmd &= ~PCI_COMMAND_MEMORY;
         pci_write_config_word(pdev, PCI_COMMAND, cmd);
 }
 
-module_pci_driver(altera_cvp_driver);
+static int __init altera_cvp_init(void)
+{
+        int ret;
+
+        ret = pci_register_driver(&altera_cvp_driver);
+        if (ret)
+                return ret;
+
+        ret = driver_create_file(&altera_cvp_driver.driver,
+                                 &driver_attr_chkcfg);
+        if (ret)
+                pr_warn("Can't create sysfs chkcfg file\n");
+
+        return 0;
+}
+
+static void __exit altera_cvp_exit(void)
+{
+        driver_remove_file(&altera_cvp_driver.driver, &driver_attr_chkcfg);
+        pci_unregister_driver(&altera_cvp_driver);
+}
+
+module_init(altera_cvp_init);
+module_exit(altera_cvp_exit);
 
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera-ps-spi.c
index 33aafda50af5..8c18beec6b57 100644
--- a/drivers/fpga/altera-ps-spi.c
+++ b/drivers/fpga/altera-ps-spi.c
@@ -75,6 +75,12 @@ static struct altera_ps_data a10_data = {
         .t_st2ck_us = 10, /* min(t_ST2CK) */
 };
 
+/* Array index is enum altera_ps_devtype */
+static const struct altera_ps_data *altera_ps_data_map[] = {
+        &c5_data,
+        &a10_data,
+};
+
 static const struct of_device_id of_ef_match[] = {
         { .compatible = "altr,fpga-passive-serial", .data = &c5_data },
         { .compatible = "altr,fpga-arria10-passive-serial", .data = &a10_data },
@@ -234,6 +240,22 @@ static const struct fpga_manager_ops altera_ps_ops = {
         .write_complete = altera_ps_write_complete,
 };
 
+static const struct altera_ps_data *id_to_data(const struct spi_device_id *id)
+{
+        kernel_ulong_t devtype = id->driver_data;
+        const struct altera_ps_data *data;
+
+        /* someone added a altera_ps_devtype without adding to the map array */
+        if (devtype >= ARRAY_SIZE(altera_ps_data_map))
+                return NULL;
+
+        data = altera_ps_data_map[devtype];
+        if (!data || data->devtype != devtype)
+                return NULL;
+
+        return data;
+}
+
 static int altera_ps_probe(struct spi_device *spi)
 {
         struct altera_ps_conf *conf;
@@ -244,11 +266,17 @@ static int altera_ps_probe(struct spi_device *spi)
         if (!conf)
                 return -ENOMEM;
 
-        of_id = of_match_device(of_ef_match, &spi->dev);
-        if (!of_id)
-                return -ENODEV;
+        if (spi->dev.of_node) {
+                of_id = of_match_device(of_ef_match, &spi->dev);
+                if (!of_id)
+                        return -ENODEV;
+                conf->data = of_id->data;
+        } else {
+                conf->data = id_to_data(spi_get_device_id(spi));
+                if (!conf->data)
+                        return -ENODEV;
+        }
 
-        conf->data = of_id->data;
         conf->spi = spi;
         conf->config = devm_gpiod_get(&spi->dev, "nconfig", GPIOD_OUT_LOW);
         if (IS_ERR(conf->config)) {
@@ -294,7 +322,9 @@ static int altera_ps_remove(struct spi_device *spi)
 }
 
 static const struct spi_device_id altera_ps_spi_ids[] = {
-        {"cyclone-ps-spi", 0},
+        { "cyclone-ps-spi", CYCLONE5 },
+        { "fpga-passive-serial", CYCLONE5 },
+        { "fpga-arria10-passive-serial", ARRIA10 },
         {}
 };
 MODULE_DEVICE_TABLE(spi, altera_ps_spi_ids);
diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl-afu-dma-region.c
index 025aba3ea76c..e18a786fc943 100644
--- a/drivers/fpga/dfl-afu-dma-region.c
+++ b/drivers/fpga/dfl-afu-dma-region.c
@@ -369,7 +369,7 @@ int afu_dma_map_region(struct dfl_feature_platform_data *pdata,
         if (user_addr + length < user_addr)
                 return -EINVAL;
 
-        if (!access_ok(VERIFY_WRITE, (void __user *)(unsigned long)user_addr,
+        if (!access_ok((void __user *)(unsigned long)user_addr,
                        length))
                 return -EINVAL;
 
diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
index 0b840531ef33..d9ca9554844a 100644
--- a/drivers/fpga/dfl-fme-pr.c
+++ b/drivers/fpga/dfl-fme-pr.c
@@ -99,8 +99,7 @@ static int fme_pr(struct platform_device *pdev, unsigned long arg)
                 return -EINVAL;
         }
 
-        if (!access_ok(VERIFY_READ,
-                       (void __user *)(unsigned long)port_pr.buffer_address,
+        if (!access_ok((void __user *)(unsigned long)port_pr.buffer_address,
                        port_pr.buffer_size))
                 return -EFAULT;
 
@@ -444,10 +443,8 @@ static void pr_mgmt_uinit(struct platform_device *pdev,
                           struct dfl_feature *feature)
 {
         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
-        struct dfl_fme *priv;
 
         mutex_lock(&pdata->lock);
-        priv = dfl_fpga_pdata_get_private(pdata);
 
         dfl_fme_destroy_regions(pdata);
         dfl_fme_destroy_bridges(pdata);
diff --git a/drivers/fpga/dfl-fme-region.c b/drivers/fpga/dfl-fme-region.c
index ec134ec93f08..1eeb42af1012 100644
--- a/drivers/fpga/dfl-fme-region.c
+++ b/drivers/fpga/dfl-fme-region.c
@@ -64,7 +64,7 @@ eprobe_mgr_put:
 
 static int fme_region_remove(struct platform_device *pdev)
 {
-        struct fpga_region *region = dev_get_drvdata(&pdev->dev);
+        struct fpga_region *region = platform_get_drvdata(pdev);
         struct fpga_manager *mgr = region->mgr;
 
         fpga_region_unregister(region);
diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c
index 122286fd255a..75f64abf9c81 100644
--- a/drivers/fpga/of-fpga-region.c
+++ b/drivers/fpga/of-fpga-region.c
@@ -421,7 +421,7 @@ static int of_fpga_region_probe(struct platform_device *pdev)
                 goto eprobe_mgr_put;
 
         of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
-        dev_set_drvdata(dev, region);
+        platform_set_drvdata(pdev, region);
 
         dev_info(dev, "FPGA Region probed\n");
 
diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
new file mode 100644
index 000000000000..a1a09e04fab8
--- /dev/null
+++ b/drivers/fpga/stratix10-soc.c
@@ -0,0 +1,535 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * FPGA Manager Driver for Intel Stratix10 SoC
+ *
+ *  Copyright (C) 2018 Intel Corporation
+ */
+#include <linux/completion.h>
+#include <linux/fpga/fpga-mgr.h>
+#include <linux/firmware/intel/stratix10-svc-client.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
+/*
+ * FPGA programming requires a higher level of privilege (EL3), per the SoC
+ * design.
+ */
+#define NUM_SVC_BUFS    4
+#define SVC_BUF_SIZE    SZ_512K
+
+/* Indicates buffer is in use if set */
+#define SVC_BUF_LOCK    0
+
+#define S10_BUFFER_TIMEOUT (msecs_to_jiffies(SVC_RECONFIG_BUFFER_TIMEOUT_MS))
+#define S10_RECONFIG_TIMEOUT (msecs_to_jiffies(SVC_RECONFIG_REQUEST_TIMEOUT_MS))
+
+/*
+ * struct s10_svc_buf
+ * buf:  virtual address of buf provided by service layer
+ * lock: locked if buffer is in use
+ */
+struct s10_svc_buf {
+        char *buf;
+        unsigned long lock;
+};
+
+struct s10_priv {
+        struct stratix10_svc_chan *chan;
+        struct stratix10_svc_client client;
+        struct completion status_return_completion;
+        struct s10_svc_buf svc_bufs[NUM_SVC_BUFS];
+        unsigned long status;
+};
+
+static int s10_svc_send_msg(struct s10_priv *priv,
+                            enum stratix10_svc_command_code command,
+                            void *payload, u32 payload_length)
+{
+        struct stratix10_svc_chan *chan = priv->chan;
+        struct device *dev = priv->client.dev;
+        struct stratix10_svc_client_msg msg;
+        int ret;
+
+        dev_dbg(dev, "%s cmd=%d payload=%p length=%d\n",
+                __func__, command, payload, payload_length);
+
+        msg.command = command;
+        msg.payload = payload;
+        msg.payload_length = payload_length;
+
+        ret = stratix10_svc_send(chan, &msg);
+        dev_dbg(dev, "stratix10_svc_send returned status %d\n", ret);
+
+        return ret;
+}
+
+/*
+ * Free buffers allocated from the service layer's pool that are not in use.
+ * Return true when all buffers are freed.
+ */
+static bool s10_free_buffers(struct fpga_manager *mgr)
+{
+        struct s10_priv *priv = mgr->priv;
+        uint num_free = 0;
+        uint i;
+
+        for (i = 0; i < NUM_SVC_BUFS; i++) {
+                if (!priv->svc_bufs[i].buf) {
+                        num_free++;
+                        continue;
+                }
+
+                if (!test_and_set_bit_lock(SVC_BUF_LOCK,
+                                           &priv->svc_bufs[i].lock)) {
+                        stratix10_svc_free_memory(priv->chan,
+                                                  priv->svc_bufs[i].buf);
+                        priv->svc_bufs[i].buf = NULL;
+                        num_free++;
+                }
+        }
+
+        return num_free == NUM_SVC_BUFS;
+}
+
+/*
+ * Returns count of how many buffers are not in use.
+ */
+static uint s10_free_buffer_count(struct fpga_manager *mgr)
+{
+        struct s10_priv *priv = mgr->priv;
+        uint num_free = 0;
+        uint i;
+
+        for (i = 0; i < NUM_SVC_BUFS; i++)
+                if (!priv->svc_bufs[i].buf)
+                        num_free++;
+
+        return num_free;
+}
+
+/*
+ * s10_unlock_bufs
+ * Given the returned buffer address, match that address to our buffer struct
+ * and unlock that buffer.  This marks it as available to be refilled and sent
+ * (or freed).
+ * priv: private data
+ * kaddr: kernel address of buffer that was returned from service layer
+ */
+static void s10_unlock_bufs(struct s10_priv *priv, void *kaddr)
+{
+        uint i;
+
+        if (!kaddr)
+                return;
+
+        for (i = 0; i < NUM_SVC_BUFS; i++)
+                if (priv->svc_bufs[i].buf == kaddr) {
+                        clear_bit_unlock(SVC_BUF_LOCK,
+                                         &priv->svc_bufs[i].lock);
+                        return;
+                }
+
+        WARN(1, "Unknown buffer returned from service layer %p\n", kaddr);
+}
+
+/*
+ * s10_receive_callback - callback for service layer to use to provide client
+ * (this driver) messages received through the mailbox.
+ * client: service layer client struct
+ * data: message from service layer
+ */
+static void s10_receive_callback(struct stratix10_svc_client *client,
+                                 struct stratix10_svc_cb_data *data)
+{
+        struct s10_priv *priv = client->priv;
+        u32 status;
+        int i;
+
+        WARN_ONCE(!data, "%s: stratix10_svc_rc_data = NULL", __func__);
+
+        status = data->status;
+
+        /*
+         * Here we set status bits as we receive them.  Elsewhere, we always use
+         * test_and_clear_bit() to check status in priv->status
+         */
+        for (i = 0; i <= SVC_STATUS_RECONFIG_ERROR; i++)
+                if (status & (1 << i))
+                        set_bit(i, &priv->status);
+
+        if (status & BIT(SVC_STATUS_RECONFIG_BUFFER_DONE)) {
+                s10_unlock_bufs(priv, data->kaddr1);
+                s10_unlock_bufs(priv, data->kaddr2);
+                s10_unlock_bufs(priv, data->kaddr3);
+        }
+
+        complete(&priv->status_return_completion);
+}
+
+/*
+ * s10_ops_write_init - prepare for FPGA reconfiguration by requesting
+ * partial reconfig and allocating buffers from the service layer.
+ */
+static int s10_ops_write_init(struct fpga_manager *mgr,
+                              struct fpga_image_info *info,
+                              const char *buf, size_t count)
+{
+        struct s10_priv *priv = mgr->priv;
+        struct device *dev = priv->client.dev;
+        struct stratix10_svc_command_config_type ctype;
+        char *kbuf;
+        uint i;
+        int ret;
+
+        ctype.flags = 0;
+        if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
+                dev_dbg(dev, "Requesting partial reconfiguration.\n");
+                ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL);
+        } else {
+                dev_dbg(dev, "Requesting full reconfiguration.\n");
+        }
+
+        reinit_completion(&priv->status_return_completion);
+        ret = s10_svc_send_msg(priv, COMMAND_RECONFIG,
+                               &ctype, sizeof(ctype));
+        if (ret < 0)
+                goto init_done;
+
+        ret = wait_for_completion_interruptible_timeout(
+                &priv->status_return_completion, S10_RECONFIG_TIMEOUT);
+        if (!ret) {
+                dev_err(dev, "timeout waiting for RECONFIG_REQUEST\n");
+                ret = -ETIMEDOUT;
+                goto init_done;
+        }
+        if (ret < 0) {
+                dev_err(dev, "error (%d) waiting for RECONFIG_REQUEST\n", ret);
+                goto init_done;
+        }
+
+        ret = 0;
+        if (!test_and_clear_bit(SVC_STATUS_RECONFIG_REQUEST_OK,
+                                &priv->status)) {
+                ret = -ETIMEDOUT;
+                goto init_done;
+        }
+
+        /* Allocate buffers from the service layer's pool. */
+        for (i = 0; i < NUM_SVC_BUFS; i++) {
+                kbuf = stratix10_svc_allocate_memory(priv->chan, SVC_BUF_SIZE);
+                if (!kbuf) {
+                        s10_free_buffers(mgr);
+                        ret = -ENOMEM;
+                        goto init_done;
+                }
+
+                priv->svc_bufs[i].buf = kbuf;
+                priv->svc_bufs[i].lock = 0;
+        }
+
+init_done:
+        stratix10_svc_done(priv->chan);
+        return ret;
+}
+
+/*
+ * s10_send_buf - send a buffer to the service layer queue
+ * mgr: fpga manager struct
+ * buf: fpga image buffer
+ * count: size of buf in bytes
+ * Returns # of bytes transferred or -ENOBUFS if the all the buffers are in use
+ * or if the service queue is full. Never returns 0.
+ */
+static int s10_send_buf(struct fpga_manager *mgr, const char *buf, size_t count)
+{
+        struct s10_priv *priv = mgr->priv;
+        struct device *dev = priv->client.dev;
+        void *svc_buf;
+        size_t xfer_sz;
+        int ret;
+        uint i;
+
+        /* get/lock a buffer that that's not being used */
+        for (i = 0; i < NUM_SVC_BUFS; i++)
+                if (!test_and_set_bit_lock(SVC_BUF_LOCK,
+                                           &priv->svc_bufs[i].lock))
+                        break;
+
+        if (i == NUM_SVC_BUFS)
+                return -ENOBUFS;
+
+        xfer_sz = count < SVC_BUF_SIZE ? count : SVC_BUF_SIZE;
+
+        svc_buf = priv->svc_bufs[i].buf;
+        memcpy(svc_buf, buf, xfer_sz);
+        ret = s10_svc_send_msg(priv, COMMAND_RECONFIG_DATA_SUBMIT,
+                               svc_buf, xfer_sz);
+        if (ret < 0) {
+                dev_err(dev,
+                        "Error while sending data to service layer (%d)", ret);
+                clear_bit_unlock(SVC_BUF_LOCK, &priv->svc_bufs[i].lock);
+                return ret;
+        }
+
+        return xfer_sz;
+}
+
+/*
+ * Send a FPGA image to privileged layers to write to the FPGA.  When done
+ * sending, free all service layer buffers we allocated in write_init.
+ */
+static int s10_ops_write(struct fpga_manager *mgr, const char *buf,
+                         size_t count)
+{
+        struct s10_priv *priv = mgr->priv;
+        struct device *dev = priv->client.dev;
+        long wait_status;
+        int sent = 0;
+        int ret = 0;
+
+        /*
+         * Loop waiting for buffers to be returned.  When a buffer is returned,
+         * reuse it to send more data or free if if all data has been sent.
+         */
+        while (count > 0 || s10_free_buffer_count(mgr) != NUM_SVC_BUFS) {
+                reinit_completion(&priv->status_return_completion);
+
+                if (count > 0) {
+                        sent = s10_send_buf(mgr, buf, count);
+                        if (sent < 0)
+                                continue;
+
+                        count -= sent;
+                        buf += sent;
+                } else {
+                        if (s10_free_buffers(mgr))
+                                return 0;
+
+                        ret = s10_svc_send_msg(
+                                priv, COMMAND_RECONFIG_DATA_CLAIM,
+                                NULL, 0);
+                        if (ret < 0)
+                                break;
+                }
+
+                /*
+                 * If callback hasn't already happened, wait for buffers to be
+                 * returned from service layer
+                 */
+                wait_status = 1; /* not timed out */
+                if (!priv->status)
+                        wait_status = wait_for_completion_interruptible_timeout(
+                                &priv->status_return_completion,
+                                S10_BUFFER_TIMEOUT);
+
+                if (test_and_clear_bit(SVC_STATUS_RECONFIG_BUFFER_DONE,
+                                       &priv->status) ||
+                    test_and_clear_bit(SVC_STATUS_RECONFIG_BUFFER_SUBMITTED,
+                                       &priv->status)) {
+                        ret = 0;
+                        continue;
+                }
+
+                if (test_and_clear_bit(SVC_STATUS_RECONFIG_ERROR,
+                                       &priv->status)) {
+                        dev_err(dev, "ERROR - giving up - SVC_STATUS_RECONFIG_ERROR\n");
+                        ret = -EFAULT;
+                        break;
+                }
+
+                if (!wait_status) {
+                        dev_err(dev, "timeout waiting for svc layer buffers\n");
+                        ret = -ETIMEDOUT;
+                        break;
+                }
+                if (wait_status < 0) {
+                        ret = wait_status;
+                        dev_err(dev,
+                                "error (%d) waiting for svc layer buffers\n",
+                                ret);
+                        break;
+                }
+        }
+
+        if (!s10_free_buffers(mgr))
+                dev_err(dev, "%s not all buffers were freed\n", __func__);
+
+        return ret;
+}
+
+static int s10_ops_write_complete(struct fpga_manager *mgr,
+                                  struct fpga_image_info *info)
+{
+        struct s10_priv *priv = mgr->priv;
+        struct device *dev = priv->client.dev;
+        unsigned long timeout;
+        int ret;
+
+        timeout = usecs_to_jiffies(info->config_complete_timeout_us);
+
+        do {
+                reinit_completion(&priv->status_return_completion);
+
+                ret = s10_svc_send_msg(priv, COMMAND_RECONFIG_STATUS, NULL, 0);
+                if (ret < 0)
+                        break;
+
+                ret = wait_for_completion_interruptible_timeout(
+                        &priv->status_return_completion, timeout);
+                if (!ret) {
+                        dev_err(dev,
+                                "timeout waiting for RECONFIG_COMPLETED\n");
+                        ret = -ETIMEDOUT;
+                        break;
+                }
+                if (ret < 0) {
+                        dev_err(dev,
+                                "error (%d) waiting for RECONFIG_COMPLETED\n",
+                                ret);
+                        break;
+                }
+                /* Not error or timeout, so ret is # of jiffies until timeout */
+                timeout = ret;
+                ret = 0;
+
+                if (test_and_clear_bit(SVC_STATUS_RECONFIG_COMPLETED,
+                                       &priv->status))
+                        break;
+
+                if (test_and_clear_bit(SVC_STATUS_RECONFIG_ERROR,
+                                       &priv->status)) {
+                        dev_err(dev, "ERROR - giving up - SVC_STATUS_RECONFIG_ERROR\n");
+                        ret = -EFAULT;
+                        break;
+                }
+        } while (1);
+
+        stratix10_svc_done(priv->chan);
+
+        return ret;
+}
+
+static enum fpga_mgr_states s10_ops_state(struct fpga_manager *mgr)
+{
+        return FPGA_MGR_STATE_UNKNOWN;
+}
+
+static const struct fpga_manager_ops s10_ops = {
+        .state = s10_ops_state,
+        .write_init = s10_ops_write_init,
+        .write = s10_ops_write,
+        .write_complete = s10_ops_write_complete,
+};
+
+static int s10_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct s10_priv *priv;
+        struct fpga_manager *mgr;
+        int ret;
+
+        priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+
+        priv->client.dev = dev;
+        priv->client.receive_cb = s10_receive_callback;
+        priv->client.priv = priv;
+
+        priv->chan = stratix10_svc_request_channel_byname(&priv->client,
+                                                          SVC_CLIENT_FPGA);
+        if (IS_ERR(priv->chan)) {
+                dev_err(dev, "couldn't get service channel (%s)\n",
+                        SVC_CLIENT_FPGA);
+                return PTR_ERR(priv->chan);
+        }
+
+        init_completion(&priv->status_return_completion);
+
+        mgr = fpga_mgr_create(dev, "Stratix10 SOC FPGA Manager",
+                              &s10_ops, priv);
+        if (!mgr) {
+                dev_err(dev, "unable to create FPGA manager\n");
+                ret = -ENOMEM;
+                goto probe_err;
+        }
+
+        ret = fpga_mgr_register(mgr);
+        if (ret) {
+                dev_err(dev, "unable to register FPGA manager\n");
+                fpga_mgr_free(mgr);
+                goto probe_err;
+        }
+
+        platform_set_drvdata(pdev, mgr);
+        return ret;
+
+probe_err:
+        stratix10_svc_free_channel(priv->chan);
+        return ret;
+}
+
+static int s10_remove(struct platform_device *pdev)
+{
+        struct fpga_manager *mgr = platform_get_drvdata(pdev);
+        struct s10_priv *priv = mgr->priv;
+
+        fpga_mgr_unregister(mgr);
+        stratix10_svc_free_channel(priv->chan);
+
+        return 0;
+}
+
+static const struct of_device_id s10_of_match[] = {
+        { .compatible = "intel,stratix10-soc-fpga-mgr", },
+        {},
+};
+
+MODULE_DEVICE_TABLE(of, s10_of_match);
+
+static struct platform_driver s10_driver = {
+        .probe = s10_probe,
+        .remove = s10_remove,
+        .driver = {
+                .name   = "Stratix10 SoC FPGA manager",
+                .of_match_table = of_match_ptr(s10_of_match),
+        },
+};
+
+static int __init s10_init(void)
+{
+        struct device_node *fw_np;
+        struct device_node *np;
+        int ret;
+
+        fw_np = of_find_node_by_name(NULL, "svc");
+        if (!fw_np)
+                return -ENODEV;
+
+        np = of_find_matching_node(fw_np, s10_of_match);
+        if (!np) {
+                of_node_put(fw_np);
+                return -ENODEV;
+        }
+
+        of_node_put(np);
+        ret = of_platform_populate(fw_np, s10_of_match, NULL, NULL);
+        of_node_put(fw_np);
+        if (ret)
+                return ret;
+
+        return platform_driver_register(&s10_driver);
+}
+
+static void __exit s10_exit(void)
+{
+        return platform_driver_unregister(&s10_driver);
+}
+
+module_init(s10_init);
+module_exit(s10_exit);
+
+MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
+MODULE_DESCRIPTION("Intel Stratix 10 SOC FPGA Manager");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
index bb82efeebb9d..57b0e6775958 100644
--- a/drivers/fpga/zynq-fpga.c
+++ b/drivers/fpga/zynq-fpga.c
@@ -501,6 +501,10 @@ static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr,
         if (err)
                 return err;
 
+        /* Release 'PR' control back to the ICAP */
+        zynq_fpga_write(priv, CTRL_OFFSET,
+                zynq_fpga_read(priv, CTRL_OFFSET) & ~CTRL_PCAP_PR_MASK);
+
         err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status,
                                      intr_status & IXR_PCFG_DONE_MASK,
                                      INIT_POLL_DELAY,