diff options
Diffstat (limited to 'drivers/fpga/zynq-fpga.c')
-rw-r--r-- | drivers/fpga/zynq-fpga.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c index 249682e92502..86011b07026d 100644 --- a/drivers/fpga/zynq-fpga.c +++ b/drivers/fpga/zynq-fpga.c | |||
@@ -218,7 +218,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, | |||
218 | INIT_POLL_DELAY, | 218 | INIT_POLL_DELAY, |
219 | INIT_POLL_TIMEOUT); | 219 | INIT_POLL_TIMEOUT); |
220 | if (err) { | 220 | if (err) { |
221 | dev_err(priv->dev, "Timeout waiting for PCFG_INIT"); | 221 | dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n"); |
222 | goto out_err; | 222 | goto out_err; |
223 | } | 223 | } |
224 | 224 | ||
@@ -232,7 +232,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, | |||
232 | INIT_POLL_DELAY, | 232 | INIT_POLL_DELAY, |
233 | INIT_POLL_TIMEOUT); | 233 | INIT_POLL_TIMEOUT); |
234 | if (err) { | 234 | if (err) { |
235 | dev_err(priv->dev, "Timeout waiting for !PCFG_INIT"); | 235 | dev_err(priv->dev, "Timeout waiting for !PCFG_INIT\n"); |
236 | goto out_err; | 236 | goto out_err; |
237 | } | 237 | } |
238 | 238 | ||
@@ -246,7 +246,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, | |||
246 | INIT_POLL_DELAY, | 246 | INIT_POLL_DELAY, |
247 | INIT_POLL_TIMEOUT); | 247 | INIT_POLL_TIMEOUT); |
248 | if (err) { | 248 | if (err) { |
249 | dev_err(priv->dev, "Timeout waiting for PCFG_INIT"); | 249 | dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n"); |
250 | goto out_err; | 250 | goto out_err; |
251 | } | 251 | } |
252 | } | 252 | } |
@@ -263,7 +263,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, | |||
263 | /* check that we have room in the command queue */ | 263 | /* check that we have room in the command queue */ |
264 | status = zynq_fpga_read(priv, STATUS_OFFSET); | 264 | status = zynq_fpga_read(priv, STATUS_OFFSET); |
265 | if (status & STATUS_DMA_Q_F) { | 265 | if (status & STATUS_DMA_Q_F) { |
266 | dev_err(priv->dev, "DMA command queue full"); | 266 | dev_err(priv->dev, "DMA command queue full\n"); |
267 | err = -EBUSY; | 267 | err = -EBUSY; |
268 | goto out_err; | 268 | goto out_err; |
269 | } | 269 | } |
@@ -332,7 +332,7 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, | |||
332 | zynq_fpga_write(priv, INT_STS_OFFSET, intr_status); | 332 | zynq_fpga_write(priv, INT_STS_OFFSET, intr_status); |
333 | 333 | ||
334 | if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) { | 334 | if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) { |
335 | dev_err(priv->dev, "Error configuring FPGA"); | 335 | dev_err(priv->dev, "Error configuring FPGA\n"); |
336 | err = -EFAULT; | 336 | err = -EFAULT; |
337 | } | 337 | } |
338 | 338 | ||
@@ -428,7 +428,7 @@ static int zynq_fpga_probe(struct platform_device *pdev) | |||
428 | priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node, | 428 | priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node, |
429 | "syscon"); | 429 | "syscon"); |
430 | if (IS_ERR(priv->slcr)) { | 430 | if (IS_ERR(priv->slcr)) { |
431 | dev_err(dev, "unable to get zynq-slcr regmap"); | 431 | dev_err(dev, "unable to get zynq-slcr regmap\n"); |
432 | return PTR_ERR(priv->slcr); | 432 | return PTR_ERR(priv->slcr); |
433 | } | 433 | } |
434 | 434 | ||
@@ -436,26 +436,26 @@ static int zynq_fpga_probe(struct platform_device *pdev) | |||
436 | 436 | ||
437 | priv->irq = platform_get_irq(pdev, 0); | 437 | priv->irq = platform_get_irq(pdev, 0); |
438 | if (priv->irq < 0) { | 438 | if (priv->irq < 0) { |
439 | dev_err(dev, "No IRQ available"); | 439 | dev_err(dev, "No IRQ available\n"); |
440 | return priv->irq; | 440 | return priv->irq; |
441 | } | 441 | } |
442 | 442 | ||
443 | err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0, | 443 | err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0, |
444 | dev_name(dev), priv); | 444 | dev_name(dev), priv); |
445 | if (err) { | 445 | if (err) { |
446 | dev_err(dev, "unable to request IRQ"); | 446 | dev_err(dev, "unable to request IRQ\n"); |
447 | return err; | 447 | return err; |
448 | } | 448 | } |
449 | 449 | ||
450 | priv->clk = devm_clk_get(dev, "ref_clk"); | 450 | priv->clk = devm_clk_get(dev, "ref_clk"); |
451 | if (IS_ERR(priv->clk)) { | 451 | if (IS_ERR(priv->clk)) { |
452 | dev_err(dev, "input clock not found"); | 452 | dev_err(dev, "input clock not found\n"); |
453 | return PTR_ERR(priv->clk); | 453 | return PTR_ERR(priv->clk); |
454 | } | 454 | } |
455 | 455 | ||
456 | err = clk_prepare_enable(priv->clk); | 456 | err = clk_prepare_enable(priv->clk); |
457 | if (err) { | 457 | if (err) { |
458 | dev_err(dev, "unable to enable clock"); | 458 | dev_err(dev, "unable to enable clock\n"); |
459 | return err; | 459 | return err; |
460 | } | 460 | } |
461 | 461 | ||
@@ -467,7 +467,7 @@ static int zynq_fpga_probe(struct platform_device *pdev) | |||
467 | err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager", | 467 | err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager", |
468 | &zynq_fpga_ops, priv); | 468 | &zynq_fpga_ops, priv); |
469 | if (err) { | 469 | if (err) { |
470 | dev_err(dev, "unable to register FPGA manager"); | 470 | dev_err(dev, "unable to register FPGA manager\n"); |
471 | clk_unprepare(priv->clk); | 471 | clk_unprepare(priv->clk); |
472 | return err; | 472 | return err; |
473 | } | 473 | } |