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path: root/drivers/clocksource/h8300_timer8.c
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Diffstat (limited to 'drivers/clocksource/h8300_timer8.c')
-rw-r--r--drivers/clocksource/h8300_timer8.c264
1 files changed, 81 insertions, 183 deletions
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 44375d8b9bc4..c151941e1956 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -8,19 +8,15 @@
8 */ 8 */
9 9
10#include <linux/errno.h> 10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/interrupt.h> 12#include <linux/interrupt.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/slab.h>
17#include <linux/clockchips.h> 14#include <linux/clockchips.h>
18#include <linux/module.h>
19#include <linux/clk.h> 15#include <linux/clk.h>
20#include <linux/io.h> 16#include <linux/io.h>
21#include <linux/of.h> 17#include <linux/of.h>
22 18#include <linux/of_address.h>
23#include <asm/irq.h> 19#include <linux/of_irq.h>
24 20
25#define _8TCR 0 21#define _8TCR 0
26#define _8TCSR 2 22#define _8TCSR 2
@@ -28,126 +24,74 @@
28#define TCORB 6 24#define TCORB 6
29#define _8TCNT 8 25#define _8TCNT 8
30 26
31#define FLAG_REPROGRAM (1 << 0) 27#define CMIEA 6
32#define FLAG_SKIPEVENT (1 << 1) 28#define CMFA 6
33#define FLAG_IRQCONTEXT (1 << 2) 29
34#define FLAG_STARTED (1 << 3) 30#define FLAG_STARTED (1 << 3)
35 31
36#define ONESHOT 0 32#define SCALE 64
37#define PERIODIC 1
38 33
39#define RELATIVE 0 34#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
40#define ABSOLUTE 1 35#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
41 36
42struct timer8_priv { 37struct timer8_priv {
43 struct platform_device *pdev;
44 struct clock_event_device ced; 38 struct clock_event_device ced;
45 struct irqaction irqaction; 39 void __iomem *mapbase;
46 unsigned long mapbase;
47 raw_spinlock_t lock;
48 unsigned long flags; 40 unsigned long flags;
49 unsigned int rate; 41 unsigned int rate;
50 unsigned int tcora;
51 struct clk *pclk;
52}; 42};
53 43
54static unsigned long timer8_get_counter(struct timer8_priv *p)
55{
56 unsigned long v1, v2, v3;
57 int o1, o2;
58
59 o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
60
61 /* Make sure the timer value is stable. Stolen from acpi_pm.c */
62 do {
63 o2 = o1;
64 v1 = ctrl_inw(p->mapbase + _8TCNT);
65 v2 = ctrl_inw(p->mapbase + _8TCNT);
66 v3 = ctrl_inw(p->mapbase + _8TCNT);
67 o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
68 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
69 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
70
71 v2 |= o1 << 10;
72 return v2;
73}
74
75static irqreturn_t timer8_interrupt(int irq, void *dev_id) 44static irqreturn_t timer8_interrupt(int irq, void *dev_id)
76{ 45{
77 struct timer8_priv *p = dev_id; 46 struct timer8_priv *p = dev_id;
78 47
79 ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40, 48 if (clockevent_state_oneshot(&p->ced))
80 p->mapbase + _8TCSR); 49 iowrite16be(0x0000, p->mapbase + _8TCR);
81 p->flags |= FLAG_IRQCONTEXT; 50
82 ctrl_outw(p->tcora, p->mapbase + TCORA); 51 p->ced.event_handler(&p->ced);
83 if (!(p->flags & FLAG_SKIPEVENT)) { 52
84 if (clockevent_state_oneshot(&p->ced)) 53 bclr(CMFA, p->mapbase + _8TCSR);
85 ctrl_outw(0x0000, p->mapbase + _8TCR);
86 p->ced.event_handler(&p->ced);
87 }
88 p->flags &= ~(FLAG_SKIPEVENT | FLAG_IRQCONTEXT);
89 54
90 return IRQ_HANDLED; 55 return IRQ_HANDLED;
91} 56}
92 57
93static void timer8_set_next(struct timer8_priv *p, unsigned long delta) 58static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
94{ 59{
95 unsigned long flags;
96 unsigned long now;
97
98 raw_spin_lock_irqsave(&p->lock, flags);
99 if (delta >= 0x10000) 60 if (delta >= 0x10000)
100 dev_warn(&p->pdev->dev, "delta out of range\n"); 61 pr_warn("delta out of range\n");
101 now = timer8_get_counter(p); 62 bclr(CMIEA, p->mapbase + _8TCR);
102 p->tcora = delta; 63 iowrite16be(delta, p->mapbase + TCORA);
103 ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR); 64 iowrite16be(0x0000, p->mapbase + _8TCNT);
104 if (delta > now) 65 bclr(CMFA, p->mapbase + _8TCSR);
105 ctrl_outw(delta, p->mapbase + TCORA); 66 bset(CMIEA, p->mapbase + _8TCR);
106 else
107 ctrl_outw(now + 1, p->mapbase + TCORA);
108
109 raw_spin_unlock_irqrestore(&p->lock, flags);
110} 67}
111 68
112static int timer8_enable(struct timer8_priv *p) 69static int timer8_enable(struct timer8_priv *p)
113{ 70{
114 p->rate = clk_get_rate(p->pclk) / 64; 71 iowrite16be(0xffff, p->mapbase + TCORA);
115 ctrl_outw(0xffff, p->mapbase + TCORA); 72 iowrite16be(0x0000, p->mapbase + _8TCNT);
116 ctrl_outw(0x0000, p->mapbase + _8TCNT); 73 iowrite16be(0x0c02, p->mapbase + _8TCR);
117 ctrl_outw(0x0c02, p->mapbase + _8TCR);
118 74
119 return 0; 75 return 0;
120} 76}
121 77
122static int timer8_start(struct timer8_priv *p) 78static int timer8_start(struct timer8_priv *p)
123{ 79{
124 int ret = 0; 80 int ret;
125 unsigned long flags;
126
127 raw_spin_lock_irqsave(&p->lock, flags);
128
129 if (!(p->flags & FLAG_STARTED))
130 ret = timer8_enable(p);
131 81
132 if (ret) 82 if ((p->flags & FLAG_STARTED))
133 goto out; 83 return 0;
134 p->flags |= FLAG_STARTED;
135 84
136 out: 85 ret = timer8_enable(p);
137 raw_spin_unlock_irqrestore(&p->lock, flags); 86 if (!ret)
87 p->flags |= FLAG_STARTED;
138 88
139 return ret; 89 return ret;
140} 90}
141 91
142static void timer8_stop(struct timer8_priv *p) 92static void timer8_stop(struct timer8_priv *p)
143{ 93{
144 unsigned long flags; 94 iowrite16be(0x0000, p->mapbase + _8TCR);
145
146 raw_spin_lock_irqsave(&p->lock, flags);
147
148 ctrl_outw(0x0000, p->mapbase + _8TCR);
149
150 raw_spin_unlock_irqrestore(&p->lock, flags);
151} 95}
152 96
153static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced) 97static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
@@ -155,7 +99,7 @@ static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
155 return container_of(ced, struct timer8_priv, ced); 99 return container_of(ced, struct timer8_priv, ced);
156} 100}
157 101
158static void timer8_clock_event_start(struct timer8_priv *p, int periodic) 102static void timer8_clock_event_start(struct timer8_priv *p, unsigned long delta)
159{ 103{
160 struct clock_event_device *ced = &p->ced; 104 struct clock_event_device *ced = &p->ced;
161 105
@@ -166,7 +110,7 @@ static void timer8_clock_event_start(struct timer8_priv *p, int periodic)
166 ced->max_delta_ns = clockevent_delta2ns(0xffff, ced); 110 ced->max_delta_ns = clockevent_delta2ns(0xffff, ced);
167 ced->min_delta_ns = clockevent_delta2ns(0x0001, ced); 111 ced->min_delta_ns = clockevent_delta2ns(0x0001, ced);
168 112
169 timer8_set_next(p, periodic?(p->rate + HZ/2) / HZ:0x10000); 113 timer8_set_next(p, delta);
170} 114}
171 115
172static int timer8_clock_event_shutdown(struct clock_event_device *ced) 116static int timer8_clock_event_shutdown(struct clock_event_device *ced)
@@ -179,9 +123,9 @@ static int timer8_clock_event_periodic(struct clock_event_device *ced)
179{ 123{
180 struct timer8_priv *p = ced_to_priv(ced); 124 struct timer8_priv *p = ced_to_priv(ced);
181 125
182 dev_info(&p->pdev->dev, "used for periodic clock events\n"); 126 pr_info("%s: used for periodic clock events\n", ced->name);
183 timer8_stop(p); 127 timer8_stop(p);
184 timer8_clock_event_start(p, PERIODIC); 128 timer8_clock_event_start(p, (p->rate + HZ/2) / HZ);
185 129
186 return 0; 130 return 0;
187} 131}
@@ -190,9 +134,9 @@ static int timer8_clock_event_oneshot(struct clock_event_device *ced)
190{ 134{
191 struct timer8_priv *p = ced_to_priv(ced); 135 struct timer8_priv *p = ced_to_priv(ced);
192 136
193 dev_info(&p->pdev->dev, "used for oneshot clock events\n"); 137 pr_info("%s: used for oneshot clock events\n", ced->name);
194 timer8_stop(p); 138 timer8_stop(p);
195 timer8_clock_event_start(p, ONESHOT); 139 timer8_clock_event_start(p, 0x10000);
196 140
197 return 0; 141 return 0;
198} 142}
@@ -208,110 +152,64 @@ static int timer8_clock_event_next(unsigned long delta,
208 return 0; 152 return 0;
209} 153}
210 154
211static int timer8_setup(struct timer8_priv *p, 155static struct timer8_priv timer8_priv = {
212 struct platform_device *pdev) 156 .ced = {
157 .name = "h8300_8timer",
158 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
159 .rating = 200,
160 .set_next_event = timer8_clock_event_next,
161 .set_state_shutdown = timer8_clock_event_shutdown,
162 .set_state_periodic = timer8_clock_event_periodic,
163 .set_state_oneshot = timer8_clock_event_oneshot,
164 },
165};
166
167static void __init h8300_8timer_init(struct device_node *node)
213{ 168{
214 struct resource *res; 169 void __iomem *base;
215 int irq; 170 int irq;
216 int ret; 171 struct clk *clk;
217 172
218 p->pdev = pdev; 173 clk = of_clk_get(node, 0);
219 174 if (IS_ERR(clk)) {
220 res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0); 175 pr_err("failed to get clock for clockevent\n");
221 if (!res) { 176 return;
222 dev_err(&p->pdev->dev, "failed to get I/O memory\n");
223 return -ENXIO;
224 } 177 }
225 178
226 irq = platform_get_irq(p->pdev, 0); 179 base = of_iomap(node, 0);
227 if (irq < 0) { 180 if (!base) {
228 dev_err(&p->pdev->dev, "failed to get irq\n"); 181 pr_err("failed to map registers for clockevent\n");
229 return -ENXIO; 182 goto free_clk;
230 } 183 }
231 184
232 p->mapbase = res->start; 185 irq = irq_of_parse_and_map(node, 0);
233 186 if (!irq) {
234 p->irqaction.name = dev_name(&p->pdev->dev); 187 pr_err("failed to get irq for clockevent\n");
235 p->irqaction.handler = timer8_interrupt; 188 goto unmap_reg;
236 p->irqaction.dev_id = p;
237 p->irqaction.flags = IRQF_TIMER;
238
239 p->pclk = clk_get(&p->pdev->dev, "fck");
240 if (IS_ERR(p->pclk)) {
241 dev_err(&p->pdev->dev, "can't get clk\n");
242 return PTR_ERR(p->pclk);
243 } 189 }
244 190
245 p->ced.name = pdev->name; 191 timer8_priv.mapbase = base;
246 p->ced.features = CLOCK_EVT_FEAT_PERIODIC |
247 CLOCK_EVT_FEAT_ONESHOT;
248 p->ced.rating = 200;
249 p->ced.cpumask = cpumask_of(0);
250 p->ced.set_next_event = timer8_clock_event_next;
251 p->ced.set_state_shutdown = timer8_clock_event_shutdown;
252 p->ced.set_state_periodic = timer8_clock_event_periodic;
253 p->ced.set_state_oneshot = timer8_clock_event_oneshot;
254
255 ret = setup_irq(irq, &p->irqaction);
256 if (ret < 0) {
257 dev_err(&p->pdev->dev,
258 "failed to request irq %d\n", irq);
259 return ret;
260 }
261 clockevents_register_device(&p->ced);
262 platform_set_drvdata(pdev, p);
263 192
264 return 0; 193 timer8_priv.rate = clk_get_rate(clk) / SCALE;
265} 194 if (!timer8_priv.rate) {
266 195 pr_err("Failed to get rate for the clocksource\n");
267static int timer8_probe(struct platform_device *pdev) 196 goto unmap_reg;
268{
269 struct timer8_priv *p = platform_get_drvdata(pdev);
270
271 if (p) {
272 dev_info(&pdev->dev, "kept as earlytimer\n");
273 return 0;
274 } 197 }
275 198
276 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); 199 if (request_irq(irq, timer8_interrupt, IRQF_TIMER,
277 if (!p) 200 timer8_priv.ced.name, &timer8_priv) < 0) {
278 return -ENOMEM; 201 pr_err("failed to request irq %d for clockevent\n", irq);
279 202 goto unmap_reg;
280 return timer8_setup(p, pdev);
281}
282
283static int timer8_remove(struct platform_device *pdev)
284{
285 return -EBUSY;
286}
287
288static const struct of_device_id timer8_of_table[] __maybe_unused = {
289 { .compatible = "renesas,8bit-timer" },
290 { }
291};
292
293MODULE_DEVICE_TABLE(of, timer8_of_table);
294static struct platform_driver timer8_driver = {
295 .probe = timer8_probe,
296 .remove = timer8_remove,
297 .driver = {
298 .name = "h8300-8timer",
299 .of_match_table = of_match_ptr(timer8_of_table),
300 } 203 }
301};
302 204
303static int __init timer8_init(void) 205 clockevents_config_and_register(&timer8_priv.ced,
304{ 206 timer8_priv.rate, 1, 0x0000ffff);
305 return platform_driver_register(&timer8_driver);
306}
307 207
308static void __exit timer8_exit(void) 208 return;
309{ 209unmap_reg:
310 platform_driver_unregister(&timer8_driver); 210 iounmap(base);
211free_clk:
212 clk_put(clk);
311} 213}
312 214
313subsys_initcall(timer8_init); 215CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
314module_exit(timer8_exit);
315MODULE_AUTHOR("Yoshinori Sato");
316MODULE_DESCRIPTION("H8/300 8bit Timer Driver");
317MODULE_LICENSE("GPL v2");