diff options
Diffstat (limited to 'drivers/clk/tegra/clk-pll.c')
-rw-r--r-- | drivers/clk/tegra/clk-pll.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 69fea7d08681..d6d4ecb88e94 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c | |||
@@ -264,7 +264,7 @@ static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll) | |||
264 | } | 264 | } |
265 | 265 | ||
266 | pr_err("%s: Timed out waiting for pll %s lock\n", __func__, | 266 | pr_err("%s: Timed out waiting for pll %s lock\n", __func__, |
267 | __clk_get_name(pll->hw.clk)); | 267 | clk_hw_get_name(&pll->hw)); |
268 | 268 | ||
269 | return -1; | 269 | return -1; |
270 | } | 270 | } |
@@ -595,7 +595,7 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, | |||
595 | if (pll->params->flags & TEGRA_PLL_FIXED) { | 595 | if (pll->params->flags & TEGRA_PLL_FIXED) { |
596 | if (rate != pll->params->fixed_rate) { | 596 | if (rate != pll->params->fixed_rate) { |
597 | pr_err("%s: Can not change %s fixed rate %lu to %lu\n", | 597 | pr_err("%s: Can not change %s fixed rate %lu to %lu\n", |
598 | __func__, __clk_get_name(hw->clk), | 598 | __func__, clk_hw_get_name(hw), |
599 | pll->params->fixed_rate, rate); | 599 | pll->params->fixed_rate, rate); |
600 | return -EINVAL; | 600 | return -EINVAL; |
601 | } | 601 | } |
@@ -605,7 +605,7 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, | |||
605 | if (_get_table_rate(hw, &cfg, rate, parent_rate) && | 605 | if (_get_table_rate(hw, &cfg, rate, parent_rate) && |
606 | _calc_rate(hw, &cfg, rate, parent_rate)) { | 606 | _calc_rate(hw, &cfg, rate, parent_rate)) { |
607 | pr_err("%s: Failed to set %s rate %lu\n", __func__, | 607 | pr_err("%s: Failed to set %s rate %lu\n", __func__, |
608 | __clk_get_name(hw->clk), rate); | 608 | clk_hw_get_name(hw), rate); |
609 | WARN_ON(1); | 609 | WARN_ON(1); |
610 | return -EINVAL; | 610 | return -EINVAL; |
611 | } | 611 | } |
@@ -663,7 +663,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, | |||
663 | if (_get_table_rate(hw, &sel, pll->params->fixed_rate, | 663 | if (_get_table_rate(hw, &sel, pll->params->fixed_rate, |
664 | parent_rate)) { | 664 | parent_rate)) { |
665 | pr_err("Clock %s has unknown fixed frequency\n", | 665 | pr_err("Clock %s has unknown fixed frequency\n", |
666 | __clk_get_name(hw->clk)); | 666 | clk_hw_get_name(hw)); |
667 | BUG(); | 667 | BUG(); |
668 | } | 668 | } |
669 | return pll->params->fixed_rate; | 669 | return pll->params->fixed_rate; |