1 files changed, 77 insertions, 0 deletions

diff --git a/drivers/clk/mediatek/clk-mt2712-venc.c b/drivers/clk/mediatek/clk-mt2712-venc.c
new file mode 100644
index 000000000000..ccbfe98777c8
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt2712-venc.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/platform_device.h>
+
+#include "clk-mtk.h"
+#include "clk-gate.h"
+
+#include <dt-bindings/clock/mt2712-clk.h>
+
+static const struct mtk_gate_regs venc_cg_regs = {
+        .set_ofs = 0x4,
+        .clr_ofs = 0x8,
+        .sta_ofs = 0x0,
+};
+
+#define GATE_VENC(_id, _name, _parent, _shift) {        \
+                .id = _id,                              \
+                .name = _name,                          \
+                .parent_name = _parent,                 \
+                .regs = &venc_cg_regs,                  \
+                .shift = _shift,                        \
+                .ops = &mtk_clk_gate_ops_setclr_inv,    \
+        }
+
+static const struct mtk_gate venc_clks[] = {
+        GATE_VENC(CLK_VENC_SMI_COMMON_CON, "venc_smi", "mm_sel", 0),
+        GATE_VENC(CLK_VENC_VENC, "venc_venc", "venc_sel", 4),
+        GATE_VENC(CLK_VENC_SMI_LARB6, "venc_smi_larb6", "jpgdec_sel", 12),
+};
+
+static int clk_mt2712_venc_probe(struct platform_device *pdev)
+{
+        struct clk_onecell_data *clk_data;
+        int r;
+        struct device_node *node = pdev->dev.of_node;
+
+        clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
+
+        mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
+                        clk_data);
+
+        r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+
+        if (r != 0)
+                pr_err("%s(): could not register clock provider: %d\n",
+                        __func__, r);
+
+        return r;
+}
+
+static const struct of_device_id of_match_clk_mt2712_venc[] = {
+        { .compatible = "mediatek,mt2712-vencsys", },
+        {}
+};
+
+static struct platform_driver clk_mt2712_venc_drv = {
+        .probe = clk_mt2712_venc_probe,
+        .driver = {
+                .name = "clk-mt2712-venc",
+                .of_match_table = of_match_clk_mt2712_venc,
+        },
+};
+
+builtin_platform_driver(clk_mt2712_venc_drv);