diff options
Diffstat (limited to 'crypto')
| -rw-r--r-- | crypto/async_tx/Kconfig | 9 | ||||
| -rw-r--r-- | crypto/async_tx/Makefile | 3 | ||||
| -rw-r--r-- | crypto/async_tx/async_memcpy.c | 44 | ||||
| -rw-r--r-- | crypto/async_tx/async_memset.c | 43 | ||||
| -rw-r--r-- | crypto/async_tx/async_pq.c | 395 | ||||
| -rw-r--r-- | crypto/async_tx/async_raid6_recov.c | 468 | ||||
| -rw-r--r-- | crypto/async_tx/async_tx.c | 87 | ||||
| -rw-r--r-- | crypto/async_tx/async_xor.c | 207 | ||||
| -rw-r--r-- | crypto/async_tx/raid6test.c | 240 |
9 files changed, 1292 insertions, 204 deletions
diff --git a/crypto/async_tx/Kconfig b/crypto/async_tx/Kconfig index d8fb39145986..e5aeb2b79e6f 100644 --- a/crypto/async_tx/Kconfig +++ b/crypto/async_tx/Kconfig | |||
| @@ -14,3 +14,12 @@ config ASYNC_MEMSET | |||
| 14 | tristate | 14 | tristate |
| 15 | select ASYNC_CORE | 15 | select ASYNC_CORE |
| 16 | 16 | ||
| 17 | config ASYNC_PQ | ||
| 18 | tristate | ||
| 19 | select ASYNC_CORE | ||
| 20 | |||
| 21 | config ASYNC_RAID6_RECOV | ||
| 22 | tristate | ||
| 23 | select ASYNC_CORE | ||
| 24 | select ASYNC_PQ | ||
| 25 | |||
diff --git a/crypto/async_tx/Makefile b/crypto/async_tx/Makefile index 27baa7d52fbc..d1e0e6f72bc1 100644 --- a/crypto/async_tx/Makefile +++ b/crypto/async_tx/Makefile | |||
| @@ -2,3 +2,6 @@ obj-$(CONFIG_ASYNC_CORE) += async_tx.o | |||
| 2 | obj-$(CONFIG_ASYNC_MEMCPY) += async_memcpy.o | 2 | obj-$(CONFIG_ASYNC_MEMCPY) += async_memcpy.o |
| 3 | obj-$(CONFIG_ASYNC_MEMSET) += async_memset.o | 3 | obj-$(CONFIG_ASYNC_MEMSET) += async_memset.o |
| 4 | obj-$(CONFIG_ASYNC_XOR) += async_xor.o | 4 | obj-$(CONFIG_ASYNC_XOR) += async_xor.o |
| 5 | obj-$(CONFIG_ASYNC_PQ) += async_pq.o | ||
| 6 | obj-$(CONFIG_ASYNC_RAID6_RECOV) += async_raid6_recov.o | ||
| 7 | obj-$(CONFIG_ASYNC_RAID6_TEST) += raid6test.o | ||
diff --git a/crypto/async_tx/async_memcpy.c b/crypto/async_tx/async_memcpy.c index ddccfb01c416..0ec1fb69d4ea 100644 --- a/crypto/async_tx/async_memcpy.c +++ b/crypto/async_tx/async_memcpy.c | |||
| @@ -33,28 +33,31 @@ | |||
| 33 | * async_memcpy - attempt to copy memory with a dma engine. | 33 | * async_memcpy - attempt to copy memory with a dma engine. |
| 34 | * @dest: destination page | 34 | * @dest: destination page |
| 35 | * @src: src page | 35 | * @src: src page |
| 36 | * @offset: offset in pages to start transaction | 36 | * @dest_offset: offset into 'dest' to start transaction |
| 37 | * @src_offset: offset into 'src' to start transaction | ||
| 37 | * @len: length in bytes | 38 | * @len: length in bytes |
| 38 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK, | 39 | * @submit: submission / completion modifiers |
| 39 | * @depend_tx: memcpy depends on the result of this transaction | 40 | * |
| 40 | * @cb_fn: function to call when the memcpy completes | 41 | * honored flags: ASYNC_TX_ACK |
| 41 | * @cb_param: parameter to pass to the callback routine | ||
| 42 | */ | 42 | */ |
| 43 | struct dma_async_tx_descriptor * | 43 | struct dma_async_tx_descriptor * |
| 44 | async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, | 44 | async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, |
| 45 | unsigned int src_offset, size_t len, enum async_tx_flags flags, | 45 | unsigned int src_offset, size_t len, |
| 46 | struct dma_async_tx_descriptor *depend_tx, | 46 | struct async_submit_ctl *submit) |
| 47 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 48 | { | 47 | { |
| 49 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_MEMCPY, | 48 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY, |
| 50 | &dest, 1, &src, 1, len); | 49 | &dest, 1, &src, 1, len); |
| 51 | struct dma_device *device = chan ? chan->device : NULL; | 50 | struct dma_device *device = chan ? chan->device : NULL; |
| 52 | struct dma_async_tx_descriptor *tx = NULL; | 51 | struct dma_async_tx_descriptor *tx = NULL; |
| 53 | 52 | ||
| 54 | if (device) { | 53 | if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) { |
| 55 | dma_addr_t dma_dest, dma_src; | 54 | dma_addr_t dma_dest, dma_src; |
| 56 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; | 55 | unsigned long dma_prep_flags = 0; |
| 57 | 56 | ||
| 57 | if (submit->cb_fn) | ||
| 58 | dma_prep_flags |= DMA_PREP_INTERRUPT; | ||
| 59 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 60 | dma_prep_flags |= DMA_PREP_FENCE; | ||
| 58 | dma_dest = dma_map_page(device->dev, dest, dest_offset, len, | 61 | dma_dest = dma_map_page(device->dev, dest, dest_offset, len, |
| 59 | DMA_FROM_DEVICE); | 62 | DMA_FROM_DEVICE); |
| 60 | 63 | ||
| @@ -67,13 +70,13 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, | |||
| 67 | 70 | ||
| 68 | if (tx) { | 71 | if (tx) { |
| 69 | pr_debug("%s: (async) len: %zu\n", __func__, len); | 72 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
| 70 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); | 73 | async_tx_submit(chan, tx, submit); |
| 71 | } else { | 74 | } else { |
| 72 | void *dest_buf, *src_buf; | 75 | void *dest_buf, *src_buf; |
| 73 | pr_debug("%s: (sync) len: %zu\n", __func__, len); | 76 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
| 74 | 77 | ||
| 75 | /* wait for any prerequisite operations */ | 78 | /* wait for any prerequisite operations */ |
| 76 | async_tx_quiesce(&depend_tx); | 79 | async_tx_quiesce(&submit->depend_tx); |
| 77 | 80 | ||
| 78 | dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset; | 81 | dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset; |
| 79 | src_buf = kmap_atomic(src, KM_USER1) + src_offset; | 82 | src_buf = kmap_atomic(src, KM_USER1) + src_offset; |
| @@ -83,26 +86,13 @@ async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, | |||
| 83 | kunmap_atomic(dest_buf, KM_USER0); | 86 | kunmap_atomic(dest_buf, KM_USER0); |
| 84 | kunmap_atomic(src_buf, KM_USER1); | 87 | kunmap_atomic(src_buf, KM_USER1); |
| 85 | 88 | ||
| 86 | async_tx_sync_epilog(cb_fn, cb_param); | 89 | async_tx_sync_epilog(submit); |
| 87 | } | 90 | } |
| 88 | 91 | ||
| 89 | return tx; | 92 | return tx; |
| 90 | } | 93 | } |
| 91 | EXPORT_SYMBOL_GPL(async_memcpy); | 94 | EXPORT_SYMBOL_GPL(async_memcpy); |
| 92 | 95 | ||
| 93 | static int __init async_memcpy_init(void) | ||
| 94 | { | ||
| 95 | return 0; | ||
| 96 | } | ||
| 97 | |||
| 98 | static void __exit async_memcpy_exit(void) | ||
| 99 | { | ||
| 100 | do { } while (0); | ||
| 101 | } | ||
| 102 | |||
| 103 | module_init(async_memcpy_init); | ||
| 104 | module_exit(async_memcpy_exit); | ||
| 105 | |||
| 106 | MODULE_AUTHOR("Intel Corporation"); | 96 | MODULE_AUTHOR("Intel Corporation"); |
| 107 | MODULE_DESCRIPTION("asynchronous memcpy api"); | 97 | MODULE_DESCRIPTION("asynchronous memcpy api"); |
| 108 | MODULE_LICENSE("GPL"); | 98 | MODULE_LICENSE("GPL"); |
diff --git a/crypto/async_tx/async_memset.c b/crypto/async_tx/async_memset.c index 5b5eb99bb244..58e4a8752aee 100644 --- a/crypto/async_tx/async_memset.c +++ b/crypto/async_tx/async_memset.c | |||
| @@ -35,26 +35,26 @@ | |||
| 35 | * @val: fill value | 35 | * @val: fill value |
| 36 | * @offset: offset in pages to start transaction | 36 | * @offset: offset in pages to start transaction |
| 37 | * @len: length in bytes | 37 | * @len: length in bytes |
| 38 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK | 38 | * |
| 39 | * @depend_tx: memset depends on the result of this transaction | 39 | * honored flags: ASYNC_TX_ACK |
| 40 | * @cb_fn: function to call when the memcpy completes | ||
| 41 | * @cb_param: parameter to pass to the callback routine | ||
| 42 | */ | 40 | */ |
| 43 | struct dma_async_tx_descriptor * | 41 | struct dma_async_tx_descriptor * |
| 44 | async_memset(struct page *dest, int val, unsigned int offset, | 42 | async_memset(struct page *dest, int val, unsigned int offset, size_t len, |
| 45 | size_t len, enum async_tx_flags flags, | 43 | struct async_submit_ctl *submit) |
| 46 | struct dma_async_tx_descriptor *depend_tx, | ||
| 47 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 48 | { | 44 | { |
| 49 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_MEMSET, | 45 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMSET, |
| 50 | &dest, 1, NULL, 0, len); | 46 | &dest, 1, NULL, 0, len); |
| 51 | struct dma_device *device = chan ? chan->device : NULL; | 47 | struct dma_device *device = chan ? chan->device : NULL; |
| 52 | struct dma_async_tx_descriptor *tx = NULL; | 48 | struct dma_async_tx_descriptor *tx = NULL; |
| 53 | 49 | ||
| 54 | if (device) { | 50 | if (device && is_dma_fill_aligned(device, offset, 0, len)) { |
| 55 | dma_addr_t dma_dest; | 51 | dma_addr_t dma_dest; |
| 56 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; | 52 | unsigned long dma_prep_flags = 0; |
| 57 | 53 | ||
| 54 | if (submit->cb_fn) | ||
| 55 | dma_prep_flags |= DMA_PREP_INTERRUPT; | ||
| 56 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 57 | dma_prep_flags |= DMA_PREP_FENCE; | ||
| 58 | dma_dest = dma_map_page(device->dev, dest, offset, len, | 58 | dma_dest = dma_map_page(device->dev, dest, offset, len, |
| 59 | DMA_FROM_DEVICE); | 59 | DMA_FROM_DEVICE); |
| 60 | 60 | ||
| @@ -64,38 +64,25 @@ async_memset(struct page *dest, int val, unsigned int offset, | |||
| 64 | 64 | ||
| 65 | if (tx) { | 65 | if (tx) { |
| 66 | pr_debug("%s: (async) len: %zu\n", __func__, len); | 66 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
| 67 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); | 67 | async_tx_submit(chan, tx, submit); |
| 68 | } else { /* run the memset synchronously */ | 68 | } else { /* run the memset synchronously */ |
| 69 | void *dest_buf; | 69 | void *dest_buf; |
| 70 | pr_debug("%s: (sync) len: %zu\n", __func__, len); | 70 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
| 71 | 71 | ||
| 72 | dest_buf = (void *) (((char *) page_address(dest)) + offset); | 72 | dest_buf = page_address(dest) + offset; |
| 73 | 73 | ||
| 74 | /* wait for any prerequisite operations */ | 74 | /* wait for any prerequisite operations */ |
| 75 | async_tx_quiesce(&depend_tx); | 75 | async_tx_quiesce(&submit->depend_tx); |
| 76 | 76 | ||
| 77 | memset(dest_buf, val, len); | 77 | memset(dest_buf, val, len); |
| 78 | 78 | ||
| 79 | async_tx_sync_epilog(cb_fn, cb_param); | 79 | async_tx_sync_epilog(submit); |
| 80 | } | 80 | } |
| 81 | 81 | ||
| 82 | return tx; | 82 | return tx; |
| 83 | } | 83 | } |
| 84 | EXPORT_SYMBOL_GPL(async_memset); | 84 | EXPORT_SYMBOL_GPL(async_memset); |
| 85 | 85 | ||
| 86 | static int __init async_memset_init(void) | ||
| 87 | { | ||
| 88 | return 0; | ||
| 89 | } | ||
| 90 | |||
| 91 | static void __exit async_memset_exit(void) | ||
| 92 | { | ||
| 93 | do { } while (0); | ||
| 94 | } | ||
| 95 | |||
| 96 | module_init(async_memset_init); | ||
| 97 | module_exit(async_memset_exit); | ||
| 98 | |||
| 99 | MODULE_AUTHOR("Intel Corporation"); | 86 | MODULE_AUTHOR("Intel Corporation"); |
| 100 | MODULE_DESCRIPTION("asynchronous memset api"); | 87 | MODULE_DESCRIPTION("asynchronous memset api"); |
| 101 | MODULE_LICENSE("GPL"); | 88 | MODULE_LICENSE("GPL"); |
diff --git a/crypto/async_tx/async_pq.c b/crypto/async_tx/async_pq.c new file mode 100644 index 000000000000..b88db6d1dc65 --- /dev/null +++ b/crypto/async_tx/async_pq.c | |||
| @@ -0,0 +1,395 @@ | |||
| 1 | /* | ||
| 2 | * Copyright(c) 2007 Yuri Tikhonov <yur@emcraft.com> | ||
| 3 | * Copyright(c) 2009 Intel Corporation | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify it | ||
| 6 | * under the terms of the GNU General Public License as published by the Free | ||
| 7 | * Software Foundation; either version 2 of the License, or (at your option) | ||
| 8 | * any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 13 | * more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License along with | ||
| 16 | * this program; if not, write to the Free Software Foundation, Inc., 59 | ||
| 17 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
| 18 | * | ||
| 19 | * The full GNU General Public License is included in this distribution in the | ||
| 20 | * file called COPYING. | ||
| 21 | */ | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/interrupt.h> | ||
| 24 | #include <linux/dma-mapping.h> | ||
| 25 | #include <linux/raid/pq.h> | ||
| 26 | #include <linux/async_tx.h> | ||
| 27 | |||
| 28 | /** | ||
| 29 | * scribble - space to hold throwaway P buffer for synchronous gen_syndrome | ||
| 30 | */ | ||
| 31 | static struct page *scribble; | ||
| 32 | |||
| 33 | static bool is_raid6_zero_block(struct page *p) | ||
| 34 | { | ||
| 35 | return p == (void *) raid6_empty_zero_page; | ||
| 36 | } | ||
| 37 | |||
| 38 | /* the struct page *blocks[] parameter passed to async_gen_syndrome() | ||
| 39 | * and async_syndrome_val() contains the 'P' destination address at | ||
| 40 | * blocks[disks-2] and the 'Q' destination address at blocks[disks-1] | ||
| 41 | * | ||
| 42 | * note: these are macros as they are used as lvalues | ||
| 43 | */ | ||
| 44 | #define P(b, d) (b[d-2]) | ||
| 45 | #define Q(b, d) (b[d-1]) | ||
| 46 | |||
| 47 | /** | ||
| 48 | * do_async_gen_syndrome - asynchronously calculate P and/or Q | ||
| 49 | */ | ||
| 50 | static __async_inline struct dma_async_tx_descriptor * | ||
| 51 | do_async_gen_syndrome(struct dma_chan *chan, struct page **blocks, | ||
| 52 | const unsigned char *scfs, unsigned int offset, int disks, | ||
| 53 | size_t len, dma_addr_t *dma_src, | ||
| 54 | struct async_submit_ctl *submit) | ||
| 55 | { | ||
| 56 | struct dma_async_tx_descriptor *tx = NULL; | ||
| 57 | struct dma_device *dma = chan->device; | ||
| 58 | enum dma_ctrl_flags dma_flags = 0; | ||
| 59 | enum async_tx_flags flags_orig = submit->flags; | ||
| 60 | dma_async_tx_callback cb_fn_orig = submit->cb_fn; | ||
| 61 | dma_async_tx_callback cb_param_orig = submit->cb_param; | ||
| 62 | int src_cnt = disks - 2; | ||
| 63 | unsigned char coefs[src_cnt]; | ||
| 64 | unsigned short pq_src_cnt; | ||
| 65 | dma_addr_t dma_dest[2]; | ||
| 66 | int src_off = 0; | ||
| 67 | int idx; | ||
| 68 | int i; | ||
| 69 | |||
| 70 | /* DMAs use destinations as sources, so use BIDIRECTIONAL mapping */ | ||
| 71 | if (P(blocks, disks)) | ||
| 72 | dma_dest[0] = dma_map_page(dma->dev, P(blocks, disks), offset, | ||
| 73 | len, DMA_BIDIRECTIONAL); | ||
| 74 | else | ||
| 75 | dma_flags |= DMA_PREP_PQ_DISABLE_P; | ||
| 76 | if (Q(blocks, disks)) | ||
| 77 | dma_dest[1] = dma_map_page(dma->dev, Q(blocks, disks), offset, | ||
| 78 | len, DMA_BIDIRECTIONAL); | ||
| 79 | else | ||
| 80 | dma_flags |= DMA_PREP_PQ_DISABLE_Q; | ||
| 81 | |||
| 82 | /* convert source addresses being careful to collapse 'empty' | ||
| 83 | * sources and update the coefficients accordingly | ||
| 84 | */ | ||
| 85 | for (i = 0, idx = 0; i < src_cnt; i++) { | ||
| 86 | if (is_raid6_zero_block(blocks[i])) | ||
| 87 | continue; | ||
| 88 | dma_src[idx] = dma_map_page(dma->dev, blocks[i], offset, len, | ||
| 89 | DMA_TO_DEVICE); | ||
| 90 | coefs[idx] = scfs[i]; | ||
| 91 | idx++; | ||
| 92 | } | ||
| 93 | src_cnt = idx; | ||
| 94 | |||
| 95 | while (src_cnt > 0) { | ||
| 96 | submit->flags = flags_orig; | ||
| 97 | pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); | ||
| 98 | /* if we are submitting additional pqs, leave the chain open, | ||
| 99 | * clear the callback parameters, and leave the destination | ||
| 100 | * buffers mapped | ||
| 101 | */ | ||
| 102 | if (src_cnt > pq_src_cnt) { | ||
| 103 | submit->flags &= ~ASYNC_TX_ACK; | ||
| 104 | submit->flags |= ASYNC_TX_FENCE; | ||
| 105 | dma_flags |= DMA_COMPL_SKIP_DEST_UNMAP; | ||
| 106 | submit->cb_fn = NULL; | ||
| 107 | submit->cb_param = NULL; | ||
| 108 | } else { | ||
| 109 | dma_flags &= ~DMA_COMPL_SKIP_DEST_UNMAP; | ||
| 110 | submit->cb_fn = cb_fn_orig; | ||
| 111 | submit->cb_param = cb_param_orig; | ||
| 112 | if (cb_fn_orig) | ||
| 113 | dma_flags |= DMA_PREP_INTERRUPT; | ||
| 114 | } | ||
| 115 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 116 | dma_flags |= DMA_PREP_FENCE; | ||
| 117 | |||
| 118 | /* Since we have clobbered the src_list we are committed | ||
| 119 | * to doing this asynchronously. Drivers force forward | ||
| 120 | * progress in case they can not provide a descriptor | ||
| 121 | */ | ||
| 122 | for (;;) { | ||
| 123 | tx = dma->device_prep_dma_pq(chan, dma_dest, | ||
| 124 | &dma_src[src_off], | ||
| 125 | pq_src_cnt, | ||
| 126 | &coefs[src_off], len, | ||
| 127 | dma_flags); | ||
| 128 | if (likely(tx)) | ||
| 129 | break; | ||
| 130 | async_tx_quiesce(&submit->depend_tx); | ||
| 131 | dma_async_issue_pending(chan); | ||
| 132 | } | ||
| 133 | |||
| 134 | async_tx_submit(chan, tx, submit); | ||
| 135 | submit->depend_tx = tx; | ||
| 136 | |||
| 137 | /* drop completed sources */ | ||
| 138 | src_cnt -= pq_src_cnt; | ||
| 139 | src_off += pq_src_cnt; | ||
| 140 | |||
| 141 | dma_flags |= DMA_PREP_CONTINUE; | ||
| 142 | } | ||
| 143 | |||
| 144 | return tx; | ||
| 145 | } | ||
| 146 | |||
| 147 | /** | ||
| 148 | * do_sync_gen_syndrome - synchronously calculate a raid6 syndrome | ||
| 149 | */ | ||
| 150 | static void | ||
| 151 | do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks, | ||
| 152 | size_t len, struct async_submit_ctl *submit) | ||
| 153 | { | ||
| 154 | void **srcs; | ||
| 155 | int i; | ||
| 156 | |||
| 157 | if (submit->scribble) | ||
| 158 | srcs = submit->scribble; | ||
| 159 | else | ||
| 160 | srcs = (void **) blocks; | ||
| 161 | |||
| 162 | for (i = 0; i < disks; i++) { | ||
| 163 | if (is_raid6_zero_block(blocks[i])) { | ||
| 164 | BUG_ON(i > disks - 3); /* P or Q can't be zero */ | ||
| 165 | srcs[i] = blocks[i]; | ||
| 166 | } else | ||
| 167 | srcs[i] = page_address(blocks[i]) + offset; | ||
| 168 | } | ||
| 169 | raid6_call.gen_syndrome(disks, len, srcs); | ||
| 170 | async_tx_sync_epilog(submit); | ||
| 171 | } | ||
| 172 | |||
| 173 | /** | ||
| 174 | * async_gen_syndrome - asynchronously calculate a raid6 syndrome | ||
| 175 | * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1 | ||
| 176 | * @offset: common offset into each block (src and dest) to start transaction | ||
| 177 | * @disks: number of blocks (including missing P or Q, see below) | ||
| 178 | * @len: length of operation in bytes | ||
| 179 | * @submit: submission/completion modifiers | ||
| 180 | * | ||
| 181 | * General note: This routine assumes a field of GF(2^8) with a | ||
| 182 | * primitive polynomial of 0x11d and a generator of {02}. | ||
| 183 | * | ||
| 184 | * 'disks' note: callers can optionally omit either P or Q (but not | ||
| 185 | * both) from the calculation by setting blocks[disks-2] or | ||
| 186 | * blocks[disks-1] to NULL. When P or Q is omitted 'len' must be <= | ||
| 187 | * PAGE_SIZE as a temporary buffer of this size is used in the | ||
| 188 | * synchronous path. 'disks' always accounts for both destination | ||
| 189 | * buffers. | ||
| 190 | * | ||
| 191 | * 'blocks' note: if submit->scribble is NULL then the contents of | ||
| 192 | * 'blocks' may be overridden | ||
| 193 | */ | ||
| 194 | struct dma_async_tx_descriptor * | ||
| 195 | async_gen_syndrome(struct page **blocks, unsigned int offset, int disks, | ||
| 196 | size_t len, struct async_submit_ctl *submit) | ||
| 197 | { | ||
| 198 | int src_cnt = disks - 2; | ||
| 199 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ, | ||
| 200 | &P(blocks, disks), 2, | ||
| 201 | blocks, src_cnt, len); | ||
| 202 | struct dma_device *device = chan ? chan->device : NULL; | ||
| 203 | dma_addr_t *dma_src = NULL; | ||
| 204 | |||
| 205 | BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks))); | ||
| 206 | |||
| 207 | if (submit->scribble) | ||
| 208 | dma_src = submit->scribble; | ||
| 209 | else if (sizeof(dma_addr_t) <= sizeof(struct page *)) | ||
| 210 | dma_src = (dma_addr_t *) blocks; | ||
| 211 | |||
| 212 | if (dma_src && device && | ||
| 213 | (src_cnt <= dma_maxpq(device, 0) || | ||
| 214 | dma_maxpq(device, DMA_PREP_CONTINUE) > 0) && | ||
| 215 | is_dma_pq_aligned(device, offset, 0, len)) { | ||
| 216 | /* run the p+q asynchronously */ | ||
| 217 | pr_debug("%s: (async) disks: %d len: %zu\n", | ||
| 218 | __func__, disks, len); | ||
| 219 | return do_async_gen_syndrome(chan, blocks, raid6_gfexp, offset, | ||
| 220 | disks, len, dma_src, submit); | ||
| 221 | } | ||
| 222 | |||
| 223 | /* run the pq synchronously */ | ||
| 224 | pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len); | ||
| 225 | |||
| 226 | /* wait for any prerequisite operations */ | ||
| 227 | async_tx_quiesce(&submit->depend_tx); | ||
| 228 | |||
| 229 | if (!P(blocks, disks)) { | ||
| 230 | P(blocks, disks) = scribble; | ||
| 231 | BUG_ON(len + offset > PAGE_SIZE); | ||
| 232 | } | ||
| 233 | if (!Q(blocks, disks)) { | ||
| 234 | Q(blocks, disks) = scribble; | ||
| 235 | BUG_ON(len + offset > PAGE_SIZE); | ||
| 236 | } | ||
| 237 | do_sync_gen_syndrome(blocks, offset, disks, len, submit); | ||
| 238 | |||
| 239 | return NULL; | ||
| 240 | } | ||
| 241 | EXPORT_SYMBOL_GPL(async_gen_syndrome); | ||
| 242 | |||
| 243 | /** | ||
| 244 | * async_syndrome_val - asynchronously validate a raid6 syndrome | ||
| 245 | * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1 | ||
| 246 | * @offset: common offset into each block (src and dest) to start transaction | ||
| 247 | * @disks: number of blocks (including missing P or Q, see below) | ||
| 248 | * @len: length of operation in bytes | ||
| 249 | * @pqres: on val failure SUM_CHECK_P_RESULT and/or SUM_CHECK_Q_RESULT are set | ||
| 250 | * @spare: temporary result buffer for the synchronous case | ||
| 251 | * @submit: submission / completion modifiers | ||
| 252 | * | ||
| 253 | * The same notes from async_gen_syndrome apply to the 'blocks', | ||
| 254 | * and 'disks' parameters of this routine. The synchronous path | ||
| 255 | * requires a temporary result buffer and submit->scribble to be | ||
| 256 | * specified. | ||
| 257 | */ | ||
| 258 | struct dma_async_tx_descriptor * | ||
| 259 | async_syndrome_val(struct page **blocks, unsigned int offset, int disks, | ||
| 260 | size_t len, enum sum_check_flags *pqres, struct page *spare, | ||
| 261 | struct async_submit_ctl *submit) | ||
| 262 | { | ||
| 263 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ_VAL, | ||
| 264 | NULL, 0, blocks, disks, | ||
| 265 | len); | ||
| 266 | struct dma_device *device = chan ? chan->device : NULL; | ||
| 267 | struct dma_async_tx_descriptor *tx; | ||
| 268 | enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0; | ||
| 269 | dma_addr_t *dma_src = NULL; | ||
| 270 | |||
| 271 | BUG_ON(disks < 4); | ||
| 272 | |||
| 273 | if (submit->scribble) | ||
| 274 | dma_src = submit->scribble; | ||
| 275 | else if (sizeof(dma_addr_t) <= sizeof(struct page *)) | ||
| 276 | dma_src = (dma_addr_t *) blocks; | ||
| 277 | |||
| 278 | if (dma_src && device && disks <= dma_maxpq(device, 0) && | ||
| 279 | is_dma_pq_aligned(device, offset, 0, len)) { | ||
| 280 | struct device *dev = device->dev; | ||
| 281 | dma_addr_t *pq = &dma_src[disks-2]; | ||
| 282 | int i; | ||
| 283 | |||
| 284 | pr_debug("%s: (async) disks: %d len: %zu\n", | ||
| 285 | __func__, disks, len); | ||
| 286 | if (!P(blocks, disks)) | ||
| 287 | dma_flags |= DMA_PREP_PQ_DISABLE_P; | ||
| 288 | if (!Q(blocks, disks)) | ||
| 289 | dma_flags |= DMA_PREP_PQ_DISABLE_Q; | ||
| 290 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 291 | dma_flags |= DMA_PREP_FENCE; | ||
| 292 | for (i = 0; i < disks; i++) | ||
| 293 | if (likely(blocks[i])) { | ||
| 294 | BUG_ON(is_raid6_zero_block(blocks[i])); | ||
| 295 | dma_src[i] = dma_map_page(dev, blocks[i], | ||
| 296 | offset, len, | ||
| 297 | DMA_TO_DEVICE); | ||
| 298 | } | ||
| 299 | |||
| 300 | for (;;) { | ||
| 301 | tx = device->device_prep_dma_pq_val(chan, pq, dma_src, | ||
| 302 | disks - 2, | ||
| 303 | raid6_gfexp, | ||
| 304 | len, pqres, | ||
| 305 | dma_flags); | ||
| 306 | if (likely(tx)) | ||
| 307 | break; | ||
| 308 | async_tx_quiesce(&submit->depend_tx); | ||
| 309 | dma_async_issue_pending(chan); | ||
| 310 | } | ||
| 311 | async_tx_submit(chan, tx, submit); | ||
| 312 | |||
| 313 | return tx; | ||
| 314 | } else { | ||
| 315 | struct page *p_src = P(blocks, disks); | ||
| 316 | struct page *q_src = Q(blocks, disks); | ||
| 317 | enum async_tx_flags flags_orig = submit->flags; | ||
| 318 | dma_async_tx_callback cb_fn_orig = submit->cb_fn; | ||
| 319 | void *scribble = submit->scribble; | ||
| 320 | void *cb_param_orig = submit->cb_param; | ||
| 321 | void *p, *q, *s; | ||
| 322 | |||
| 323 | pr_debug("%s: (sync) disks: %d len: %zu\n", | ||
| 324 | __func__, disks, len); | ||
| 325 | |||
| 326 | /* caller must provide a temporary result buffer and | ||
| 327 | * allow the input parameters to be preserved | ||
| 328 | */ | ||
| 329 | BUG_ON(!spare || !scribble); | ||
| 330 | |||
| 331 | /* wait for any prerequisite operations */ | ||
| 332 | async_tx_quiesce(&submit->depend_tx); | ||
| 333 | |||
| 334 | /* recompute p and/or q into the temporary buffer and then | ||
| 335 | * check to see the result matches the current value | ||
| 336 | */ | ||
| 337 | tx = NULL; | ||
| 338 | *pqres = 0; | ||
| 339 | if (p_src) { | ||
| 340 | init_async_submit(submit, ASYNC_TX_XOR_ZERO_DST, NULL, | ||
| 341 | NULL, NULL, scribble); | ||
| 342 | tx = async_xor(spare, blocks, offset, disks-2, len, submit); | ||
| 343 | async_tx_quiesce(&tx); | ||
| 344 | p = page_address(p_src) + offset; | ||
| 345 | s = page_address(spare) + offset; | ||
| 346 | *pqres |= !!memcmp(p, s, len) << SUM_CHECK_P; | ||
| 347 | } | ||
| 348 | |||
| 349 | if (q_src) { | ||
| 350 | P(blocks, disks) = NULL; | ||
| 351 | Q(blocks, disks) = spare; | ||
| 352 | init_async_submit(submit, 0, NULL, NULL, NULL, scribble); | ||
| 353 | tx = async_gen_syndrome(blocks, offset, disks, len, submit); | ||
| 354 | async_tx_quiesce(&tx); | ||
| 355 | q = page_address(q_src) + offset; | ||
| 356 | s = page_address(spare) + offset; | ||
| 357 | *pqres |= !!memcmp(q, s, len) << SUM_CHECK_Q; | ||
| 358 | } | ||
| 359 | |||
| 360 | /* restore P, Q and submit */ | ||
| 361 | P(blocks, disks) = p_src; | ||
| 362 | Q(blocks, disks) = q_src; | ||
| 363 | |||
| 364 | submit->cb_fn = cb_fn_orig; | ||
| 365 | submit->cb_param = cb_param_orig; | ||
| 366 | submit->flags = flags_orig; | ||
| 367 | async_tx_sync_epilog(submit); | ||
| 368 | |||
| 369 | return NULL; | ||
| 370 | } | ||
| 371 | } | ||
| 372 | EXPORT_SYMBOL_GPL(async_syndrome_val); | ||
| 373 | |||
| 374 | static int __init async_pq_init(void) | ||
| 375 | { | ||
| 376 | scribble = alloc_page(GFP_KERNEL); | ||
| 377 | |||
| 378 | if (scribble) | ||
| 379 | return 0; | ||
| 380 | |||
| 381 | pr_err("%s: failed to allocate required spare page\n", __func__); | ||
| 382 | |||
| 383 | return -ENOMEM; | ||
| 384 | } | ||
| 385 | |||
| 386 | static void __exit async_pq_exit(void) | ||
| 387 | { | ||
| 388 | put_page(scribble); | ||
| 389 | } | ||
| 390 | |||
| 391 | module_init(async_pq_init); | ||
| 392 | module_exit(async_pq_exit); | ||
| 393 | |||
| 394 | MODULE_DESCRIPTION("asynchronous raid6 syndrome generation/validation"); | ||
| 395 | MODULE_LICENSE("GPL"); | ||
diff --git a/crypto/async_tx/async_raid6_recov.c b/crypto/async_tx/async_raid6_recov.c new file mode 100644 index 000000000000..6d73dde4786d --- /dev/null +++ b/crypto/async_tx/async_raid6_recov.c | |||
| @@ -0,0 +1,468 @@ | |||
| 1 | /* | ||
| 2 | * Asynchronous RAID-6 recovery calculations ASYNC_TX API. | ||
| 3 | * Copyright(c) 2009 Intel Corporation | ||
| 4 | * | ||
| 5 | * based on raid6recov.c: | ||
| 6 | * Copyright 2002 H. Peter Anvin | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the Free | ||
| 10 | * Software Foundation; either version 2 of the License, or (at your option) | ||
| 11 | * any later version. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
| 14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 16 | * more details. | ||
| 17 | * | ||
| 18 | * You should have received a copy of the GNU General Public License along with | ||
| 19 | * this program; if not, write to the Free Software Foundation, Inc., 51 | ||
| 20 | * Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
| 21 | * | ||
| 22 | */ | ||
| 23 | #include <linux/kernel.h> | ||
| 24 | #include <linux/interrupt.h> | ||
| 25 | #include <linux/dma-mapping.h> | ||
| 26 | #include <linux/raid/pq.h> | ||
| 27 | #include <linux/async_tx.h> | ||
| 28 | |||
| 29 | static struct dma_async_tx_descriptor * | ||
| 30 | async_sum_product(struct page *dest, struct page **srcs, unsigned char *coef, | ||
| 31 | size_t len, struct async_submit_ctl *submit) | ||
| 32 | { | ||
| 33 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ, | ||
| 34 | &dest, 1, srcs, 2, len); | ||
| 35 | struct dma_device *dma = chan ? chan->device : NULL; | ||
| 36 | const u8 *amul, *bmul; | ||
| 37 | u8 ax, bx; | ||
| 38 | u8 *a, *b, *c; | ||
| 39 | |||
| 40 | if (dma) { | ||
| 41 | dma_addr_t dma_dest[2]; | ||
| 42 | dma_addr_t dma_src[2]; | ||
| 43 | struct device *dev = dma->dev; | ||
| 44 | struct dma_async_tx_descriptor *tx; | ||
| 45 | enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P; | ||
| 46 | |||
| 47 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 48 | dma_flags |= DMA_PREP_FENCE; | ||
| 49 | dma_dest[1] = dma_map_page(dev, dest, 0, len, DMA_BIDIRECTIONAL); | ||
| 50 | dma_src[0] = dma_map_page(dev, srcs[0], 0, len, DMA_TO_DEVICE); | ||
| 51 | dma_src[1] = dma_map_page(dev, srcs[1], 0, len, DMA_TO_DEVICE); | ||
| 52 | tx = dma->device_prep_dma_pq(chan, dma_dest, dma_src, 2, coef, | ||
| 53 | len, dma_flags); | ||
| 54 | if (tx) { | ||
| 55 | async_tx_submit(chan, tx, submit); | ||
| 56 | return tx; | ||
| 57 | } | ||
| 58 | |||
| 59 | /* could not get a descriptor, unmap and fall through to | ||
| 60 | * the synchronous path | ||
| 61 | */ | ||
| 62 | dma_unmap_page(dev, dma_dest[1], len, DMA_BIDIRECTIONAL); | ||
| 63 | dma_unmap_page(dev, dma_src[0], len, DMA_TO_DEVICE); | ||
| 64 | dma_unmap_page(dev, dma_src[1], len, DMA_TO_DEVICE); | ||
| 65 | } | ||
| 66 | |||
| 67 | /* run the operation synchronously */ | ||
| 68 | async_tx_quiesce(&submit->depend_tx); | ||
| 69 | amul = raid6_gfmul[coef[0]]; | ||
| 70 | bmul = raid6_gfmul[coef[1]]; | ||
| 71 | a = page_address(srcs[0]); | ||
| 72 | b = page_address(srcs[1]); | ||
| 73 | c = page_address(dest); | ||
| 74 | |||
| 75 | while (len--) { | ||
| 76 | ax = amul[*a++]; | ||
| 77 | bx = bmul[*b++]; | ||
| 78 | *c++ = ax ^ bx; | ||
| 79 | } | ||
| 80 | |||
| 81 | return NULL; | ||
| 82 | } | ||
| 83 | |||
| 84 | static struct dma_async_tx_descriptor * | ||
| 85 | async_mult(struct page *dest, struct page *src, u8 coef, size_t len, | ||
| 86 | struct async_submit_ctl *submit) | ||
| 87 | { | ||
| 88 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ, | ||
| 89 | &dest, 1, &src, 1, len); | ||
| 90 | struct dma_device *dma = chan ? chan->device : NULL; | ||
| 91 | const u8 *qmul; /* Q multiplier table */ | ||
| 92 | u8 *d, *s; | ||
| 93 | |||
| 94 | if (dma) { | ||
| 95 | dma_addr_t dma_dest[2]; | ||
| 96 | dma_addr_t dma_src[1]; | ||
| 97 | struct device *dev = dma->dev; | ||
| 98 | struct dma_async_tx_descriptor *tx; | ||
| 99 | enum dma_ctrl_flags dma_flags = DMA_PREP_PQ_DISABLE_P; | ||
| 100 | |||
| 101 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 102 | dma_flags |= DMA_PREP_FENCE; | ||
| 103 | dma_dest[1] = dma_map_page(dev, dest, 0, len, DMA_BIDIRECTIONAL); | ||
| 104 | dma_src[0] = dma_map_page(dev, src, 0, len, DMA_TO_DEVICE); | ||
| 105 | tx = dma->device_prep_dma_pq(chan, dma_dest, dma_src, 1, &coef, | ||
| 106 | len, dma_flags); | ||
| 107 | if (tx) { | ||
| 108 | async_tx_submit(chan, tx, submit); | ||
| 109 | return tx; | ||
| 110 | } | ||
| 111 | |||
| 112 | /* could not get a descriptor, unmap and fall through to | ||
| 113 | * the synchronous path | ||
| 114 | */ | ||
| 115 | dma_unmap_page(dev, dma_dest[1], len, DMA_BIDIRECTIONAL); | ||
| 116 | dma_unmap_page(dev, dma_src[0], len, DMA_TO_DEVICE); | ||
| 117 | } | ||
| 118 | |||
| 119 | /* no channel available, or failed to allocate a descriptor, so | ||
| 120 | * perform the operation synchronously | ||
| 121 | */ | ||
| 122 | async_tx_quiesce(&submit->depend_tx); | ||
| 123 | qmul = raid6_gfmul[coef]; | ||
| 124 | d = page_address(dest); | ||
| 125 | s = page_address(src); | ||
| 126 | |||
| 127 | while (len--) | ||
| 128 | *d++ = qmul[*s++]; | ||
| 129 | |||
| 130 | return NULL; | ||
| 131 | } | ||
| 132 | |||
| 133 | static struct dma_async_tx_descriptor * | ||
| 134 | __2data_recov_4(size_t bytes, int faila, int failb, struct page **blocks, | ||
| 135 | struct async_submit_ctl *submit) | ||
| 136 | { | ||
| 137 | struct dma_async_tx_descriptor *tx = NULL; | ||
| 138 | struct page *p, *q, *a, *b; | ||
| 139 | struct page *srcs[2]; | ||
| 140 | unsigned char coef[2]; | ||
| 141 | enum async_tx_flags flags = submit->flags; | ||
| 142 | dma_async_tx_callback cb_fn = submit->cb_fn; | ||
| 143 | void *cb_param = submit->cb_param; | ||
| 144 | void *scribble = submit->scribble; | ||
| 145 | |||
| 146 | p = blocks[4-2]; | ||
| 147 | q = blocks[4-1]; | ||
| 148 | |||
| 149 | a = blocks[faila]; | ||
| 150 | b = blocks[failb]; | ||
| 151 | |||
| 152 | /* in the 4 disk case P + Pxy == P and Q + Qxy == Q */ | ||
| 153 | /* Dx = A*(P+Pxy) + B*(Q+Qxy) */ | ||
| 154 | srcs[0] = p; | ||
| 155 | srcs[1] = q; | ||
| 156 | coef[0] = raid6_gfexi[failb-faila]; | ||
| 157 | coef[1] = raid6_gfinv[raid6_gfexp[faila]^raid6_gfexp[failb]]; | ||
| 158 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 159 | tx = async_sum_product(b, srcs, coef, bytes, submit); | ||
| 160 | |||
| 161 | /* Dy = P+Pxy+Dx */ | ||
| 162 | srcs[0] = p; | ||
| 163 | srcs[1] = b; | ||
| 164 | init_async_submit(submit, flags | ASYNC_TX_XOR_ZERO_DST, tx, cb_fn, | ||
| 165 | cb_param, scribble); | ||
| 166 | tx = async_xor(a, srcs, 0, 2, bytes, submit); | ||
| 167 | |||
| 168 | return tx; | ||
| 169 | |||
| 170 | } | ||
| 171 | |||
| 172 | static struct dma_async_tx_descriptor * | ||
| 173 | __2data_recov_5(size_t bytes, int faila, int failb, struct page **blocks, | ||
| 174 | struct async_submit_ctl *submit) | ||
| 175 | { | ||
| 176 | struct dma_async_tx_descriptor *tx = NULL; | ||
| 177 | struct page *p, *q, *g, *dp, *dq; | ||
| 178 | struct page *srcs[2]; | ||
| 179 | unsigned char coef[2]; | ||
| 180 | enum async_tx_flags flags = submit->flags; | ||
| 181 | dma_async_tx_callback cb_fn = submit->cb_fn; | ||
| 182 | void *cb_param = submit->cb_param; | ||
| 183 | void *scribble = submit->scribble; | ||
| 184 | int uninitialized_var(good); | ||
| 185 | int i; | ||
| 186 | |||
| 187 | for (i = 0; i < 3; i++) { | ||
| 188 | if (i == faila || i == failb) | ||
| 189 | continue; | ||
| 190 | else { | ||
| 191 | good = i; | ||
| 192 | break; | ||
| 193 | } | ||
| 194 | } | ||
| 195 | BUG_ON(i >= 3); | ||
| 196 | |||
| 197 | p = blocks[5-2]; | ||
| 198 | q = blocks[5-1]; | ||
| 199 | g = blocks[good]; | ||
| 200 | |||
| 201 | /* Compute syndrome with zero for the missing data pages | ||
| 202 | * Use the dead data pages as temporary storage for delta p and | ||
| 203 | * delta q | ||
| 204 | */ | ||
| 205 | dp = blocks[faila]; | ||
| 206 | dq = blocks[failb]; | ||
| 207 | |||
| 208 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 209 | tx = async_memcpy(dp, g, 0, 0, bytes, submit); | ||
| 210 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 211 | tx = async_mult(dq, g, raid6_gfexp[good], bytes, submit); | ||
| 212 | |||
| 213 | /* compute P + Pxy */ | ||
| 214 | srcs[0] = dp; | ||
| 215 | srcs[1] = p; | ||
| 216 | init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx, | ||
| 217 | NULL, NULL, scribble); | ||
| 218 | tx = async_xor(dp, srcs, 0, 2, bytes, submit); | ||
| 219 | |||
| 220 | /* compute Q + Qxy */ | ||
| 221 | srcs[0] = dq; | ||
| 222 | srcs[1] = q; | ||
| 223 | init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx, | ||
| 224 | NULL, NULL, scribble); | ||
| 225 | tx = async_xor(dq, srcs, 0, 2, bytes, submit); | ||
| 226 | |||
| 227 | /* Dx = A*(P+Pxy) + B*(Q+Qxy) */ | ||
| 228 | srcs[0] = dp; | ||
| 229 | srcs[1] = dq; | ||
| 230 | coef[0] = raid6_gfexi[failb-faila]; | ||
| 231 | coef[1] = raid6_gfinv[raid6_gfexp[faila]^raid6_gfexp[failb]]; | ||
| 232 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 233 | tx = async_sum_product(dq, srcs, coef, bytes, submit); | ||
| 234 | |||
| 235 | /* Dy = P+Pxy+Dx */ | ||
| 236 | srcs[0] = dp; | ||
| 237 | srcs[1] = dq; | ||
| 238 | init_async_submit(submit, flags | ASYNC_TX_XOR_DROP_DST, tx, cb_fn, | ||
| 239 | cb_param, scribble); | ||
| 240 | tx = async_xor(dp, srcs, 0, 2, bytes, submit); | ||
| 241 | |||
| 242 | return tx; | ||
| 243 | } | ||
| 244 | |||
| 245 | static struct dma_async_tx_descriptor * | ||
| 246 | __2data_recov_n(int disks, size_t bytes, int faila, int failb, | ||
| 247 | struct page **blocks, struct async_submit_ctl *submit) | ||
| 248 | { | ||
| 249 | struct dma_async_tx_descriptor *tx = NULL; | ||
| 250 | struct page *p, *q, *dp, *dq; | ||
| 251 | struct page *srcs[2]; | ||
| 252 | unsigned char coef[2]; | ||
| 253 | enum async_tx_flags flags = submit->flags; | ||
| 254 | dma_async_tx_callback cb_fn = submit->cb_fn; | ||
| 255 | void *cb_param = submit->cb_param; | ||
| 256 | void *scribble = submit->scribble; | ||
| 257 | |||
| 258 | p = blocks[disks-2]; | ||
| 259 | q = blocks[disks-1]; | ||
| 260 | |||
| 261 | /* Compute syndrome with zero for the missing data pages | ||
| 262 | * Use the dead data pages as temporary storage for | ||
| 263 | * delta p and delta q | ||
| 264 | */ | ||
| 265 | dp = blocks[faila]; | ||
| 266 | blocks[faila] = (void *)raid6_empty_zero_page; | ||
| 267 | blocks[disks-2] = dp; | ||
| 268 | dq = blocks[failb]; | ||
| 269 | blocks[failb] = (void *)raid6_empty_zero_page; | ||
| 270 | blocks[disks-1] = dq; | ||
| 271 | |||
| 272 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 273 | tx = async_gen_syndrome(blocks, 0, disks, bytes, submit); | ||
| 274 | |||
| 275 | /* Restore pointer table */ | ||
| 276 | blocks[faila] = dp; | ||
| 277 | blocks[failb] = dq; | ||
| 278 | blocks[disks-2] = p; | ||
| 279 | blocks[disks-1] = q; | ||
| 280 | |||
| 281 | /* compute P + Pxy */ | ||
| 282 | srcs[0] = dp; | ||
| 283 | srcs[1] = p; | ||
| 284 | init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx, | ||
| 285 | NULL, NULL, scribble); | ||
| 286 | tx = async_xor(dp, srcs, 0, 2, bytes, submit); | ||
| 287 | |||
| 288 | /* compute Q + Qxy */ | ||
| 289 | srcs[0] = dq; | ||
| 290 | srcs[1] = q; | ||
| 291 | init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx, | ||
| 292 | NULL, NULL, scribble); | ||
| 293 | tx = async_xor(dq, srcs, 0, 2, bytes, submit); | ||
| 294 | |||
| 295 | /* Dx = A*(P+Pxy) + B*(Q+Qxy) */ | ||
| 296 | srcs[0] = dp; | ||
| 297 | srcs[1] = dq; | ||
| 298 | coef[0] = raid6_gfexi[failb-faila]; | ||
| 299 | coef[1] = raid6_gfinv[raid6_gfexp[faila]^raid6_gfexp[failb]]; | ||
| 300 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 301 | tx = async_sum_product(dq, srcs, coef, bytes, submit); | ||
| 302 | |||
| 303 | /* Dy = P+Pxy+Dx */ | ||
| 304 | srcs[0] = dp; | ||
| 305 | srcs[1] = dq; | ||
| 306 | init_async_submit(submit, flags | ASYNC_TX_XOR_DROP_DST, tx, cb_fn, | ||
| 307 | cb_param, scribble); | ||
| 308 | tx = async_xor(dp, srcs, 0, 2, bytes, submit); | ||
| 309 | |||
| 310 | return tx; | ||
| 311 | } | ||
| 312 | |||
| 313 | /** | ||
| 314 | * async_raid6_2data_recov - asynchronously calculate two missing data blocks | ||
| 315 | * @disks: number of disks in the RAID-6 array | ||
| 316 | * @bytes: block size | ||
| 317 | * @faila: first failed drive index | ||
| 318 | * @failb: second failed drive index | ||
| 319 | * @blocks: array of source pointers where the last two entries are p and q | ||
| 320 | * @submit: submission/completion modifiers | ||
| 321 | */ | ||
| 322 | struct dma_async_tx_descriptor * | ||
| 323 | async_raid6_2data_recov(int disks, size_t bytes, int faila, int failb, | ||
| 324 | struct page **blocks, struct async_submit_ctl *submit) | ||
| 325 | { | ||
| 326 | BUG_ON(faila == failb); | ||
| 327 | if (failb < faila) | ||
| 328 | swap(faila, failb); | ||
| 329 | |||
| 330 | pr_debug("%s: disks: %d len: %zu\n", __func__, disks, bytes); | ||
| 331 | |||
| 332 | /* we need to preserve the contents of 'blocks' for the async | ||
| 333 | * case, so punt to synchronous if a scribble buffer is not available | ||
| 334 | */ | ||
| 335 | if (!submit->scribble) { | ||
| 336 | void **ptrs = (void **) blocks; | ||
| 337 | int i; | ||
| 338 | |||
| 339 | async_tx_quiesce(&submit->depend_tx); | ||
| 340 | for (i = 0; i < disks; i++) | ||
| 341 | ptrs[i] = page_address(blocks[i]); | ||
| 342 | |||
| 343 | raid6_2data_recov(disks, bytes, faila, failb, ptrs); | ||
| 344 | |||
| 345 | async_tx_sync_epilog(submit); | ||
| 346 | |||
| 347 | return NULL; | ||
| 348 | } | ||
| 349 | |||
| 350 | switch (disks) { | ||
| 351 | case 4: | ||
| 352 | /* dma devices do not uniformly understand a zero source pq | ||
| 353 | * operation (in contrast to the synchronous case), so | ||
| 354 | * explicitly handle the 4 disk special case | ||
| 355 | */ | ||
| 356 | return __2data_recov_4(bytes, faila, failb, blocks, submit); | ||
| 357 | case 5: | ||
| 358 | /* dma devices do not uniformly understand a single | ||
| 359 | * source pq operation (in contrast to the synchronous | ||
| 360 | * case), so explicitly handle the 5 disk special case | ||
| 361 | */ | ||
| 362 | return __2data_recov_5(bytes, faila, failb, blocks, submit); | ||
| 363 | default: | ||
| 364 | return __2data_recov_n(disks, bytes, faila, failb, blocks, submit); | ||
| 365 | } | ||
| 366 | } | ||
| 367 | EXPORT_SYMBOL_GPL(async_raid6_2data_recov); | ||
| 368 | |||
| 369 | /** | ||
| 370 | * async_raid6_datap_recov - asynchronously calculate a data and the 'p' block | ||
| 371 | * @disks: number of disks in the RAID-6 array | ||
| 372 | * @bytes: block size | ||
| 373 | * @faila: failed drive index | ||
| 374 | * @blocks: array of source pointers where the last two entries are p and q | ||
| 375 | * @submit: submission/completion modifiers | ||
| 376 | */ | ||
| 377 | struct dma_async_tx_descriptor * | ||
| 378 | async_raid6_datap_recov(int disks, size_t bytes, int faila, | ||
| 379 | struct page **blocks, struct async_submit_ctl *submit) | ||
| 380 | { | ||
| 381 | struct dma_async_tx_descriptor *tx = NULL; | ||
| 382 | struct page *p, *q, *dq; | ||
| 383 | u8 coef; | ||
| 384 | enum async_tx_flags flags = submit->flags; | ||
| 385 | dma_async_tx_callback cb_fn = submit->cb_fn; | ||
| 386 | void *cb_param = submit->cb_param; | ||
| 387 | void *scribble = submit->scribble; | ||
| 388 | struct page *srcs[2]; | ||
| 389 | |||
| 390 | pr_debug("%s: disks: %d len: %zu\n", __func__, disks, bytes); | ||
| 391 | |||
| 392 | /* we need to preserve the contents of 'blocks' for the async | ||
| 393 | * case, so punt to synchronous if a scribble buffer is not available | ||
| 394 | */ | ||
| 395 | if (!scribble) { | ||
| 396 | void **ptrs = (void **) blocks; | ||
| 397 | int i; | ||
| 398 | |||
| 399 | async_tx_quiesce(&submit->depend_tx); | ||
| 400 | for (i = 0; i < disks; i++) | ||
| 401 | ptrs[i] = page_address(blocks[i]); | ||
| 402 | |||
| 403 | raid6_datap_recov(disks, bytes, faila, ptrs); | ||
| 404 | |||
| 405 | async_tx_sync_epilog(submit); | ||
| 406 | |||
| 407 | return NULL; | ||
| 408 | } | ||
| 409 | |||
| 410 | p = blocks[disks-2]; | ||
| 411 | q = blocks[disks-1]; | ||
| 412 | |||
| 413 | /* Compute syndrome with zero for the missing data page | ||
| 414 | * Use the dead data page as temporary storage for delta q | ||
| 415 | */ | ||
| 416 | dq = blocks[faila]; | ||
| 417 | blocks[faila] = (void *)raid6_empty_zero_page; | ||
| 418 | blocks[disks-1] = dq; | ||
| 419 | |||
| 420 | /* in the 4 disk case we only need to perform a single source | ||
| 421 | * multiplication | ||
| 422 | */ | ||
| 423 | if (disks == 4) { | ||
| 424 | int good = faila == 0 ? 1 : 0; | ||
| 425 | struct page *g = blocks[good]; | ||
| 426 | |||
| 427 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, | ||
| 428 | scribble); | ||
| 429 | tx = async_memcpy(p, g, 0, 0, bytes, submit); | ||
| 430 | |||
| 431 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, | ||
| 432 | scribble); | ||
| 433 | tx = async_mult(dq, g, raid6_gfexp[good], bytes, submit); | ||
| 434 | } else { | ||
| 435 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, | ||
| 436 | scribble); | ||
| 437 | tx = async_gen_syndrome(blocks, 0, disks, bytes, submit); | ||
| 438 | } | ||
| 439 | |||
| 440 | /* Restore pointer table */ | ||
| 441 | blocks[faila] = dq; | ||
| 442 | blocks[disks-1] = q; | ||
| 443 | |||
| 444 | /* calculate g^{-faila} */ | ||
| 445 | coef = raid6_gfinv[raid6_gfexp[faila]]; | ||
| 446 | |||
| 447 | srcs[0] = dq; | ||
| 448 | srcs[1] = q; | ||
| 449 | init_async_submit(submit, ASYNC_TX_FENCE|ASYNC_TX_XOR_DROP_DST, tx, | ||
| 450 | NULL, NULL, scribble); | ||
| 451 | tx = async_xor(dq, srcs, 0, 2, bytes, submit); | ||
| 452 | |||
| 453 | init_async_submit(submit, ASYNC_TX_FENCE, tx, NULL, NULL, scribble); | ||
| 454 | tx = async_mult(dq, dq, coef, bytes, submit); | ||
| 455 | |||
| 456 | srcs[0] = p; | ||
| 457 | srcs[1] = dq; | ||
| 458 | init_async_submit(submit, flags | ASYNC_TX_XOR_DROP_DST, tx, cb_fn, | ||
| 459 | cb_param, scribble); | ||
| 460 | tx = async_xor(p, srcs, 0, 2, bytes, submit); | ||
| 461 | |||
| 462 | return tx; | ||
| 463 | } | ||
| 464 | EXPORT_SYMBOL_GPL(async_raid6_datap_recov); | ||
| 465 | |||
| 466 | MODULE_AUTHOR("Dan Williams <dan.j.williams@intel.com>"); | ||
| 467 | MODULE_DESCRIPTION("asynchronous RAID-6 recovery api"); | ||
| 468 | MODULE_LICENSE("GPL"); | ||
diff --git a/crypto/async_tx/async_tx.c b/crypto/async_tx/async_tx.c index 06eb6cc09fef..f9cdf04fe7c0 100644 --- a/crypto/async_tx/async_tx.c +++ b/crypto/async_tx/async_tx.c | |||
| @@ -42,16 +42,21 @@ static void __exit async_tx_exit(void) | |||
| 42 | async_dmaengine_put(); | 42 | async_dmaengine_put(); |
| 43 | } | 43 | } |
| 44 | 44 | ||
| 45 | module_init(async_tx_init); | ||
| 46 | module_exit(async_tx_exit); | ||
| 47 | |||
| 45 | /** | 48 | /** |
| 46 | * __async_tx_find_channel - find a channel to carry out the operation or let | 49 | * __async_tx_find_channel - find a channel to carry out the operation or let |
| 47 | * the transaction execute synchronously | 50 | * the transaction execute synchronously |
| 48 | * @depend_tx: transaction dependency | 51 | * @submit: transaction dependency and submission modifiers |
| 49 | * @tx_type: transaction type | 52 | * @tx_type: transaction type |
| 50 | */ | 53 | */ |
| 51 | struct dma_chan * | 54 | struct dma_chan * |
| 52 | __async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, | 55 | __async_tx_find_channel(struct async_submit_ctl *submit, |
| 53 | enum dma_transaction_type tx_type) | 56 | enum dma_transaction_type tx_type) |
| 54 | { | 57 | { |
| 58 | struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; | ||
| 59 | |||
| 55 | /* see if we can keep the chain on one channel */ | 60 | /* see if we can keep the chain on one channel */ |
| 56 | if (depend_tx && | 61 | if (depend_tx && |
| 57 | dma_has_cap(tx_type, depend_tx->chan->device->cap_mask)) | 62 | dma_has_cap(tx_type, depend_tx->chan->device->cap_mask)) |
| @@ -59,17 +64,6 @@ __async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, | |||
| 59 | return async_dma_find_channel(tx_type); | 64 | return async_dma_find_channel(tx_type); |
| 60 | } | 65 | } |
| 61 | EXPORT_SYMBOL_GPL(__async_tx_find_channel); | 66 | EXPORT_SYMBOL_GPL(__async_tx_find_channel); |
| 62 | #else | ||
| 63 | static int __init async_tx_init(void) | ||
| 64 | { | ||
| 65 | printk(KERN_INFO "async_tx: api initialized (sync-only)\n"); | ||
| 66 | return 0; | ||
| 67 | } | ||
| 68 | |||
| 69 | static void __exit async_tx_exit(void) | ||
| 70 | { | ||
| 71 | do { } while (0); | ||
| 72 | } | ||
| 73 | #endif | 67 | #endif |
| 74 | 68 | ||
| 75 | 69 | ||
| @@ -83,10 +77,14 @@ static void | |||
| 83 | async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, | 77 | async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, |
| 84 | struct dma_async_tx_descriptor *tx) | 78 | struct dma_async_tx_descriptor *tx) |
| 85 | { | 79 | { |
| 86 | struct dma_chan *chan; | 80 | struct dma_chan *chan = depend_tx->chan; |
| 87 | struct dma_device *device; | 81 | struct dma_device *device = chan->device; |
| 88 | struct dma_async_tx_descriptor *intr_tx = (void *) ~0; | 82 | struct dma_async_tx_descriptor *intr_tx = (void *) ~0; |
| 89 | 83 | ||
| 84 | #ifdef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH | ||
| 85 | BUG(); | ||
| 86 | #endif | ||
| 87 | |||
| 90 | /* first check to see if we can still append to depend_tx */ | 88 | /* first check to see if we can still append to depend_tx */ |
| 91 | spin_lock_bh(&depend_tx->lock); | 89 | spin_lock_bh(&depend_tx->lock); |
| 92 | if (depend_tx->parent && depend_tx->chan == tx->chan) { | 90 | if (depend_tx->parent && depend_tx->chan == tx->chan) { |
| @@ -96,11 +94,11 @@ async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, | |||
| 96 | } | 94 | } |
| 97 | spin_unlock_bh(&depend_tx->lock); | 95 | spin_unlock_bh(&depend_tx->lock); |
| 98 | 96 | ||
| 99 | if (!intr_tx) | 97 | /* attached dependency, flush the parent channel */ |
| 98 | if (!intr_tx) { | ||
| 99 | device->device_issue_pending(chan); | ||
| 100 | return; | 100 | return; |
| 101 | 101 | } | |
| 102 | chan = depend_tx->chan; | ||
| 103 | device = chan->device; | ||
| 104 | 102 | ||
| 105 | /* see if we can schedule an interrupt | 103 | /* see if we can schedule an interrupt |
| 106 | * otherwise poll for completion | 104 | * otherwise poll for completion |
| @@ -134,6 +132,7 @@ async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, | |||
| 134 | intr_tx->tx_submit(intr_tx); | 132 | intr_tx->tx_submit(intr_tx); |
| 135 | async_tx_ack(intr_tx); | 133 | async_tx_ack(intr_tx); |
| 136 | } | 134 | } |
| 135 | device->device_issue_pending(chan); | ||
| 137 | } else { | 136 | } else { |
| 138 | if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR) | 137 | if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR) |
| 139 | panic("%s: DMA_ERROR waiting for depend_tx\n", | 138 | panic("%s: DMA_ERROR waiting for depend_tx\n", |
| @@ -144,13 +143,14 @@ async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, | |||
| 144 | 143 | ||
| 145 | 144 | ||
| 146 | /** | 145 | /** |
| 147 | * submit_disposition - while holding depend_tx->lock we must avoid submitting | 146 | * submit_disposition - flags for routing an incoming operation |
| 148 | * new operations to prevent a circular locking dependency with | ||
| 149 | * drivers that already hold a channel lock when calling | ||
| 150 | * async_tx_run_dependencies. | ||
| 151 | * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock | 147 | * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock |
| 152 | * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch | 148 | * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch |
| 153 | * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly | 149 | * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly |
| 150 | * | ||
| 151 | * while holding depend_tx->lock we must avoid submitting new operations | ||
| 152 | * to prevent a circular locking dependency with drivers that already | ||
| 153 | * hold a channel lock when calling async_tx_run_dependencies. | ||
| 154 | */ | 154 | */ |
| 155 | enum submit_disposition { | 155 | enum submit_disposition { |
| 156 | ASYNC_TX_SUBMITTED, | 156 | ASYNC_TX_SUBMITTED, |
| @@ -160,11 +160,12 @@ enum submit_disposition { | |||
| 160 | 160 | ||
| 161 | void | 161 | void |
| 162 | async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, | 162 | async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, |
| 163 | enum async_tx_flags flags, struct dma_async_tx_descriptor *depend_tx, | 163 | struct async_submit_ctl *submit) |
| 164 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 165 | { | 164 | { |
| 166 | tx->callback = cb_fn; | 165 | struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; |
| 167 | tx->callback_param = cb_param; | 166 | |
| 167 | tx->callback = submit->cb_fn; | ||
| 168 | tx->callback_param = submit->cb_param; | ||
| 168 | 169 | ||
| 169 | if (depend_tx) { | 170 | if (depend_tx) { |
| 170 | enum submit_disposition s; | 171 | enum submit_disposition s; |
| @@ -220,30 +221,29 @@ async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, | |||
| 220 | tx->tx_submit(tx); | 221 | tx->tx_submit(tx); |
| 221 | } | 222 | } |
| 222 | 223 | ||
| 223 | if (flags & ASYNC_TX_ACK) | 224 | if (submit->flags & ASYNC_TX_ACK) |
| 224 | async_tx_ack(tx); | 225 | async_tx_ack(tx); |
| 225 | 226 | ||
| 226 | if (depend_tx && (flags & ASYNC_TX_DEP_ACK)) | 227 | if (depend_tx) |
| 227 | async_tx_ack(depend_tx); | 228 | async_tx_ack(depend_tx); |
| 228 | } | 229 | } |
| 229 | EXPORT_SYMBOL_GPL(async_tx_submit); | 230 | EXPORT_SYMBOL_GPL(async_tx_submit); |
| 230 | 231 | ||
| 231 | /** | 232 | /** |
| 232 | * async_trigger_callback - schedules the callback function to be run after | 233 | * async_trigger_callback - schedules the callback function to be run |
| 233 | * any dependent operations have been completed. | 234 | * @submit: submission and completion parameters |
| 234 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK | 235 | * |
| 235 | * @depend_tx: 'callback' requires the completion of this transaction | 236 | * honored flags: ASYNC_TX_ACK |
| 236 | * @cb_fn: function to call after depend_tx completes | 237 | * |
| 237 | * @cb_param: parameter to pass to the callback routine | 238 | * The callback is run after any dependent operations have completed. |
| 238 | */ | 239 | */ |
| 239 | struct dma_async_tx_descriptor * | 240 | struct dma_async_tx_descriptor * |
| 240 | async_trigger_callback(enum async_tx_flags flags, | 241 | async_trigger_callback(struct async_submit_ctl *submit) |
| 241 | struct dma_async_tx_descriptor *depend_tx, | ||
| 242 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 243 | { | 242 | { |
| 244 | struct dma_chan *chan; | 243 | struct dma_chan *chan; |
| 245 | struct dma_device *device; | 244 | struct dma_device *device; |
| 246 | struct dma_async_tx_descriptor *tx; | 245 | struct dma_async_tx_descriptor *tx; |
| 246 | struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; | ||
| 247 | 247 | ||
| 248 | if (depend_tx) { | 248 | if (depend_tx) { |
| 249 | chan = depend_tx->chan; | 249 | chan = depend_tx->chan; |
| @@ -262,14 +262,14 @@ async_trigger_callback(enum async_tx_flags flags, | |||
| 262 | if (tx) { | 262 | if (tx) { |
| 263 | pr_debug("%s: (async)\n", __func__); | 263 | pr_debug("%s: (async)\n", __func__); |
| 264 | 264 | ||
| 265 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); | 265 | async_tx_submit(chan, tx, submit); |
| 266 | } else { | 266 | } else { |
| 267 | pr_debug("%s: (sync)\n", __func__); | 267 | pr_debug("%s: (sync)\n", __func__); |
| 268 | 268 | ||
| 269 | /* wait for any prerequisite operations */ | 269 | /* wait for any prerequisite operations */ |
| 270 | async_tx_quiesce(&depend_tx); | 270 | async_tx_quiesce(&submit->depend_tx); |
| 271 | 271 | ||
| 272 | async_tx_sync_epilog(cb_fn, cb_param); | 272 | async_tx_sync_epilog(submit); |
| 273 | } | 273 | } |
| 274 | 274 | ||
| 275 | return tx; | 275 | return tx; |
| @@ -295,9 +295,6 @@ void async_tx_quiesce(struct dma_async_tx_descriptor **tx) | |||
| 295 | } | 295 | } |
| 296 | EXPORT_SYMBOL_GPL(async_tx_quiesce); | 296 | EXPORT_SYMBOL_GPL(async_tx_quiesce); |
| 297 | 297 | ||
| 298 | module_init(async_tx_init); | ||
| 299 | module_exit(async_tx_exit); | ||
| 300 | |||
| 301 | MODULE_AUTHOR("Intel Corporation"); | 298 | MODULE_AUTHOR("Intel Corporation"); |
| 302 | MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API"); | 299 | MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API"); |
| 303 | MODULE_LICENSE("GPL"); | 300 | MODULE_LICENSE("GPL"); |
diff --git a/crypto/async_tx/async_xor.c b/crypto/async_tx/async_xor.c index 90dd3f8bd283..b459a9034aac 100644 --- a/crypto/async_tx/async_xor.c +++ b/crypto/async_tx/async_xor.c | |||
| @@ -33,19 +33,16 @@ | |||
| 33 | /* do_async_xor - dma map the pages and perform the xor with an engine */ | 33 | /* do_async_xor - dma map the pages and perform the xor with an engine */ |
| 34 | static __async_inline struct dma_async_tx_descriptor * | 34 | static __async_inline struct dma_async_tx_descriptor * |
| 35 | do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, | 35 | do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, |
| 36 | unsigned int offset, int src_cnt, size_t len, | 36 | unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src, |
| 37 | enum async_tx_flags flags, | 37 | struct async_submit_ctl *submit) |
| 38 | struct dma_async_tx_descriptor *depend_tx, | ||
| 39 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 40 | { | 38 | { |
| 41 | struct dma_device *dma = chan->device; | 39 | struct dma_device *dma = chan->device; |
| 42 | dma_addr_t *dma_src = (dma_addr_t *) src_list; | ||
| 43 | struct dma_async_tx_descriptor *tx = NULL; | 40 | struct dma_async_tx_descriptor *tx = NULL; |
| 44 | int src_off = 0; | 41 | int src_off = 0; |
| 45 | int i; | 42 | int i; |
| 46 | dma_async_tx_callback _cb_fn; | 43 | dma_async_tx_callback cb_fn_orig = submit->cb_fn; |
| 47 | void *_cb_param; | 44 | void *cb_param_orig = submit->cb_param; |
| 48 | enum async_tx_flags async_flags; | 45 | enum async_tx_flags flags_orig = submit->flags; |
| 49 | enum dma_ctrl_flags dma_flags; | 46 | enum dma_ctrl_flags dma_flags; |
| 50 | int xor_src_cnt; | 47 | int xor_src_cnt; |
| 51 | dma_addr_t dma_dest; | 48 | dma_addr_t dma_dest; |
| @@ -63,25 +60,27 @@ do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, | |||
| 63 | } | 60 | } |
| 64 | 61 | ||
| 65 | while (src_cnt) { | 62 | while (src_cnt) { |
| 66 | async_flags = flags; | 63 | submit->flags = flags_orig; |
| 67 | dma_flags = 0; | 64 | dma_flags = 0; |
| 68 | xor_src_cnt = min(src_cnt, dma->max_xor); | 65 | xor_src_cnt = min(src_cnt, (int)dma->max_xor); |
| 69 | /* if we are submitting additional xors, leave the chain open, | 66 | /* if we are submitting additional xors, leave the chain open, |
| 70 | * clear the callback parameters, and leave the destination | 67 | * clear the callback parameters, and leave the destination |
| 71 | * buffer mapped | 68 | * buffer mapped |
| 72 | */ | 69 | */ |
| 73 | if (src_cnt > xor_src_cnt) { | 70 | if (src_cnt > xor_src_cnt) { |
| 74 | async_flags &= ~ASYNC_TX_ACK; | 71 | submit->flags &= ~ASYNC_TX_ACK; |
| 72 | submit->flags |= ASYNC_TX_FENCE; | ||
| 75 | dma_flags = DMA_COMPL_SKIP_DEST_UNMAP; | 73 | dma_flags = DMA_COMPL_SKIP_DEST_UNMAP; |
| 76 | _cb_fn = NULL; | 74 | submit->cb_fn = NULL; |
| 77 | _cb_param = NULL; | 75 | submit->cb_param = NULL; |
| 78 | } else { | 76 | } else { |
| 79 | _cb_fn = cb_fn; | 77 | submit->cb_fn = cb_fn_orig; |
| 80 | _cb_param = cb_param; | 78 | submit->cb_param = cb_param_orig; |
| 81 | } | 79 | } |
| 82 | if (_cb_fn) | 80 | if (submit->cb_fn) |
| 83 | dma_flags |= DMA_PREP_INTERRUPT; | 81 | dma_flags |= DMA_PREP_INTERRUPT; |
| 84 | 82 | if (submit->flags & ASYNC_TX_FENCE) | |
| 83 | dma_flags |= DMA_PREP_FENCE; | ||
| 85 | /* Since we have clobbered the src_list we are committed | 84 | /* Since we have clobbered the src_list we are committed |
| 86 | * to doing this asynchronously. Drivers force forward progress | 85 | * to doing this asynchronously. Drivers force forward progress |
| 87 | * in case they can not provide a descriptor | 86 | * in case they can not provide a descriptor |
| @@ -90,7 +89,7 @@ do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, | |||
| 90 | xor_src_cnt, len, dma_flags); | 89 | xor_src_cnt, len, dma_flags); |
| 91 | 90 | ||
| 92 | if (unlikely(!tx)) | 91 | if (unlikely(!tx)) |
| 93 | async_tx_quiesce(&depend_tx); | 92 | async_tx_quiesce(&submit->depend_tx); |
| 94 | 93 | ||
| 95 | /* spin wait for the preceeding transactions to complete */ | 94 | /* spin wait for the preceeding transactions to complete */ |
| 96 | while (unlikely(!tx)) { | 95 | while (unlikely(!tx)) { |
| @@ -101,11 +100,8 @@ do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, | |||
| 101 | dma_flags); | 100 | dma_flags); |
| 102 | } | 101 | } |
| 103 | 102 | ||
| 104 | async_tx_submit(chan, tx, async_flags, depend_tx, _cb_fn, | 103 | async_tx_submit(chan, tx, submit); |
| 105 | _cb_param); | 104 | submit->depend_tx = tx; |
| 106 | |||
| 107 | depend_tx = tx; | ||
| 108 | flags |= ASYNC_TX_DEP_ACK; | ||
| 109 | 105 | ||
| 110 | if (src_cnt > xor_src_cnt) { | 106 | if (src_cnt > xor_src_cnt) { |
| 111 | /* drop completed sources */ | 107 | /* drop completed sources */ |
| @@ -124,23 +120,27 @@ do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list, | |||
| 124 | 120 | ||
| 125 | static void | 121 | static void |
| 126 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | 122 | do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, |
| 127 | int src_cnt, size_t len, enum async_tx_flags flags, | 123 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
| 128 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 129 | { | 124 | { |
| 130 | int i; | 125 | int i; |
| 131 | int xor_src_cnt; | 126 | int xor_src_cnt; |
| 132 | int src_off = 0; | 127 | int src_off = 0; |
| 133 | void *dest_buf; | 128 | void *dest_buf; |
| 134 | void **srcs = (void **) src_list; | 129 | void **srcs; |
| 130 | |||
| 131 | if (submit->scribble) | ||
| 132 | srcs = submit->scribble; | ||
| 133 | else | ||
| 134 | srcs = (void **) src_list; | ||
| 135 | 135 | ||
| 136 | /* reuse the 'src_list' array to convert to buffer pointers */ | 136 | /* convert to buffer pointers */ |
| 137 | for (i = 0; i < src_cnt; i++) | 137 | for (i = 0; i < src_cnt; i++) |
| 138 | srcs[i] = page_address(src_list[i]) + offset; | 138 | srcs[i] = page_address(src_list[i]) + offset; |
| 139 | 139 | ||
| 140 | /* set destination address */ | 140 | /* set destination address */ |
| 141 | dest_buf = page_address(dest) + offset; | 141 | dest_buf = page_address(dest) + offset; |
| 142 | 142 | ||
| 143 | if (flags & ASYNC_TX_XOR_ZERO_DST) | 143 | if (submit->flags & ASYNC_TX_XOR_ZERO_DST) |
| 144 | memset(dest_buf, 0, len); | 144 | memset(dest_buf, 0, len); |
| 145 | 145 | ||
| 146 | while (src_cnt > 0) { | 146 | while (src_cnt > 0) { |
| @@ -153,61 +153,70 @@ do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset, | |||
| 153 | src_off += xor_src_cnt; | 153 | src_off += xor_src_cnt; |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | async_tx_sync_epilog(cb_fn, cb_param); | 156 | async_tx_sync_epilog(submit); |
| 157 | } | 157 | } |
| 158 | 158 | ||
| 159 | /** | 159 | /** |
| 160 | * async_xor - attempt to xor a set of blocks with a dma engine. | 160 | * async_xor - attempt to xor a set of blocks with a dma engine. |
| 161 | * xor_blocks always uses the dest as a source so the ASYNC_TX_XOR_ZERO_DST | ||
| 162 | * flag must be set to not include dest data in the calculation. The | ||
| 163 | * assumption with dma eninges is that they only use the destination | ||
| 164 | * buffer as a source when it is explicity specified in the source list. | ||
| 165 | * @dest: destination page | 161 | * @dest: destination page |
| 166 | * @src_list: array of source pages (if the dest is also a source it must be | 162 | * @src_list: array of source pages |
| 167 | * at index zero). The contents of this array may be overwritten. | 163 | * @offset: common src/dst offset to start transaction |
| 168 | * @offset: offset in pages to start transaction | ||
| 169 | * @src_cnt: number of source pages | 164 | * @src_cnt: number of source pages |
| 170 | * @len: length in bytes | 165 | * @len: length in bytes |
| 171 | * @flags: ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DEST, | 166 | * @submit: submission / completion modifiers |
| 172 | * ASYNC_TX_ACK, ASYNC_TX_DEP_ACK | 167 | * |
| 173 | * @depend_tx: xor depends on the result of this transaction. | 168 | * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST |
| 174 | * @cb_fn: function to call when the xor completes | 169 | * |
| 175 | * @cb_param: parameter to pass to the callback routine | 170 | * xor_blocks always uses the dest as a source so the |
| 171 | * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in | ||
| 172 | * the calculation. The assumption with dma eninges is that they only | ||
| 173 | * use the destination buffer as a source when it is explicity specified | ||
| 174 | * in the source list. | ||
| 175 | * | ||
| 176 | * src_list note: if the dest is also a source it must be at index zero. | ||
| 177 | * The contents of this array will be overwritten if a scribble region | ||
| 178 | * is not specified. | ||
| 176 | */ | 179 | */ |
| 177 | struct dma_async_tx_descriptor * | 180 | struct dma_async_tx_descriptor * |
| 178 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, | 181 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, |
| 179 | int src_cnt, size_t len, enum async_tx_flags flags, | 182 | int src_cnt, size_t len, struct async_submit_ctl *submit) |
| 180 | struct dma_async_tx_descriptor *depend_tx, | ||
| 181 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 182 | { | 183 | { |
| 183 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_XOR, | 184 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR, |
| 184 | &dest, 1, src_list, | 185 | &dest, 1, src_list, |
| 185 | src_cnt, len); | 186 | src_cnt, len); |
| 187 | dma_addr_t *dma_src = NULL; | ||
| 188 | |||
| 186 | BUG_ON(src_cnt <= 1); | 189 | BUG_ON(src_cnt <= 1); |
| 187 | 190 | ||
| 188 | if (chan) { | 191 | if (submit->scribble) |
| 192 | dma_src = submit->scribble; | ||
| 193 | else if (sizeof(dma_addr_t) <= sizeof(struct page *)) | ||
| 194 | dma_src = (dma_addr_t *) src_list; | ||
| 195 | |||
| 196 | if (dma_src && chan && is_dma_xor_aligned(chan->device, offset, 0, len)) { | ||
| 189 | /* run the xor asynchronously */ | 197 | /* run the xor asynchronously */ |
| 190 | pr_debug("%s (async): len: %zu\n", __func__, len); | 198 | pr_debug("%s (async): len: %zu\n", __func__, len); |
| 191 | 199 | ||
| 192 | return do_async_xor(chan, dest, src_list, offset, src_cnt, len, | 200 | return do_async_xor(chan, dest, src_list, offset, src_cnt, len, |
| 193 | flags, depend_tx, cb_fn, cb_param); | 201 | dma_src, submit); |
| 194 | } else { | 202 | } else { |
| 195 | /* run the xor synchronously */ | 203 | /* run the xor synchronously */ |
| 196 | pr_debug("%s (sync): len: %zu\n", __func__, len); | 204 | pr_debug("%s (sync): len: %zu\n", __func__, len); |
| 205 | WARN_ONCE(chan, "%s: no space for dma address conversion\n", | ||
| 206 | __func__); | ||
| 197 | 207 | ||
| 198 | /* in the sync case the dest is an implied source | 208 | /* in the sync case the dest is an implied source |
| 199 | * (assumes the dest is the first source) | 209 | * (assumes the dest is the first source) |
| 200 | */ | 210 | */ |
| 201 | if (flags & ASYNC_TX_XOR_DROP_DST) { | 211 | if (submit->flags & ASYNC_TX_XOR_DROP_DST) { |
| 202 | src_cnt--; | 212 | src_cnt--; |
| 203 | src_list++; | 213 | src_list++; |
| 204 | } | 214 | } |
| 205 | 215 | ||
| 206 | /* wait for any prerequisite operations */ | 216 | /* wait for any prerequisite operations */ |
| 207 | async_tx_quiesce(&depend_tx); | 217 | async_tx_quiesce(&submit->depend_tx); |
| 208 | 218 | ||
| 209 | do_sync_xor(dest, src_list, offset, src_cnt, len, | 219 | do_sync_xor(dest, src_list, offset, src_cnt, len, submit); |
| 210 | flags, cb_fn, cb_param); | ||
| 211 | 220 | ||
| 212 | return NULL; | 221 | return NULL; |
| 213 | } | 222 | } |
| @@ -222,104 +231,94 @@ static int page_is_zero(struct page *p, unsigned int offset, size_t len) | |||
| 222 | } | 231 | } |
| 223 | 232 | ||
| 224 | /** | 233 | /** |
| 225 | * async_xor_zero_sum - attempt a xor parity check with a dma engine. | 234 | * async_xor_val - attempt a xor parity check with a dma engine. |
| 226 | * @dest: destination page used if the xor is performed synchronously | 235 | * @dest: destination page used if the xor is performed synchronously |
| 227 | * @src_list: array of source pages. The dest page must be listed as a source | 236 | * @src_list: array of source pages |
| 228 | * at index zero. The contents of this array may be overwritten. | ||
| 229 | * @offset: offset in pages to start transaction | 237 | * @offset: offset in pages to start transaction |
| 230 | * @src_cnt: number of source pages | 238 | * @src_cnt: number of source pages |
| 231 | * @len: length in bytes | 239 | * @len: length in bytes |
| 232 | * @result: 0 if sum == 0 else non-zero | 240 | * @result: 0 if sum == 0 else non-zero |
| 233 | * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK | 241 | * @submit: submission / completion modifiers |
| 234 | * @depend_tx: xor depends on the result of this transaction. | 242 | * |
| 235 | * @cb_fn: function to call when the xor completes | 243 | * honored flags: ASYNC_TX_ACK |
| 236 | * @cb_param: parameter to pass to the callback routine | 244 | * |
| 245 | * src_list note: if the dest is also a source it must be at index zero. | ||
| 246 | * The contents of this array will be overwritten if a scribble region | ||
| 247 | * is not specified. | ||
| 237 | */ | 248 | */ |
| 238 | struct dma_async_tx_descriptor * | 249 | struct dma_async_tx_descriptor * |
| 239 | async_xor_zero_sum(struct page *dest, struct page **src_list, | 250 | async_xor_val(struct page *dest, struct page **src_list, unsigned int offset, |
| 240 | unsigned int offset, int src_cnt, size_t len, | 251 | int src_cnt, size_t len, enum sum_check_flags *result, |
| 241 | u32 *result, enum async_tx_flags flags, | 252 | struct async_submit_ctl *submit) |
| 242 | struct dma_async_tx_descriptor *depend_tx, | ||
| 243 | dma_async_tx_callback cb_fn, void *cb_param) | ||
| 244 | { | 253 | { |
| 245 | struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_ZERO_SUM, | 254 | struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR_VAL, |
| 246 | &dest, 1, src_list, | 255 | &dest, 1, src_list, |
| 247 | src_cnt, len); | 256 | src_cnt, len); |
| 248 | struct dma_device *device = chan ? chan->device : NULL; | 257 | struct dma_device *device = chan ? chan->device : NULL; |
| 249 | struct dma_async_tx_descriptor *tx = NULL; | 258 | struct dma_async_tx_descriptor *tx = NULL; |
| 259 | dma_addr_t *dma_src = NULL; | ||
| 250 | 260 | ||
| 251 | BUG_ON(src_cnt <= 1); | 261 | BUG_ON(src_cnt <= 1); |
| 252 | 262 | ||
| 253 | if (device && src_cnt <= device->max_xor) { | 263 | if (submit->scribble) |
| 254 | dma_addr_t *dma_src = (dma_addr_t *) src_list; | 264 | dma_src = submit->scribble; |
| 255 | unsigned long dma_prep_flags = cb_fn ? DMA_PREP_INTERRUPT : 0; | 265 | else if (sizeof(dma_addr_t) <= sizeof(struct page *)) |
| 266 | dma_src = (dma_addr_t *) src_list; | ||
| 267 | |||
| 268 | if (dma_src && device && src_cnt <= device->max_xor && | ||
| 269 | is_dma_xor_aligned(device, offset, 0, len)) { | ||
| 270 | unsigned long dma_prep_flags = 0; | ||
| 256 | int i; | 271 | int i; |
| 257 | 272 | ||
| 258 | pr_debug("%s: (async) len: %zu\n", __func__, len); | 273 | pr_debug("%s: (async) len: %zu\n", __func__, len); |
| 259 | 274 | ||
| 275 | if (submit->cb_fn) | ||
| 276 | dma_prep_flags |= DMA_PREP_INTERRUPT; | ||
| 277 | if (submit->flags & ASYNC_TX_FENCE) | ||
| 278 | dma_prep_flags |= DMA_PREP_FENCE; | ||
| 260 | for (i = 0; i < src_cnt; i++) | 279 | for (i = 0; i < src_cnt; i++) |
| 261 | dma_src[i] = dma_map_page(device->dev, src_list[i], | 280 | dma_src[i] = dma_map_page(device->dev, src_list[i], |
| 262 | offset, len, DMA_TO_DEVICE); | 281 | offset, len, DMA_TO_DEVICE); |
| 263 | 282 | ||
| 264 | tx = device->device_prep_dma_zero_sum(chan, dma_src, src_cnt, | 283 | tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt, |
| 265 | len, result, | 284 | len, result, |
| 266 | dma_prep_flags); | 285 | dma_prep_flags); |
| 267 | if (unlikely(!tx)) { | 286 | if (unlikely(!tx)) { |
| 268 | async_tx_quiesce(&depend_tx); | 287 | async_tx_quiesce(&submit->depend_tx); |
| 269 | 288 | ||
| 270 | while (!tx) { | 289 | while (!tx) { |
| 271 | dma_async_issue_pending(chan); | 290 | dma_async_issue_pending(chan); |
| 272 | tx = device->device_prep_dma_zero_sum(chan, | 291 | tx = device->device_prep_dma_xor_val(chan, |
| 273 | dma_src, src_cnt, len, result, | 292 | dma_src, src_cnt, len, result, |
| 274 | dma_prep_flags); | 293 | dma_prep_flags); |
| 275 | } | 294 | } |
| 276 | } | 295 | } |
| 277 | 296 | ||
| 278 | async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); | 297 | async_tx_submit(chan, tx, submit); |
| 279 | } else { | 298 | } else { |
| 280 | unsigned long xor_flags = flags; | 299 | enum async_tx_flags flags_orig = submit->flags; |
| 281 | 300 | ||
| 282 | pr_debug("%s: (sync) len: %zu\n", __func__, len); | 301 | pr_debug("%s: (sync) len: %zu\n", __func__, len); |
| 302 | WARN_ONCE(device && src_cnt <= device->max_xor, | ||
| 303 | "%s: no space for dma address conversion\n", | ||
| 304 | __func__); | ||
| 283 | 305 | ||
| 284 | xor_flags |= ASYNC_TX_XOR_DROP_DST; | 306 | submit->flags |= ASYNC_TX_XOR_DROP_DST; |
| 285 | xor_flags &= ~ASYNC_TX_ACK; | 307 | submit->flags &= ~ASYNC_TX_ACK; |
| 286 | 308 | ||
| 287 | tx = async_xor(dest, src_list, offset, src_cnt, len, xor_flags, | 309 | tx = async_xor(dest, src_list, offset, src_cnt, len, submit); |
| 288 | depend_tx, NULL, NULL); | ||
| 289 | 310 | ||
| 290 | async_tx_quiesce(&tx); | 311 | async_tx_quiesce(&tx); |
| 291 | 312 | ||
| 292 | *result = page_is_zero(dest, offset, len) ? 0 : 1; | 313 | *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P; |
| 293 | 314 | ||
| 294 | async_tx_sync_epilog(cb_fn, cb_param); | 315 | async_tx_sync_epilog(submit); |
| 316 | submit->flags = flags_orig; | ||
| 295 | } | 317 | } |
| 296 | 318 | ||
| 297 | return tx; | 319 | return tx; |
| 298 | } | 320 | } |
| 299 | EXPORT_SYMBOL_GPL(async_xor_zero_sum); | 321 | EXPORT_SYMBOL_GPL(async_xor_val); |
| 300 | |||
| 301 | static int __init async_xor_init(void) | ||
| 302 | { | ||
| 303 | #ifdef CONFIG_ASYNC_TX_DMA | ||
| 304 | /* To conserve stack space the input src_list (array of page pointers) | ||
| 305 | * is reused to hold the array of dma addresses passed to the driver. | ||
| 306 | * This conversion is only possible when dma_addr_t is less than the | ||
| 307 | * the size of a pointer. HIGHMEM64G is known to violate this | ||
| 308 | * assumption. | ||
| 309 | */ | ||
| 310 | BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *)); | ||
| 311 | #endif | ||
| 312 | |||
| 313 | return 0; | ||
| 314 | } | ||
| 315 | |||
| 316 | static void __exit async_xor_exit(void) | ||
| 317 | { | ||
| 318 | do { } while (0); | ||
| 319 | } | ||
| 320 | |||
| 321 | module_init(async_xor_init); | ||
| 322 | module_exit(async_xor_exit); | ||
| 323 | 322 | ||
| 324 | MODULE_AUTHOR("Intel Corporation"); | 323 | MODULE_AUTHOR("Intel Corporation"); |
| 325 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); | 324 | MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api"); |
diff --git a/crypto/async_tx/raid6test.c b/crypto/async_tx/raid6test.c new file mode 100644 index 000000000000..3ec27c7e62ea --- /dev/null +++ b/crypto/async_tx/raid6test.c | |||
| @@ -0,0 +1,240 @@ | |||
| 1 | /* | ||
| 2 | * asynchronous raid6 recovery self test | ||
| 3 | * Copyright (c) 2009, Intel Corporation. | ||
| 4 | * | ||
| 5 | * based on drivers/md/raid6test/test.c: | ||
| 6 | * Copyright 2002-2007 H. Peter Anvin | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms and conditions of the GNU General Public License, | ||
| 10 | * version 2, as published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 15 | * more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License along with | ||
| 18 | * this program; if not, write to the Free Software Foundation, Inc., | ||
| 19 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | #include <linux/async_tx.h> | ||
| 23 | #include <linux/random.h> | ||
| 24 | |||
| 25 | #undef pr | ||
| 26 | #define pr(fmt, args...) pr_info("raid6test: " fmt, ##args) | ||
| 27 | |||
| 28 | #define NDISKS 16 /* Including P and Q */ | ||
| 29 | |||
| 30 | static struct page *dataptrs[NDISKS]; | ||
| 31 | static addr_conv_t addr_conv[NDISKS]; | ||
| 32 | static struct page *data[NDISKS+3]; | ||
| 33 | static struct page *spare; | ||
| 34 | static struct page *recovi; | ||
| 35 | static struct page *recovj; | ||
| 36 | |||
| 37 | static void callback(void *param) | ||
| 38 | { | ||
| 39 | struct completion *cmp = param; | ||
| 40 | |||
| 41 | complete(cmp); | ||
| 42 | } | ||
| 43 | |||
| 44 | static void makedata(int disks) | ||
| 45 | { | ||
| 46 | int i, j; | ||
| 47 | |||
| 48 | for (i = 0; i < disks; i++) { | ||
| 49 | for (j = 0; j < PAGE_SIZE/sizeof(u32); j += sizeof(u32)) { | ||
| 50 | u32 *p = page_address(data[i]) + j; | ||
| 51 | |||
| 52 | *p = random32(); | ||
| 53 | } | ||
| 54 | |||
| 55 | dataptrs[i] = data[i]; | ||
| 56 | } | ||
| 57 | } | ||
| 58 | |||
| 59 | static char disk_type(int d, int disks) | ||
| 60 | { | ||
| 61 | if (d == disks - 2) | ||
| 62 | return 'P'; | ||
| 63 | else if (d == disks - 1) | ||
| 64 | return 'Q'; | ||
| 65 | else | ||
| 66 | return 'D'; | ||
| 67 | } | ||
| 68 | |||
| 69 | /* Recover two failed blocks. */ | ||
| 70 | static void raid6_dual_recov(int disks, size_t bytes, int faila, int failb, struct page **ptrs) | ||
| 71 | { | ||
| 72 | struct async_submit_ctl submit; | ||
| 73 | struct completion cmp; | ||
| 74 | struct dma_async_tx_descriptor *tx = NULL; | ||
| 75 | enum sum_check_flags result = ~0; | ||
| 76 | |||
| 77 | if (faila > failb) | ||
| 78 | swap(faila, failb); | ||
| 79 | |||
| 80 | if (failb == disks-1) { | ||
| 81 | if (faila == disks-2) { | ||
| 82 | /* P+Q failure. Just rebuild the syndrome. */ | ||
| 83 | init_async_submit(&submit, 0, NULL, NULL, NULL, addr_conv); | ||
| 84 | tx = async_gen_syndrome(ptrs, 0, disks, bytes, &submit); | ||
| 85 | } else { | ||
| 86 | struct page *blocks[disks]; | ||
| 87 | struct page *dest; | ||
| 88 | int count = 0; | ||
| 89 | int i; | ||
| 90 | |||
| 91 | /* data+Q failure. Reconstruct data from P, | ||
| 92 | * then rebuild syndrome | ||
| 93 | */ | ||
| 94 | for (i = disks; i-- ; ) { | ||
| 95 | if (i == faila || i == failb) | ||
| 96 | continue; | ||
| 97 | blocks[count++] = ptrs[i]; | ||
| 98 | } | ||
| 99 | dest = ptrs[faila]; | ||
| 100 | init_async_submit(&submit, ASYNC_TX_XOR_ZERO_DST, NULL, | ||
| 101 | NULL, NULL, addr_conv); | ||
| 102 | tx = async_xor(dest, blocks, 0, count, bytes, &submit); | ||
| 103 | |||
| 104 | init_async_submit(&submit, 0, tx, NULL, NULL, addr_conv); | ||
| 105 | tx = async_gen_syndrome(ptrs, 0, disks, bytes, &submit); | ||
| 106 | } | ||
| 107 | } else { | ||
| 108 | if (failb == disks-2) { | ||
| 109 | /* data+P failure. */ | ||
| 110 | init_async_submit(&submit, 0, NULL, NULL, NULL, addr_conv); | ||
| 111 | tx = async_raid6_datap_recov(disks, bytes, faila, ptrs, &submit); | ||
| 112 | } else { | ||
| 113 | /* data+data failure. */ | ||
| 114 | init_async_submit(&submit, 0, NULL, NULL, NULL, addr_conv); | ||
| 115 | tx = async_raid6_2data_recov(disks, bytes, faila, failb, ptrs, &submit); | ||
| 116 | } | ||
| 117 | } | ||
| 118 | init_completion(&cmp); | ||
| 119 | init_async_submit(&submit, ASYNC_TX_ACK, tx, callback, &cmp, addr_conv); | ||
| 120 | tx = async_syndrome_val(ptrs, 0, disks, bytes, &result, spare, &submit); | ||
| 121 | async_tx_issue_pending(tx); | ||
| 122 | |||
| 123 | if (wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000)) == 0) | ||
| 124 | pr("%s: timeout! (faila: %d failb: %d disks: %d)\n", | ||
| 125 | __func__, faila, failb, disks); | ||
| 126 | |||
| 127 | if (result != 0) | ||
| 128 | pr("%s: validation failure! faila: %d failb: %d sum_check_flags: %x\n", | ||
| 129 | __func__, faila, failb, result); | ||
| 130 | } | ||
| 131 | |||
| 132 | static int test_disks(int i, int j, int disks) | ||
| 133 | { | ||
| 134 | int erra, errb; | ||
| 135 | |||
| 136 | memset(page_address(recovi), 0xf0, PAGE_SIZE); | ||
| 137 | memset(page_address(recovj), 0xba, PAGE_SIZE); | ||
| 138 | |||
| 139 | dataptrs[i] = recovi; | ||
| 140 | dataptrs[j] = recovj; | ||
| 141 | |||
| 142 | raid6_dual_recov(disks, PAGE_SIZE, i, j, dataptrs); | ||
| 143 | |||
| 144 | erra = memcmp(page_address(data[i]), page_address(recovi), PAGE_SIZE); | ||
| 145 | errb = memcmp(page_address(data[j]), page_address(recovj), PAGE_SIZE); | ||
| 146 | |||
| 147 | pr("%s(%d, %d): faila=%3d(%c) failb=%3d(%c) %s\n", | ||
| 148 | __func__, i, j, i, disk_type(i, disks), j, disk_type(j, disks), | ||
| 149 | (!erra && !errb) ? "OK" : !erra ? "ERRB" : !errb ? "ERRA" : "ERRAB"); | ||
| 150 | |||
| 151 | dataptrs[i] = data[i]; | ||
| 152 | dataptrs[j] = data[j]; | ||
| 153 | |||
| 154 | return erra || errb; | ||
| 155 | } | ||
| 156 | |||
| 157 | static int test(int disks, int *tests) | ||
| 158 | { | ||
| 159 | struct dma_async_tx_descriptor *tx; | ||
| 160 | struct async_submit_ctl submit; | ||
| 161 | struct completion cmp; | ||
| 162 | int err = 0; | ||
| 163 | int i, j; | ||
| 164 | |||
| 165 | recovi = data[disks]; | ||
| 166 | recovj = data[disks+1]; | ||
| 167 | spare = data[disks+2]; | ||
| 168 | |||
| 169 | makedata(disks); | ||
| 170 | |||
| 171 | /* Nuke syndromes */ | ||
| 172 | memset(page_address(data[disks-2]), 0xee, PAGE_SIZE); | ||
| 173 | memset(page_address(data[disks-1]), 0xee, PAGE_SIZE); | ||
| 174 | |||
| 175 | /* Generate assumed good syndrome */ | ||
| 176 | init_completion(&cmp); | ||
| 177 | init_async_submit(&submit, ASYNC_TX_ACK, NULL, callback, &cmp, addr_conv); | ||
| 178 | tx = async_gen_syndrome(dataptrs, 0, disks, PAGE_SIZE, &submit); | ||
| 179 | async_tx_issue_pending(tx); | ||
| 180 | |||
| 181 | if (wait_for_completion_timeout(&cmp, msecs_to_jiffies(3000)) == 0) { | ||
| 182 | pr("error: initial gen_syndrome(%d) timed out\n", disks); | ||
| 183 | return 1; | ||
| 184 | } | ||
| 185 | |||
| 186 | pr("testing the %d-disk case...\n", disks); | ||
| 187 | for (i = 0; i < disks-1; i++) | ||
| 188 | for (j = i+1; j < disks; j++) { | ||
| 189 | (*tests)++; | ||
| 190 | err += test_disks(i, j, disks); | ||
| 191 | } | ||
| 192 | |||
| 193 | return err; | ||
| 194 | } | ||
| 195 | |||
| 196 | |||
| 197 | static int raid6_test(void) | ||
| 198 | { | ||
| 199 | int err = 0; | ||
| 200 | int tests = 0; | ||
| 201 | int i; | ||
| 202 | |||
| 203 | for (i = 0; i < NDISKS+3; i++) { | ||
| 204 | data[i] = alloc_page(GFP_KERNEL); | ||
| 205 | if (!data[i]) { | ||
| 206 | while (i--) | ||
| 207 | put_page(data[i]); | ||
| 208 | return -ENOMEM; | ||
| 209 | } | ||
| 210 | } | ||
| 211 | |||
| 212 | /* the 4-disk and 5-disk cases are special for the recovery code */ | ||
| 213 | if (NDISKS > 4) | ||
| 214 | err += test(4, &tests); | ||
| 215 | if (NDISKS > 5) | ||
| 216 | err += test(5, &tests); | ||
| 217 | err += test(NDISKS, &tests); | ||
| 218 | |||
| 219 | pr("\n"); | ||
| 220 | pr("complete (%d tests, %d failure%s)\n", | ||
| 221 | tests, err, err == 1 ? "" : "s"); | ||
| 222 | |||
| 223 | for (i = 0; i < NDISKS+3; i++) | ||
| 224 | put_page(data[i]); | ||
| 225 | |||
| 226 | return 0; | ||
| 227 | } | ||
| 228 | |||
| 229 | static void raid6_test_exit(void) | ||
| 230 | { | ||
| 231 | } | ||
| 232 | |||
| 233 | /* when compiled-in wait for drivers to load first (assumes dma drivers | ||
| 234 | * are also compliled-in) | ||
| 235 | */ | ||
| 236 | late_initcall(raid6_test); | ||
| 237 | module_exit(raid6_test_exit); | ||
| 238 | MODULE_AUTHOR("Dan Williams <dan.j.williams@intel.com>"); | ||
| 239 | MODULE_DESCRIPTION("asynchronous RAID-6 recovery self tests"); | ||
| 240 | MODULE_LICENSE("GPL"); | ||
