1 files changed, 66 insertions, 0 deletions

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 8d4e50428b68..68c363c341bf 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -804,6 +804,64 @@ static void init_amd_ln(struct cpuinfo_x86 *c)
         msr_set_bit(MSR_AMD64_DE_CFG, 31);
 }
 
+static bool rdrand_force;
+
+static int __init rdrand_cmdline(char *str)
+{
+        if (!str)
+                return -EINVAL;
+
+        if (!strcmp(str, "force"))
+                rdrand_force = true;
+        else
+                return -EINVAL;
+
+        return 0;
+}
+early_param("rdrand", rdrand_cmdline);
+
+static void clear_rdrand_cpuid_bit(struct cpuinfo_x86 *c)
+{
+        /*
+         * Saving of the MSR used to hide the RDRAND support during
+         * suspend/resume is done by arch/x86/power/cpu.c, which is
+         * dependent on CONFIG_PM_SLEEP.
+         */
+        if (!IS_ENABLED(CONFIG_PM_SLEEP))
+                return;
+
+        /*
+         * The nordrand option can clear X86_FEATURE_RDRAND, so check for
+         * RDRAND support using the CPUID function directly.
+         */
+        if (!(cpuid_ecx(1) & BIT(30)) || rdrand_force)
+                return;
+
+        msr_clear_bit(MSR_AMD64_CPUID_FN_1, 62);
+
+        /*
+         * Verify that the CPUID change has occurred in case the kernel is
+         * running virtualized and the hypervisor doesn't support the MSR.
+         */
+        if (cpuid_ecx(1) & BIT(30)) {
+                pr_info_once("BIOS may not properly restore RDRAND after suspend, but hypervisor does not support hiding RDRAND via CPUID.\n");
+                return;
+        }
+
+        clear_cpu_cap(c, X86_FEATURE_RDRAND);
+        pr_info_once("BIOS may not properly restore RDRAND after suspend, hiding RDRAND via CPUID. Use rdrand=force to reenable.\n");
+}
+
+static void init_amd_jg(struct cpuinfo_x86 *c)
+{
+        /*
+         * Some BIOS implementations do not restore proper RDRAND support
+         * across suspend and resume. Check on whether to hide the RDRAND
+         * instruction support via CPUID.
+         */
+        clear_rdrand_cpuid_bit(c);
+}
+
 static void init_amd_bd(struct cpuinfo_x86 *c)
 {
         u64 value;
@@ -818,6 +876,13 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
                         wrmsrl_safe(MSR_F15H_IC_CFG, value);
                 }
         }
+
+        /*
+         * Some BIOS implementations do not restore proper RDRAND support
+         * across suspend and resume. Check on whether to hide the RDRAND
+         * instruction support via CPUID.
+         */
+        clear_rdrand_cpuid_bit(c);
 }
 
 static void init_amd_zn(struct cpuinfo_x86 *c)
@@ -860,6 +925,7 @@ static void init_amd(struct cpuinfo_x86 *c)
         case 0x10: init_amd_gh(c); break;
         case 0x12: init_amd_ln(c); break;
         case 0x15: init_amd_bd(c); break;
+        case 0x16: init_amd_jg(c); break;
         case 0x17: init_amd_zn(c); break;
         }