1 files changed, 4 insertions, 25 deletions

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 325b7bdbebaa..cae9c3cb95cf 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -110,6 +110,8 @@ struct cpuinfo_x86 {
         u16                     phys_proc_id;
         /* Core id: */
         u16                     cpu_core_id;
+        /* Compute unit id */
+        u8                      compute_unit_id;
         /* Index into per_cpu list: */
         u16                     cpu_index;
 #endif
@@ -602,7 +604,7 @@ extern unsigned long		mmu_cr4_features;
 
 static inline void set_in_cr4(unsigned long mask)
 {
-        unsigned cr4;
+        unsigned long cr4;
 
         mmu_cr4_features |= mask;
         cr4 = read_cr4();
@@ -612,7 +614,7 @@ static inline void set_in_cr4(unsigned long mask)
 
 static inline void clear_in_cr4(unsigned long mask)
 {
-        unsigned cr4;
+        unsigned long cr4;
 
         mmu_cr4_features &= ~mask;
         cr4 = read_cr4();
@@ -764,29 +766,6 @@ extern unsigned long		idle_halt;
 extern unsigned long            idle_nomwait;
 extern bool                     c1e_detected;
 
-/*
- * on systems with caches, caches must be flashed as the absolute
- * last instruction before going into a suspended halt.  Otherwise,
- * dirty data can linger in the cache and become stale on resume,
- * leading to strange errors.
- *
- * perform a variety of operations to guarantee that the compiler
- * will not reorder instructions.  wbinvd itself is serializing
- * so the processor will not reorder.
- *
- * Systems without cache can just go into halt.
- */
-static inline void wbinvd_halt(void)
-{
-        mb();
-        /* check for clflush to determine if wbinvd is legal */
-        if (cpu_has_clflush)
-                asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
-        else
-                while (1)
-                        halt();
-}
-
 extern void enable_sep_cpu(void);
 extern int sysenter_setup(void);