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-rw-r--r--arch/x86/include/asm/intel-family.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0dd6b0f4000e..9f15384c504a 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -6,7 +6,7 @@
6 * "Big Core" Processors (Branded as Core, Xeon, etc...) 6 * "Big Core" Processors (Branded as Core, Xeon, etc...)
7 * 7 *
8 * The "_X" parts are generally the EP and EX Xeons, or the 8 * The "_X" parts are generally the EP and EX Xeons, or the
9 * "Extreme" ones, like Broadwell-E. 9 * "Extreme" ones, like Broadwell-E, or Atom microserver.
10 * 10 *
11 * While adding a new CPUID for a new microarchitecture, add a new 11 * While adding a new CPUID for a new microarchitecture, add a new
12 * group to keep logically sorted out in chronological order. Within 12 * group to keep logically sorted out in chronological order. Within
@@ -52,6 +52,8 @@
52 52
53#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66 53#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66
54 54
55#define INTEL_FAM6_ICELAKE_MOBILE 0x7E
56
55/* "Small Core" Processors (Atom) */ 57/* "Small Core" Processors (Atom) */
56 58
57#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ 59#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
@@ -71,6 +73,7 @@
71#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ 73#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
72#define INTEL_FAM6_ATOM_GOLDMONT_X 0x5F /* Denverton */ 74#define INTEL_FAM6_ATOM_GOLDMONT_X 0x5F /* Denverton */
73#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ 75#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
76#define INTEL_FAM6_ATOM_TREMONT_X 0x86 /* Jacobsville */
74 77
75/* Xeon Phi */ 78/* Xeon Phi */
76 79