aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sparc/include/asm/spitfire.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sparc/include/asm/spitfire.h')
-rw-r--r--arch/sparc/include/asm/spitfire.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h
index 1d8321c827a8..1b1286d05069 100644
--- a/arch/sparc/include/asm/spitfire.h
+++ b/arch/sparc/include/asm/spitfire.h
@@ -47,10 +47,26 @@
47#define SUN4V_CHIP_NIAGARA5 0x05 47#define SUN4V_CHIP_NIAGARA5 0x05
48#define SUN4V_CHIP_SPARC_M6 0x06 48#define SUN4V_CHIP_SPARC_M6 0x06
49#define SUN4V_CHIP_SPARC_M7 0x07 49#define SUN4V_CHIP_SPARC_M7 0x07
50#define SUN4V_CHIP_SPARC_M8 0x08
50#define SUN4V_CHIP_SPARC64X 0x8a 51#define SUN4V_CHIP_SPARC64X 0x8a
51#define SUN4V_CHIP_SPARC_SN 0x8b 52#define SUN4V_CHIP_SPARC_SN 0x8b
52#define SUN4V_CHIP_UNKNOWN 0xff 53#define SUN4V_CHIP_UNKNOWN 0xff
53 54
55/*
56 * The following CPU_ID_xxx constants are used
57 * to identify the CPU type in the setup phase
58 * (see head_64.S)
59 */
60#define CPU_ID_NIAGARA1 ('1')
61#define CPU_ID_NIAGARA2 ('2')
62#define CPU_ID_NIAGARA3 ('3')
63#define CPU_ID_NIAGARA4 ('4')
64#define CPU_ID_NIAGARA5 ('5')
65#define CPU_ID_M6 ('6')
66#define CPU_ID_M7 ('7')
67#define CPU_ID_M8 ('8')
68#define CPU_ID_SONOMA1 ('N')
69
54#ifndef __ASSEMBLY__ 70#ifndef __ASSEMBLY__
55 71
56enum ultra_tlb_layout { 72enum ultra_tlb_layout {