diff options
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.c')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 46 |
1 files changed, 3 insertions, 43 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 6455c1eada1a..271b67e7670c 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
| @@ -645,61 +645,21 @@ mapped: | |||
| 645 | return pcie->cfg_type1 + offset; | 645 | return pcie->cfg_type1 + offset; |
| 646 | } | 646 | } |
| 647 | 647 | ||
| 648 | static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn, | ||
| 649 | int offset, int len, u32 *val) | ||
| 650 | { | ||
| 651 | void __iomem *cfg_addr; | ||
| 652 | |||
| 653 | cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); | ||
| 654 | if (!cfg_addr) | ||
| 655 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
| 656 | |||
| 657 | switch (len) { | ||
| 658 | case 1: | ||
| 659 | *val = in_8(cfg_addr); | ||
| 660 | break; | ||
| 661 | case 2: | ||
| 662 | *val = in_le16(cfg_addr); | ||
| 663 | break; | ||
| 664 | default: | ||
| 665 | *val = in_le32(cfg_addr); | ||
| 666 | break; | ||
| 667 | } | ||
| 668 | |||
| 669 | return PCIBIOS_SUCCESSFUL; | ||
| 670 | } | ||
| 671 | |||
| 672 | static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, | 648 | static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, |
| 673 | int offset, int len, u32 val) | 649 | int offset, int len, u32 val) |
| 674 | { | 650 | { |
| 675 | struct pci_controller *hose = pci_bus_to_host(bus); | 651 | struct pci_controller *hose = pci_bus_to_host(bus); |
| 676 | void __iomem *cfg_addr; | ||
| 677 | |||
| 678 | cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); | ||
| 679 | if (!cfg_addr) | ||
| 680 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
| 681 | 652 | ||
| 682 | /* PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS */ | 653 | /* PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS */ |
| 683 | if (offset == PCI_PRIMARY_BUS && bus->number == hose->first_busno) | 654 | if (offset == PCI_PRIMARY_BUS && bus->number == hose->first_busno) |
| 684 | val &= 0xffffff00; | 655 | val &= 0xffffff00; |
| 685 | 656 | ||
| 686 | switch (len) { | 657 | return pci_generic_config_write(bus, devfn, offset, len, val); |
| 687 | case 1: | ||
| 688 | out_8(cfg_addr, val); | ||
| 689 | break; | ||
| 690 | case 2: | ||
| 691 | out_le16(cfg_addr, val); | ||
| 692 | break; | ||
| 693 | default: | ||
| 694 | out_le32(cfg_addr, val); | ||
| 695 | break; | ||
| 696 | } | ||
| 697 | |||
| 698 | return PCIBIOS_SUCCESSFUL; | ||
| 699 | } | 658 | } |
| 700 | 659 | ||
| 701 | static struct pci_ops mpc83xx_pcie_ops = { | 660 | static struct pci_ops mpc83xx_pcie_ops = { |
| 702 | .read = mpc83xx_pcie_read_config, | 661 | .map_bus = mpc83xx_pcie_remap_cfg, |
| 662 | .read = pci_generic_config_read, | ||
| 703 | .write = mpc83xx_pcie_write_config, | 663 | .write = mpc83xx_pcie_write_config, |
| 704 | }; | 664 | }; |
| 705 | 665 | ||
