1 files changed, 50 insertions, 0 deletions

diff --git a/arch/openrisc/boot/dts/or1ksim.dts b/arch/openrisc/boot/dts/or1ksim.dts
new file mode 100644
index 000000000000..5d4f9027afaf
--- /dev/null
+++ b/arch/openrisc/boot/dts/or1ksim.dts
@@ -0,0 +1,50 @@
+/dts-v1/;
+/ {
+        compatible = "opencores,or1ksim";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&pic>;
+
+        chosen {
+                bootargs = "console=uart,mmio,0x90000000,115200";
+        };
+
+        memory@0 {
+                device_type = "memory";
+                reg = <0x00000000 0x02000000>;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cpu@0 {
+                        compatible = "opencores,or1200-rtlsvn481";
+                        reg = <0>;
+                        clock-frequency = <20000000>;
+                };
+        };
+
+        /*
+         * OR1K PIC is built into CPU and accessed via special purpose
+         * registers.  It is not addressable and, hence, has no 'reg'
+         * property.
+         */
+        pic: pic {
+                compatible = "opencores,or1k-pic";
+                #interrupt-cells = <1>;
+                interrupt-controller;
+        };
+
+        serial0: serial@90000000 {
+                compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
+                reg = <0x90000000 0x100>;
+                interrupts = <2>;
+                clock-frequency = <20000000>;
+        };
+
+        enet0: ethoc@92000000 {
+                compatible = "opencores,ethmac-rtlsvn338";
+                reg = <0x92000000 0x100>;
+                interrupts = <4>;
+        };
+};