1 files changed, 62 insertions, 6 deletions

diff --git a/arch/mips/kernel/reset.c b/arch/mips/kernel/reset.c
index 7c746d3458e7..6288780b779e 100644
--- a/arch/mips/kernel/reset.c
+++ b/arch/mips/kernel/reset.c
@@ -13,6 +13,9 @@
 #include <linux/reboot.h>
 #include <linux/delay.h>
 
+#include <asm/compiler.h>
+#include <asm/idle.h>
+#include <asm/mipsregs.h>
 #include <asm/reboot.h>
 
 /*
@@ -26,6 +29,62 @@ void (*pm_power_off)(void);
 
 EXPORT_SYMBOL(pm_power_off);
 
+static void machine_hang(void)
+{
+        /*
+         * We're hanging the system so we don't want to be interrupted anymore.
+         * Any interrupt handlers that ran would at best be useless & at worst
+         * go awry because the system isn't in a functional state.
+         */
+        local_irq_disable();
+
+        /*
+         * Mask all interrupts, giving us a better chance of remaining in the
+         * low power wait state.
+         */
+        clear_c0_status(ST0_IM);
+
+        while (true) {
+                if (cpu_has_mips_r) {
+                        /*
+                         * We know that the wait instruction is supported so
+                         * make use of it directly, leaving interrupts
+                         * disabled.
+                         */
+                        asm volatile(
+                                ".set   push\n\t"
+                                ".set   " MIPS_ISA_ARCH_LEVEL "\n\t"
+                                "wait\n\t"
+                                ".set   pop");
+                } else if (cpu_wait) {
+                        /*
+                         * Try the cpu_wait() callback. This isn't ideal since
+                         * it'll re-enable interrupts, but that ought to be
+                         * harmless given that they're all masked.
+                         */
+                        cpu_wait();
+                        local_irq_disable();
+                } else {
+                        /*
+                         * We're going to burn some power running round the
+                         * loop, but we don't really have a choice. This isn't
+                         * a path we should expect to run for long during
+                         * typical use anyway.
+                         */
+                }
+
+                /*
+                 * In most modern MIPS CPUs interrupts will cause the wait
+                 * instruction to graduate even when disabled, and in some
+                 * cases even when masked. In order to prevent a timer
+                 * interrupt from continuously taking us out of the low power
+                 * wait state, we clear any pending timer interrupt here.
+                 */
+                if (cpu_has_counter)
+                        write_c0_compare(0);
+        }
+}
+
 void machine_restart(char *command)
 {
         if (_machine_restart)
@@ -38,8 +97,7 @@ void machine_restart(char *command)
         do_kernel_restart(command);
         mdelay(1000);
         pr_emerg("Reboot failed -- System halted\n");
-        local_irq_disable();
-        while (1);
+        machine_hang();
 }
 
 void machine_halt(void)
@@ -51,8 +109,7 @@ void machine_halt(void)
         preempt_disable();
         smp_send_stop();
 #endif
-        local_irq_disable();
-        while (1);
+        machine_hang();
 }
 
 void machine_power_off(void)
@@ -64,6 +121,5 @@ void machine_power_off(void)
         preempt_disable();
         smp_send_stop();
 #endif
-        local_irq_disable();
-        while (1);
+        machine_hang();
 }