diff options
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 82 |
1 files changed, 53 insertions, 29 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index b1b304ea2128..71620e19827a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <asm/system.h> | 25 | #include <asm/system.h> |
| 26 | #include <asm/watch.h> | 26 | #include <asm/watch.h> |
| 27 | #include <asm/spram.h> | 27 | #include <asm/spram.h> |
| 28 | #include <asm/uaccess.h> | ||
| 29 | |||
| 28 | /* | 30 | /* |
| 29 | * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, | 31 | * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, |
| 30 | * the implementation of the "wait" feature differs between CPU families. This | 32 | * the implementation of the "wait" feature differs between CPU families. This |
| @@ -181,12 +183,13 @@ void __init check_wait(void) | |||
| 181 | case CPU_5KC: | 183 | case CPU_5KC: |
| 182 | case CPU_25KF: | 184 | case CPU_25KF: |
| 183 | case CPU_PR4450: | 185 | case CPU_PR4450: |
| 184 | case CPU_BCM3302: | 186 | case CPU_BMIPS3300: |
| 185 | case CPU_BCM6338: | 187 | case CPU_BMIPS4350: |
| 186 | case CPU_BCM6348: | 188 | case CPU_BMIPS4380: |
| 187 | case CPU_BCM6358: | 189 | case CPU_BMIPS5000: |
| 188 | case CPU_CAVIUM_OCTEON: | 190 | case CPU_CAVIUM_OCTEON: |
| 189 | case CPU_CAVIUM_OCTEON_PLUS: | 191 | case CPU_CAVIUM_OCTEON_PLUS: |
| 192 | case CPU_CAVIUM_OCTEON2: | ||
| 190 | case CPU_JZRISC: | 193 | case CPU_JZRISC: |
| 191 | cpu_wait = r4k_wait; | 194 | cpu_wait = r4k_wait; |
| 192 | break; | 195 | break; |
| @@ -902,33 +905,37 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) | |||
| 902 | { | 905 | { |
| 903 | decode_configs(c); | 906 | decode_configs(c); |
| 904 | switch (c->processor_id & 0xff00) { | 907 | switch (c->processor_id & 0xff00) { |
| 905 | case PRID_IMP_BCM3302: | 908 | case PRID_IMP_BMIPS32: |
| 906 | /* same as PRID_IMP_BCM6338 */ | 909 | c->cputype = CPU_BMIPS32; |
| 907 | c->cputype = CPU_BCM3302; | 910 | __cpu_name[cpu] = "Broadcom BMIPS32"; |
| 908 | __cpu_name[cpu] = "Broadcom BCM3302"; | 911 | break; |
| 909 | break; | 912 | case PRID_IMP_BMIPS3300: |
| 910 | case PRID_IMP_BCM4710: | 913 | case PRID_IMP_BMIPS3300_ALT: |
| 911 | c->cputype = CPU_BCM4710; | 914 | case PRID_IMP_BMIPS3300_BUG: |
| 912 | __cpu_name[cpu] = "Broadcom BCM4710"; | 915 | c->cputype = CPU_BMIPS3300; |
| 913 | break; | 916 | __cpu_name[cpu] = "Broadcom BMIPS3300"; |
| 914 | case PRID_IMP_BCM6345: | 917 | break; |
| 915 | c->cputype = CPU_BCM6345; | 918 | case PRID_IMP_BMIPS43XX: { |
| 916 | __cpu_name[cpu] = "Broadcom BCM6345"; | 919 | int rev = c->processor_id & 0xff; |
| 920 | |||
| 921 | if (rev >= PRID_REV_BMIPS4380_LO && | ||
| 922 | rev <= PRID_REV_BMIPS4380_HI) { | ||
| 923 | c->cputype = CPU_BMIPS4380; | ||
| 924 | __cpu_name[cpu] = "Broadcom BMIPS4380"; | ||
| 925 | } else { | ||
| 926 | c->cputype = CPU_BMIPS4350; | ||
| 927 | __cpu_name[cpu] = "Broadcom BMIPS4350"; | ||
| 928 | } | ||
| 917 | break; | 929 | break; |
| 918 | case PRID_IMP_BCM6348: | 930 | } |
| 919 | c->cputype = CPU_BCM6348; | 931 | case PRID_IMP_BMIPS5000: |
| 920 | __cpu_name[cpu] = "Broadcom BCM6348"; | 932 | c->cputype = CPU_BMIPS5000; |
| 933 | __cpu_name[cpu] = "Broadcom BMIPS5000"; | ||
| 934 | c->options |= MIPS_CPU_ULRI; | ||
| 921 | break; | 935 | break; |
| 922 | case PRID_IMP_BCM4350: | 936 | case PRID_IMP_BMIPS4KC: |
| 923 | switch (c->processor_id & 0xf0) { | 937 | c->cputype = CPU_4KC; |
| 924 | case PRID_REV_BCM6358: | 938 | __cpu_name[cpu] = "MIPS 4Kc"; |
| 925 | c->cputype = CPU_BCM6358; | ||
| 926 | __cpu_name[cpu] = "Broadcom BCM6358"; | ||
| 927 | break; | ||
| 928 | default: | ||
| 929 | c->cputype = CPU_UNKNOWN; | ||
| 930 | break; | ||
| 931 | } | ||
| 932 | break; | 939 | break; |
| 933 | } | 940 | } |
| 934 | } | 941 | } |
| @@ -953,6 +960,12 @@ platform: | |||
| 953 | if (cpu == 0) | 960 | if (cpu == 0) |
| 954 | __elf_platform = "octeon"; | 961 | __elf_platform = "octeon"; |
| 955 | break; | 962 | break; |
| 963 | case PRID_IMP_CAVIUM_CN63XX: | ||
| 964 | c->cputype = CPU_CAVIUM_OCTEON2; | ||
| 965 | __cpu_name[cpu] = "Cavium Octeon II"; | ||
| 966 | if (cpu == 0) | ||
| 967 | __elf_platform = "octeon2"; | ||
| 968 | break; | ||
| 956 | default: | 969 | default: |
| 957 | printk(KERN_INFO "Unknown Octeon chip!\n"); | 970 | printk(KERN_INFO "Unknown Octeon chip!\n"); |
| 958 | c->cputype = CPU_UNKNOWN; | 971 | c->cputype = CPU_UNKNOWN; |
| @@ -976,6 +989,12 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) | |||
| 976 | } | 989 | } |
| 977 | } | 990 | } |
| 978 | 991 | ||
| 992 | #ifdef CONFIG_64BIT | ||
| 993 | /* For use by uaccess.h */ | ||
| 994 | u64 __ua_limit; | ||
| 995 | EXPORT_SYMBOL(__ua_limit); | ||
| 996 | #endif | ||
| 997 | |||
| 979 | const char *__cpu_name[NR_CPUS]; | 998 | const char *__cpu_name[NR_CPUS]; |
| 980 | const char *__elf_platform; | 999 | const char *__elf_platform; |
| 981 | 1000 | ||
| @@ -1053,6 +1072,11 @@ __cpuinit void cpu_probe(void) | |||
| 1053 | c->srsets = 1; | 1072 | c->srsets = 1; |
| 1054 | 1073 | ||
| 1055 | cpu_probe_vmbits(c); | 1074 | cpu_probe_vmbits(c); |
| 1075 | |||
| 1076 | #ifdef CONFIG_64BIT | ||
| 1077 | if (cpu == 0) | ||
| 1078 | __ua_limit = ~((1ull << cpu_vmbits) - 1); | ||
| 1079 | #endif | ||
| 1056 | } | 1080 | } |
| 1057 | 1081 | ||
| 1058 | __cpuinit void cpu_report(void) | 1082 | __cpuinit void cpu_report(void) |
