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-rw-r--r--arch/mips/include/asm/cpu-features.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 721b698bfe3c..5f74590e0bea 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -11,6 +11,7 @@
11 11
12#include <asm/cpu.h> 12#include <asm/cpu.h>
13#include <asm/cpu-info.h> 13#include <asm/cpu-info.h>
14#include <asm/isa-rev.h>
14#include <cpu-feature-overrides.h> 15#include <cpu-feature-overrides.h>
15 16
16/* 17/*
@@ -493,7 +494,7 @@
493# define cpu_has_perf (cpu_data[0].options & MIPS_CPU_PERF) 494# define cpu_has_perf (cpu_data[0].options & MIPS_CPU_PERF)
494#endif 495#endif
495 496
496#if defined(CONFIG_SMP) && defined(__mips_isa_rev) && (__mips_isa_rev >= 6) 497#if defined(CONFIG_SMP) && (MIPS_ISA_REV >= 6)
497/* 498/*
498 * Some systems share FTLB RAMs between threads within a core (siblings in 499 * Some systems share FTLB RAMs between threads within a core (siblings in
499 * kernel parlance). This means that FTLB entries may become invalid at almost 500 * kernel parlance). This means that FTLB entries may become invalid at almost
@@ -525,7 +526,7 @@
525# define cpu_has_shared_ftlb_entries \ 526# define cpu_has_shared_ftlb_entries \
526 (current_cpu_data.options & MIPS_CPU_SHARED_FTLB_ENTRIES) 527 (current_cpu_data.options & MIPS_CPU_SHARED_FTLB_ENTRIES)
527# endif 528# endif
528#endif /* SMP && __mips_isa_rev >= 6 */ 529#endif /* SMP && MIPS_ISA_REV >= 6 */
529 530
530#ifndef cpu_has_shared_ftlb_ram 531#ifndef cpu_has_shared_ftlb_ram
531# define cpu_has_shared_ftlb_ram 0 532# define cpu_has_shared_ftlb_ram 0