1 files changed, 2 insertions, 2 deletions

diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c
index 745695db5ba0..f2f264b5aafe 100644
--- a/arch/mips/alchemy/common/dbdma.c
+++ b/arch/mips/alchemy/common/dbdma.c
@@ -261,7 +261,7 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
         au1x_dma_chan_t *cp;
 
         /*
-         * We do the intialization on the first channel allocation.
+         * We do the initialization on the first channel allocation.
          * We have to wait because of the interrupt handler initialization
          * which can't be done successfully during board set up.
          */
@@ -964,7 +964,7 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr)
         dp->dscr_source1 = dscr->dscr_source1;
         dp->dscr_cmd1 = dscr->dscr_cmd1;
         nbytes = dscr->dscr_cmd1;
-        /* Allow the caller to specifiy if an interrupt is generated */
+        /* Allow the caller to specify if an interrupt is generated */
         dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
         dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
         ctp->chan_ptr->ddma_dbell = 0;