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-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi14
-rw-r--r--arch/arm/boot/dts/am335x-chilisom.dtsi14
-rw-r--r--arch/arm/boot/dts/am335x-nano.dts14
-rw-r--r--arch/arm/boot/dts/am335x-pepper.dts14
-rw-r--r--arch/arm/boot/dts/am335x-shc.dts4
-rw-r--r--arch/arm/boot/dts/am335x-sl50.dts13
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi1
-rw-r--r--arch/arm/boot/dts/am4372.dtsi5
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts4
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts4
-rw-r--r--arch/arm/boot/dts/am57xx-cl-som-am57x.dts14
-rw-r--r--arch/arm/boot/dts/am57xx-sbc-am57x.dts8
-rw-r--r--arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts1
-rw-r--r--arch/arm/boot/dts/at91-sama5d2_xplained.dts12
-rw-r--r--arch/arm/boot/dts/at91-sama5d4_xplained.dts8
-rw-r--r--arch/arm/boot/dts/at91-sama5d4ek.dts11
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts2
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-ds112.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-lswvl.dts25
-rw-r--r--arch/arm/boot/dts/kirkwood-lswxl.dts31
-rw-r--r--arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts1
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-som.dtsi9
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi33
-rw-r--r--arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts39
-rw-r--r--arch/arm/boot/dts/sama5d2-pinfunc.h2
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi2
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi37
-rw-r--r--arch/arm/boot/dts/tps65217.dtsi56
-rw-r--r--arch/arm/configs/multi_v7_defconfig1
-rw-r--r--arch/arm/configs/omap2plus_defconfig43
-rw-r--r--arch/arm/crypto/aes-ce-glue.c4
-rw-r--r--arch/arm/include/asm/arch_gicv3.h1
-rw-r--r--arch/arm/include/asm/xen/page-coherent.h21
-rw-r--r--arch/arm/kvm/guest.c2
-rw-r--r--arch/arm/kvm/mmio.c3
-rw-r--r--arch/arm/mach-omap2/board-generic.c22
-rw-r--r--arch/arm/mach-omap2/devices.c28
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c6
-rw-r--r--arch/arm/mach-omap2/omap_device.c14
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c23
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S61
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S25
-rw-r--r--arch/arm/mach-realview/Kconfig3
-rw-r--r--arch/arm/mach-realview/platsmp-dt.c2
-rw-r--r--arch/arm/mach-shmobile/common.h1
-rw-r--r--arch/arm/mach-shmobile/headsmp-scu.S6
-rw-r--r--arch/arm/mach-shmobile/headsmp.S28
-rw-r--r--arch/arm/mach-shmobile/platsmp-apmu.c1
-rw-r--r--arch/arm/mach-shmobile/platsmp-scu.c4
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c2
-rw-r--r--arch/arm/mach-tango/Kconfig3
-rw-r--r--arch/arm/mach-tango/platsmp.c2
-rw-r--r--arch/arm/mm/mmap.c2
55 files changed, 423 insertions, 268 deletions
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index f3db13d2d90e..0cc150b87b86 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -285,8 +285,10 @@
285 }; 285 };
286}; 286};
287 287
288
289/include/ "tps65217.dtsi"
290
288&tps { 291&tps {
289 compatible = "ti,tps65217";
290 /* 292 /*
291 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 293 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
292 * mode") at poweroff. Most BeagleBone versions do not support RTC-only 294 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
@@ -307,17 +309,12 @@
307 ti,pmic-shutdown-controller; 309 ti,pmic-shutdown-controller;
308 310
309 regulators { 311 regulators {
310 #address-cells = <1>;
311 #size-cells = <0>;
312
313 dcdc1_reg: regulator@0 { 312 dcdc1_reg: regulator@0 {
314 reg = <0>;
315 regulator-name = "vdds_dpr"; 313 regulator-name = "vdds_dpr";
316 regulator-always-on; 314 regulator-always-on;
317 }; 315 };
318 316
319 dcdc2_reg: regulator@1 { 317 dcdc2_reg: regulator@1 {
320 reg = <1>;
321 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 318 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
322 regulator-name = "vdd_mpu"; 319 regulator-name = "vdd_mpu";
323 regulator-min-microvolt = <925000>; 320 regulator-min-microvolt = <925000>;
@@ -327,7 +324,6 @@
327 }; 324 };
328 325
329 dcdc3_reg: regulator@2 { 326 dcdc3_reg: regulator@2 {
330 reg = <2>;
331 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 327 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
332 regulator-name = "vdd_core"; 328 regulator-name = "vdd_core";
333 regulator-min-microvolt = <925000>; 329 regulator-min-microvolt = <925000>;
@@ -337,25 +333,21 @@
337 }; 333 };
338 334
339 ldo1_reg: regulator@3 { 335 ldo1_reg: regulator@3 {
340 reg = <3>;
341 regulator-name = "vio,vrtc,vdds"; 336 regulator-name = "vio,vrtc,vdds";
342 regulator-always-on; 337 regulator-always-on;
343 }; 338 };
344 339
345 ldo2_reg: regulator@4 { 340 ldo2_reg: regulator@4 {
346 reg = <4>;
347 regulator-name = "vdd_3v3aux"; 341 regulator-name = "vdd_3v3aux";
348 regulator-always-on; 342 regulator-always-on;
349 }; 343 };
350 344
351 ldo3_reg: regulator@5 { 345 ldo3_reg: regulator@5 {
352 reg = <5>;
353 regulator-name = "vdd_1v8"; 346 regulator-name = "vdd_1v8";
354 regulator-always-on; 347 regulator-always-on;
355 }; 348 };
356 349
357 ldo4_reg: regulator@6 { 350 ldo4_reg: regulator@6 {
358 reg = <6>;
359 regulator-name = "vdd_3v3a"; 351 regulator-name = "vdd_3v3a";
360 regulator-always-on; 352 regulator-always-on;
361 }; 353 };
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index fda457b07e15..857d9894103a 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -128,21 +128,16 @@
128 128
129}; 129};
130 130
131&tps { 131/include/ "tps65217.dtsi"
132 compatible = "ti,tps65217";
133 132
133&tps {
134 regulators { 134 regulators {
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 dcdc1_reg: regulator@0 { 135 dcdc1_reg: regulator@0 {
139 reg = <0>;
140 regulator-name = "vdds_dpr"; 136 regulator-name = "vdds_dpr";
141 regulator-always-on; 137 regulator-always-on;
142 }; 138 };
143 139
144 dcdc2_reg: regulator@1 { 140 dcdc2_reg: regulator@1 {
145 reg = <1>;
146 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 141 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
147 regulator-name = "vdd_mpu"; 142 regulator-name = "vdd_mpu";
148 regulator-min-microvolt = <925000>; 143 regulator-min-microvolt = <925000>;
@@ -152,7 +147,6 @@
152 }; 147 };
153 148
154 dcdc3_reg: regulator@2 { 149 dcdc3_reg: regulator@2 {
155 reg = <2>;
156 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 150 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
157 regulator-name = "vdd_core"; 151 regulator-name = "vdd_core";
158 regulator-min-microvolt = <925000>; 152 regulator-min-microvolt = <925000>;
@@ -162,28 +156,24 @@
162 }; 156 };
163 157
164 ldo1_reg: regulator@3 { 158 ldo1_reg: regulator@3 {
165 reg = <3>;
166 regulator-name = "vio,vrtc,vdds"; 159 regulator-name = "vio,vrtc,vdds";
167 regulator-boot-on; 160 regulator-boot-on;
168 regulator-always-on; 161 regulator-always-on;
169 }; 162 };
170 163
171 ldo2_reg: regulator@4 { 164 ldo2_reg: regulator@4 {
172 reg = <4>;
173 regulator-name = "vdd_3v3aux"; 165 regulator-name = "vdd_3v3aux";
174 regulator-boot-on; 166 regulator-boot-on;
175 regulator-always-on; 167 regulator-always-on;
176 }; 168 };
177 169
178 ldo3_reg: regulator@5 { 170 ldo3_reg: regulator@5 {
179 reg = <5>;
180 regulator-name = "vdd_1v8"; 171 regulator-name = "vdd_1v8";
181 regulator-boot-on; 172 regulator-boot-on;
182 regulator-always-on; 173 regulator-always-on;
183 }; 174 };
184 175
185 ldo4_reg: regulator@6 { 176 ldo4_reg: regulator@6 {
186 reg = <6>;
187 regulator-name = "vdd_3v3d"; 177 regulator-name = "vdd_3v3d";
188 regulator-boot-on; 178 regulator-boot-on;
189 regulator-always-on; 179 regulator-always-on;
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index 77559a1ded60..f313999c503e 100644
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -375,15 +375,11 @@
375 wp-gpios = <&gpio3 18 0>; 375 wp-gpios = <&gpio3 18 0>;
376}; 376};
377 377
378&tps { 378#include "tps65217.dtsi"
379 compatible = "ti,tps65217";
380 379
380&tps {
381 regulators { 381 regulators {
382 #address-cells = <1>;
383 #size-cells = <0>;
384
385 dcdc1_reg: regulator@0 { 382 dcdc1_reg: regulator@0 {
386 reg = <0>;
387 /* +1.5V voltage with ±4% tolerance */ 383 /* +1.5V voltage with ±4% tolerance */
388 regulator-min-microvolt = <1450000>; 384 regulator-min-microvolt = <1450000>;
389 regulator-max-microvolt = <1550000>; 385 regulator-max-microvolt = <1550000>;
@@ -392,7 +388,6 @@
392 }; 388 };
393 389
394 dcdc2_reg: regulator@1 { 390 dcdc2_reg: regulator@1 {
395 reg = <1>;
396 /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */ 391 /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
397 regulator-name = "vdd_mpu"; 392 regulator-name = "vdd_mpu";
398 regulator-min-microvolt = <915000>; 393 regulator-min-microvolt = <915000>;
@@ -402,7 +397,6 @@
402 }; 397 };
403 398
404 dcdc3_reg: regulator@2 { 399 dcdc3_reg: regulator@2 {
405 reg = <2>;
406 /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */ 400 /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
407 regulator-name = "vdd_core"; 401 regulator-name = "vdd_core";
408 regulator-min-microvolt = <915000>; 402 regulator-min-microvolt = <915000>;
@@ -412,7 +406,6 @@
412 }; 406 };
413 407
414 ldo1_reg: regulator@3 { 408 ldo1_reg: regulator@3 {
415 reg = <3>;
416 /* +1.8V voltage with ±4% tolerance */ 409 /* +1.8V voltage with ±4% tolerance */
417 regulator-min-microvolt = <1750000>; 410 regulator-min-microvolt = <1750000>;
418 regulator-max-microvolt = <1870000>; 411 regulator-max-microvolt = <1870000>;
@@ -421,7 +414,6 @@
421 }; 414 };
422 415
423 ldo2_reg: regulator@4 { 416 ldo2_reg: regulator@4 {
424 reg = <4>;
425 /* +3.3V voltage with ±4% tolerance */ 417 /* +3.3V voltage with ±4% tolerance */
426 regulator-min-microvolt = <3175000>; 418 regulator-min-microvolt = <3175000>;
427 regulator-max-microvolt = <3430000>; 419 regulator-max-microvolt = <3430000>;
@@ -430,7 +422,6 @@
430 }; 422 };
431 423
432 ldo3_reg: regulator@5 { 424 ldo3_reg: regulator@5 {
433 reg = <5>;
434 /* +1.8V voltage with ±4% tolerance */ 425 /* +1.8V voltage with ±4% tolerance */
435 regulator-min-microvolt = <1750000>; 426 regulator-min-microvolt = <1750000>;
436 regulator-max-microvolt = <1870000>; 427 regulator-max-microvolt = <1870000>;
@@ -439,7 +430,6 @@
439 }; 430 };
440 431
441 ldo4_reg: regulator@6 { 432 ldo4_reg: regulator@6 {
442 reg = <6>;
443 /* +3.3V voltage with ±4% tolerance */ 433 /* +3.3V voltage with ±4% tolerance */
444 regulator-min-microvolt = <3175000>; 434 regulator-min-microvolt = <3175000>;
445 regulator-max-microvolt = <3430000>; 435 regulator-max-microvolt = <3430000>;
diff --git a/arch/arm/boot/dts/am335x-pepper.dts b/arch/arm/boot/dts/am335x-pepper.dts
index 471a3a70ea1f..8867aaaec54d 100644
--- a/arch/arm/boot/dts/am335x-pepper.dts
+++ b/arch/arm/boot/dts/am335x-pepper.dts
@@ -420,9 +420,9 @@
420 vin-supply = <&vbat>; 420 vin-supply = <&vbat>;
421}; 421};
422 422
423&tps { 423/include/ "tps65217.dtsi"
424 compatible = "ti,tps65217";
425 424
425&tps {
426 backlight { 426 backlight {
427 isel = <1>; /* ISET1 */ 427 isel = <1>; /* ISET1 */
428 fdim = <200>; /* TPS65217_BL_FDIM_200HZ */ 428 fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
@@ -430,17 +430,12 @@
430 }; 430 };
431 431
432 regulators { 432 regulators {
433 #address-cells = <1>;
434 #size-cells = <0>;
435
436 dcdc1_reg: regulator@0 { 433 dcdc1_reg: regulator@0 {
437 reg = <0>;
438 /* VDD_1V8 system supply */ 434 /* VDD_1V8 system supply */
439 regulator-always-on; 435 regulator-always-on;
440 }; 436 };
441 437
442 dcdc2_reg: regulator@1 { 438 dcdc2_reg: regulator@1 {
443 reg = <1>;
444 /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */ 439 /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
445 regulator-name = "vdd_core"; 440 regulator-name = "vdd_core";
446 regulator-min-microvolt = <925000>; 441 regulator-min-microvolt = <925000>;
@@ -450,7 +445,6 @@
450 }; 445 };
451 446
452 dcdc3_reg: regulator@2 { 447 dcdc3_reg: regulator@2 {
453 reg = <2>;
454 /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */ 448 /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
455 regulator-name = "vdd_mpu"; 449 regulator-name = "vdd_mpu";
456 regulator-min-microvolt = <925000>; 450 regulator-min-microvolt = <925000>;
@@ -460,21 +454,18 @@
460 }; 454 };
461 455
462 ldo1_reg: regulator@3 { 456 ldo1_reg: regulator@3 {
463 reg = <3>;
464 /* VRTC 1.8V always-on supply */ 457 /* VRTC 1.8V always-on supply */
465 regulator-name = "vrtc,vdds"; 458 regulator-name = "vrtc,vdds";
466 regulator-always-on; 459 regulator-always-on;
467 }; 460 };
468 461
469 ldo2_reg: regulator@4 { 462 ldo2_reg: regulator@4 {
470 reg = <4>;
471 /* 3.3V rail */ 463 /* 3.3V rail */
472 regulator-name = "vdd_3v3aux"; 464 regulator-name = "vdd_3v3aux";
473 regulator-always-on; 465 regulator-always-on;
474 }; 466 };
475 467
476 ldo3_reg: regulator@5 { 468 ldo3_reg: regulator@5 {
477 reg = <5>;
478 /* VDD_3V3A 3.3V rail */ 469 /* VDD_3V3A 3.3V rail */
479 regulator-name = "vdd_3v3a"; 470 regulator-name = "vdd_3v3a";
480 regulator-min-microvolt = <3300000>; 471 regulator-min-microvolt = <3300000>;
@@ -482,7 +473,6 @@
482 }; 473 };
483 474
484 ldo4_reg: regulator@6 { 475 ldo4_reg: regulator@6 {
485 reg = <6>;
486 /* VDD_3V3B 3.3V rail */ 476 /* VDD_3V3B 3.3V rail */
487 regulator-name = "vdd_3v3b"; 477 regulator-name = "vdd_3v3b";
488 regulator-always-on; 478 regulator-always-on;
diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts
index 1b5b044fcd91..865de8500f1c 100644
--- a/arch/arm/boot/dts/am335x-shc.dts
+++ b/arch/arm/boot/dts/am335x-shc.dts
@@ -46,7 +46,7 @@
46 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; 46 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
47 linux,code = <KEY_BACK>; 47 linux,code = <KEY_BACK>;
48 debounce-interval = <1000>; 48 debounce-interval = <1000>;
49 gpio-key,wakeup; 49 wakeup-source;
50 }; 50 };
51 51
52 front_button { 52 front_button {
@@ -54,7 +54,7 @@
54 gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; 54 gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
55 linux,code = <KEY_FRONT>; 55 linux,code = <KEY_FRONT>;
56 debounce-interval = <1000>; 56 debounce-interval = <1000>;
57 gpio-key,wakeup; 57 wakeup-source;
58 }; 58 };
59 }; 59 };
60 60
diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts
index d38edfa53bb9..3303c281697b 100644
--- a/arch/arm/boot/dts/am335x-sl50.dts
+++ b/arch/arm/boot/dts/am335x-sl50.dts
@@ -375,19 +375,16 @@
375 pinctrl-0 = <&uart4_pins>; 375 pinctrl-0 = <&uart4_pins>;
376}; 376};
377 377
378#include "tps65217.dtsi"
379
378&tps { 380&tps {
379 compatible = "ti,tps65217";
380 ti,pmic-shutdown-controller; 381 ti,pmic-shutdown-controller;
381 382
382 interrupt-parent = <&intc>; 383 interrupt-parent = <&intc>;
383 interrupts = <7>; /* NNMI */ 384 interrupts = <7>; /* NNMI */
384 385
385 regulators { 386 regulators {
386 #address-cells = <1>;
387 #size-cells = <0>;
388
389 dcdc1_reg: regulator@0 { 387 dcdc1_reg: regulator@0 {
390 reg = <0>;
391 /* VDDS_DDR */ 388 /* VDDS_DDR */
392 regulator-min-microvolt = <1500000>; 389 regulator-min-microvolt = <1500000>;
393 regulator-max-microvolt = <1500000>; 390 regulator-max-microvolt = <1500000>;
@@ -395,7 +392,6 @@
395 }; 392 };
396 393
397 dcdc2_reg: regulator@1 { 394 dcdc2_reg: regulator@1 {
398 reg = <1>;
399 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 395 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
400 regulator-name = "vdd_mpu"; 396 regulator-name = "vdd_mpu";
401 regulator-min-microvolt = <925000>; 397 regulator-min-microvolt = <925000>;
@@ -405,7 +401,6 @@
405 }; 401 };
406 402
407 dcdc3_reg: regulator@2 { 403 dcdc3_reg: regulator@2 {
408 reg = <2>;
409 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 404 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
410 regulator-name = "vdd_core"; 405 regulator-name = "vdd_core";
411 regulator-min-microvolt = <925000>; 406 regulator-min-microvolt = <925000>;
@@ -415,7 +410,6 @@
415 }; 410 };
416 411
417 ldo1_reg: regulator@3 { 412 ldo1_reg: regulator@3 {
418 reg = <3>;
419 /* VRTC / VIO / VDDS*/ 413 /* VRTC / VIO / VDDS*/
420 regulator-always-on; 414 regulator-always-on;
421 regulator-min-microvolt = <1800000>; 415 regulator-min-microvolt = <1800000>;
@@ -423,7 +417,6 @@
423 }; 417 };
424 418
425 ldo2_reg: regulator@4 { 419 ldo2_reg: regulator@4 {
426 reg = <4>;
427 /* VDD_3V3AUX */ 420 /* VDD_3V3AUX */
428 regulator-always-on; 421 regulator-always-on;
429 regulator-min-microvolt = <3300000>; 422 regulator-min-microvolt = <3300000>;
@@ -431,7 +424,6 @@
431 }; 424 };
432 425
433 ldo3_reg: regulator@5 { 426 ldo3_reg: regulator@5 {
434 reg = <5>;
435 /* VDD_1V8 */ 427 /* VDD_1V8 */
436 regulator-min-microvolt = <1800000>; 428 regulator-min-microvolt = <1800000>;
437 regulator-max-microvolt = <1800000>; 429 regulator-max-microvolt = <1800000>;
@@ -439,7 +431,6 @@
439 }; 431 };
440 432
441 ldo4_reg: regulator@6 { 433 ldo4_reg: regulator@6 {
442 reg = <6>;
443 /* VDD_3V3A */ 434 /* VDD_3V3A */
444 regulator-min-microvolt = <3300000>; 435 regulator-min-microvolt = <3300000>;
445 regulator-max-microvolt = <3300000>; 436 regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 04885f9f959e..1fafaad516ba 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -439,6 +439,7 @@
439 ti,mbox-num-users = <4>; 439 ti,mbox-num-users = <4>;
440 ti,mbox-num-fifos = <8>; 440 ti,mbox-num-fifos = <8>;
441 mbox_wkupm3: wkup_m3 { 441 mbox_wkupm3: wkup_m3 {
442 ti,mbox-send-noirq;
442 ti,mbox-tx = <0 0 0>; 443 ti,mbox-tx = <0 0 0>;
443 ti,mbox-rx = <0 0 3>; 444 ti,mbox-rx = <0 0 3>;
444 }; 445 };
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index df955ba4dc62..92068fbf8b57 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -73,7 +73,7 @@
73 global_timer: timer@48240200 { 73 global_timer: timer@48240200 {
74 compatible = "arm,cortex-a9-global-timer"; 74 compatible = "arm,cortex-a9-global-timer";
75 reg = <0x48240200 0x100>; 75 reg = <0x48240200 0x100>;
76 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 76 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
77 interrupt-parent = <&gic>; 77 interrupt-parent = <&gic>;
78 clocks = <&mpu_periphclk>; 78 clocks = <&mpu_periphclk>;
79 }; 79 };
@@ -81,7 +81,7 @@
81 local_timer: timer@48240600 { 81 local_timer: timer@48240600 {
82 compatible = "arm,cortex-a9-twd-timer"; 82 compatible = "arm,cortex-a9-twd-timer";
83 reg = <0x48240600 0x100>; 83 reg = <0x48240600 0x100>;
84 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 84 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
85 interrupt-parent = <&gic>; 85 interrupt-parent = <&gic>;
86 clocks = <&mpu_periphclk>; 86 clocks = <&mpu_periphclk>;
87 }; 87 };
@@ -290,6 +290,7 @@
290 ti,mbox-num-users = <4>; 290 ti,mbox-num-users = <4>;
291 ti,mbox-num-fifos = <8>; 291 ti,mbox-num-fifos = <8>;
292 mbox_wkupm3: wkup_m3 { 292 mbox_wkupm3: wkup_m3 {
293 ti,mbox-send-noirq;
293 ti,mbox-tx = <0 0 0>; 294 ti,mbox-tx = <0 0 0>;
294 ti,mbox-rx = <0 0 3>; 295 ti,mbox-rx = <0 0 3>;
295 }; 296 };
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 64d43325bcbc..ecd09ab6d581 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -590,8 +590,6 @@
590 pinctrl-names = "default"; 590 pinctrl-names = "default";
591 pinctrl-0 = <&pixcir_ts_pins>; 591 pinctrl-0 = <&pixcir_ts_pins>;
592 reg = <0x5c>; 592 reg = <0x5c>;
593 interrupt-parent = <&gpio3>;
594 interrupts = <22 0>;
595 593
596 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 594 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
597 595
@@ -599,7 +597,7 @@
599 * 0x264 represents the offset of padconf register of 597 * 0x264 represents the offset of padconf register of
600 * gpio3_22 from am43xx_pinmux base. 598 * gpio3_22 from am43xx_pinmux base.
601 */ 599 */
602 interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>, 600 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
603 <&am43xx_pinmux 0x264>; 601 <&am43xx_pinmux 0x264>;
604 interrupt-names = "tsc", "wakeup"; 602 interrupt-names = "tsc", "wakeup";
605 603
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 746fd2b17958..d580e2b70f9a 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -491,7 +491,7 @@
491 pinctrl-0 = <&pixcir_ts_pins>; 491 pinctrl-0 = <&pixcir_ts_pins>;
492 reg = <0x5c>; 492 reg = <0x5c>;
493 interrupt-parent = <&gpio1>; 493 interrupt-parent = <&gpio1>;
494 interrupts = <17 0>; 494 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
495 495
496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>; 496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
497 497
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 36c0fa6c362a..a0986c65be0c 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -173,6 +173,8 @@
173 173
174 sound0_master: simple-audio-card,codec { 174 sound0_master: simple-audio-card,codec {
175 sound-dai = <&tlv320aic3104>; 175 sound-dai = <&tlv320aic3104>;
176 assigned-clocks = <&clkoutmux2_clk_mux>;
177 assigned-clock-parents = <&sys_clk2_dclk_div>;
176 clocks = <&clkout2_clk>; 178 clocks = <&clkout2_clk>;
177 }; 179 };
178 }; 180 };
@@ -796,6 +798,8 @@
796 pinctrl-names = "default", "sleep"; 798 pinctrl-names = "default", "sleep";
797 pinctrl-0 = <&mcasp3_pins_default>; 799 pinctrl-0 = <&mcasp3_pins_default>;
798 pinctrl-1 = <&mcasp3_pins_sleep>; 800 pinctrl-1 = <&mcasp3_pins_sleep>;
801 assigned-clocks = <&mcasp3_ahclkx_mux>;
802 assigned-clock-parents = <&sys_clkin2>;
799 status = "okay"; 803 status = "okay";
800 804
801 op-mode = <0>; /* MCASP_IIS_MODE */ 805 op-mode = <0>; /* MCASP_IIS_MODE */
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index c53882643ae9..1c06cb76da07 100644
--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -167,7 +167,7 @@
167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
171 >; 171 >;
172 }; 172 };
173 173
@@ -492,14 +492,14 @@
492 pinctrl-names = "default"; 492 pinctrl-names = "default";
493 pinctrl-0 = <&qspi1_pins>; 493 pinctrl-0 = <&qspi1_pins>;
494 494
495 spi-max-frequency = <20000000>; 495 spi-max-frequency = <48000000>;
496 496
497 spi_flash: spi_flash@0 { 497 spi_flash: spi_flash@0 {
498 #address-cells = <1>; 498 #address-cells = <1>;
499 #size-cells = <1>; 499 #size-cells = <1>;
500 compatible = "spansion,m25p80", "jedec,spi-nor"; 500 compatible = "spansion,m25p80", "jedec,spi-nor";
501 reg = <0>; /* CS0 */ 501 reg = <0>; /* CS0 */
502 spi-max-frequency = <20000000>; 502 spi-max-frequency = <48000000>;
503 503
504 partition@0 { 504 partition@0 {
505 label = "uboot"; 505 label = "uboot";
@@ -545,7 +545,7 @@
545 ti,debounce-tol = /bits/ 16 <10>; 545 ti,debounce-tol = /bits/ 16 <10>;
546 ti,debounce-rep = /bits/ 16 <1>; 546 ti,debounce-rep = /bits/ 16 <1>;
547 547
548 linux,wakeup; 548 wakeup-source;
549 }; 549 };
550}; 550};
551 551
@@ -559,13 +559,13 @@
559 559
560&cpsw_emac0 { 560&cpsw_emac0 {
561 phy_id = <&davinci_mdio>, <0>; 561 phy_id = <&davinci_mdio>, <0>;
562 phy-mode = "rgmii"; 562 phy-mode = "rgmii-txid";
563 dual_emac_res_vlan = <0>; 563 dual_emac_res_vlan = <0>;
564}; 564};
565 565
566&cpsw_emac1 { 566&cpsw_emac1 {
567 phy_id = <&davinci_mdio>, <1>; 567 phy_id = <&davinci_mdio>, <1>;
568 phy-mode = "rgmii"; 568 phy-mode = "rgmii-txid";
569 dual_emac_res_vlan = <1>; 569 dual_emac_res_vlan = <1>;
570}; 570};
571 571
@@ -588,7 +588,7 @@
588}; 588};
589 589
590&usb2 { 590&usb2 {
591 dr_mode = "peripheral"; 591 dr_mode = "host";
592}; 592};
593 593
594&mcasp3 { 594&mcasp3 {
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
index 77bb8e17401a..988e99632d49 100644
--- a/arch/arm/boot/dts/am57xx-sbc-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
@@ -25,8 +25,8 @@
25&dra7_pmx_core { 25&dra7_pmx_core {
26 uart3_pins_default: uart3_pins_default { 26 uart3_pins_default: uart3_pins_default {
27 pinctrl-single,pins = < 27 pinctrl-single,pins = <
28 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ 28 DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
29 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ 29 DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
30 >; 30 >;
31 }; 31 };
32 32
@@ -108,9 +108,9 @@
108 pinctrl-0 = <&i2c5_pins_default>; 108 pinctrl-0 = <&i2c5_pins_default>;
109 clock-frequency = <400000>; 109 clock-frequency = <400000>;
110 110
111 eeprom_base: atmel@50 { 111 eeprom_base: atmel@54 {
112 compatible = "atmel,24c08"; 112 compatible = "atmel,24c08";
113 reg = <0x50>; 113 reg = <0x54>;
114 pagesize = <16>; 114 pagesize = <16>;
115 }; 115 };
116 116
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 13cf69a8d0fb..fb9e1bbf2338 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -152,6 +152,7 @@
152 nand-on-flash-bbt; 152 nand-on-flash-bbt;
153 153
154 partitions { 154 partitions {
155 compatible = "fixed-partitions";
155 #address-cells = <1>; 156 #address-cells = <1>;
156 #size-cells = <1>; 157 #size-cells = <1>;
157 158
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 77ddff036409..e683856c507c 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -114,9 +114,15 @@
114 114
115 macb0: ethernet@f8008000 { 115 macb0: ethernet@f8008000 {
116 pinctrl-names = "default"; 116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_macb0_default>; 117 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
118 phy-mode = "rmii"; 118 phy-mode = "rmii";
119 status = "okay"; 119 status = "okay";
120
121 ethernet-phy@1 {
122 reg = <0x1>;
123 interrupt-parent = <&pioA>;
124 interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
125 };
120 }; 126 };
121 127
122 pdmic@f8018000 { 128 pdmic@f8018000 {
@@ -300,6 +306,10 @@
300 bias-disable; 306 bias-disable;
301 }; 307 };
302 308
309 pinctrl_macb0_phy_irq: macb0_phy_irq {
310 pinmux = <PIN_PC9__GPIO>;
311 };
312
303 pinctrl_pdmic_default: pdmic_default { 313 pinctrl_pdmic_default: pdmic_default {
304 pinmux = <PIN_PB26__PDMIC_DAT>, 314 pinmux = <PIN_PB26__PDMIC_DAT>,
305 <PIN_PB27__PDMIC_CLK>; 315 <PIN_PB27__PDMIC_CLK>;
diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
index 131614f28e75..569026e8f96c 100644
--- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
@@ -86,10 +86,12 @@
86 macb0: ethernet@f8020000 { 86 macb0: ethernet@f8020000 {
87 phy-mode = "rmii"; 87 phy-mode = "rmii";
88 status = "okay"; 88 status = "okay";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
89 91
90 phy0: ethernet-phy@1 { 92 phy0: ethernet-phy@1 {
91 interrupt-parent = <&pioE>; 93 interrupt-parent = <&pioE>;
92 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 94 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
93 reg = <1>; 95 reg = <1>;
94 }; 96 };
95 }; 97 };
@@ -152,6 +154,10 @@
152 atmel,pins = 154 atmel,pins =
153 <AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 155 <AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
154 }; 156 };
157 pinctrl_macb0_phy_irq: macb0_phy_irq_0 {
158 atmel,pins =
159 <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
160 };
155 }; 161 };
156 }; 162 };
157 }; 163 };
diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 2d4a33100af6..4e98cda97403 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -160,8 +160,15 @@
160 }; 160 };
161 161
162 macb0: ethernet@f8020000 { 162 macb0: ethernet@f8020000 {
163 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
163 phy-mode = "rmii"; 164 phy-mode = "rmii";
164 status = "okay"; 165 status = "okay";
166
167 ethernet-phy@1 {
168 reg = <0x1>;
169 interrupt-parent = <&pioE>;
170 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
171 };
165 }; 172 };
166 173
167 mmc1: mmc@fc000000 { 174 mmc1: mmc@fc000000 {
@@ -193,6 +200,10 @@
193 200
194 pinctrl@fc06a000 { 201 pinctrl@fc06a000 {
195 board { 202 board {
203 pinctrl_macb0_phy_irq: macb0_phy_irq {
204 atmel,pins =
205 <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
206 };
196 pinctrl_mmc0_cd: mmc0_cd { 207 pinctrl_mmc0_cd: mmc0_cd {
197 atmel,pins = 208 atmel,pins =
198 <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 209 <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index ca4ddf86817a..626c67d66626 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -215,7 +215,7 @@
215 }; 215 };
216 216
217 panel: panel { 217 panel: panel {
218 compatible = "qd,qd43003c0-40", "simple-panel"; 218 compatible = "qiaodian,qd43003c0-40", "simple-panel";
219 backlight = <&backlight>; 219 backlight = <&backlight>;
220 power-supply = <&panel_reg>; 220 power-supply = <&panel_reg>;
221 #address-cells = <1>; 221 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 4f6ae921656f..f74d3db4846d 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -896,7 +896,6 @@
896 #size-cells = <1>; 896 #size-cells = <1>;
897 reg = <0x2100000 0x10000>; 897 reg = <0x2100000 0x10000>;
898 ranges = <0 0x2100000 0x10000>; 898 ranges = <0 0x2100000 0x10000>;
899 interrupt-parent = <&intc>;
900 clocks = <&clks IMX6QDL_CLK_CAAM_MEM>, 899 clocks = <&clks IMX6QDL_CLK_CAAM_MEM>,
901 <&clks IMX6QDL_CLK_CAAM_ACLK>, 900 <&clks IMX6QDL_CLK_CAAM_ACLK>,
902 <&clks IMX6QDL_CLK_CAAM_IPG>, 901 <&clks IMX6QDL_CLK_CAAM_IPG>,
diff --git a/arch/arm/boot/dts/kirkwood-ds112.dts b/arch/arm/boot/dts/kirkwood-ds112.dts
index bf4143c6cb8f..b84af3da8c84 100644
--- a/arch/arm/boot/dts/kirkwood-ds112.dts
+++ b/arch/arm/boot/dts/kirkwood-ds112.dts
@@ -14,7 +14,7 @@
14#include "kirkwood-synology.dtsi" 14#include "kirkwood-synology.dtsi"
15 15
16/ { 16/ {
17 model = "Synology DS111"; 17 model = "Synology DS112";
18 compatible = "synology,ds111", "marvell,kirkwood"; 18 compatible = "synology,ds111", "marvell,kirkwood";
19 19
20 memory { 20 memory {
diff --git a/arch/arm/boot/dts/kirkwood-lswvl.dts b/arch/arm/boot/dts/kirkwood-lswvl.dts
index 09eed3cea0af..36eec7392ab4 100644
--- a/arch/arm/boot/dts/kirkwood-lswvl.dts
+++ b/arch/arm/boot/dts/kirkwood-lswvl.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree file for Buffalo Linkstation LS-WVL/VL 2 * Device Tree file for Buffalo Linkstation LS-WVL/VL
3 * 3 *
4 * Copyright (C) 2015, rogershimizu@gmail.com 4 * Copyright (C) 2015, 2016
5 * Roger Shimizu <rogershimizu@gmail.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -156,21 +157,21 @@
156 button@1 { 157 button@1 {
157 label = "Function Button"; 158 label = "Function Button";
158 linux,code = <KEY_OPTION>; 159 linux,code = <KEY_OPTION>;
159 gpios = <&gpio0 45 GPIO_ACTIVE_LOW>; 160 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
160 }; 161 };
161 162
162 button@2 { 163 button@2 {
163 label = "Power-on Switch"; 164 label = "Power-on Switch";
164 linux,code = <KEY_RESERVED>; 165 linux,code = <KEY_RESERVED>;
165 linux,input-type = <5>; 166 linux,input-type = <5>;
166 gpios = <&gpio0 46 GPIO_ACTIVE_LOW>; 167 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
167 }; 168 };
168 169
169 button@3 { 170 button@3 {
170 label = "Power-auto Switch"; 171 label = "Power-auto Switch";
171 linux,code = <KEY_ESC>; 172 linux,code = <KEY_ESC>;
172 linux,input-type = <5>; 173 linux,input-type = <5>;
173 gpios = <&gpio0 47 GPIO_ACTIVE_LOW>; 174 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
174 }; 175 };
175 }; 176 };
176 177
@@ -185,38 +186,38 @@
185 186
186 led@1 { 187 led@1 {
187 label = "lswvl:red:alarm"; 188 label = "lswvl:red:alarm";
188 gpios = <&gpio0 36 GPIO_ACTIVE_LOW>; 189 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
189 }; 190 };
190 191
191 led@2 { 192 led@2 {
192 label = "lswvl:red:func"; 193 label = "lswvl:red:func";
193 gpios = <&gpio0 37 GPIO_ACTIVE_LOW>; 194 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
194 }; 195 };
195 196
196 led@3 { 197 led@3 {
197 label = "lswvl:amber:info"; 198 label = "lswvl:amber:info";
198 gpios = <&gpio0 38 GPIO_ACTIVE_LOW>; 199 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
199 }; 200 };
200 201
201 led@4 { 202 led@4 {
202 label = "lswvl:blue:func"; 203 label = "lswvl:blue:func";
203 gpios = <&gpio0 39 GPIO_ACTIVE_LOW>; 204 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
204 }; 205 };
205 206
206 led@5 { 207 led@5 {
207 label = "lswvl:blue:power"; 208 label = "lswvl:blue:power";
208 gpios = <&gpio0 40 GPIO_ACTIVE_LOW>; 209 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
209 default-state = "keep"; 210 default-state = "keep";
210 }; 211 };
211 212
212 led@6 { 213 led@6 {
213 label = "lswvl:red:hdderr0"; 214 label = "lswvl:red:hdderr0";
214 gpios = <&gpio0 34 GPIO_ACTIVE_LOW>; 215 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
215 }; 216 };
216 217
217 led@7 { 218 led@7 {
218 label = "lswvl:red:hdderr1"; 219 label = "lswvl:red:hdderr1";
219 gpios = <&gpio0 35 GPIO_ACTIVE_LOW>; 220 gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
220 }; 221 };
221 }; 222 };
222 223
@@ -233,7 +234,7 @@
233 3250 1 234 3250 1
234 5000 0>; 235 5000 0>;
235 236
236 alarm-gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>; 237 alarm-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
237 }; 238 };
238 239
239 restart_poweroff { 240 restart_poweroff {
diff --git a/arch/arm/boot/dts/kirkwood-lswxl.dts b/arch/arm/boot/dts/kirkwood-lswxl.dts
index f5db16a08597..b13ec20a7088 100644
--- a/arch/arm/boot/dts/kirkwood-lswxl.dts
+++ b/arch/arm/boot/dts/kirkwood-lswxl.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree file for Buffalo Linkstation LS-WXL/WSXL 2 * Device Tree file for Buffalo Linkstation LS-WXL/WSXL
3 * 3 *
4 * Copyright (C) 2015, rogershimizu@gmail.com 4 * Copyright (C) 2015, 2016
5 * Roger Shimizu <rogershimizu@gmail.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -156,21 +157,21 @@
156 button@1 { 157 button@1 {
157 label = "Function Button"; 158 label = "Function Button";
158 linux,code = <KEY_OPTION>; 159 linux,code = <KEY_OPTION>;
159 gpios = <&gpio1 41 GPIO_ACTIVE_LOW>; 160 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
160 }; 161 };
161 162
162 button@2 { 163 button@2 {
163 label = "Power-on Switch"; 164 label = "Power-on Switch";
164 linux,code = <KEY_RESERVED>; 165 linux,code = <KEY_RESERVED>;
165 linux,input-type = <5>; 166 linux,input-type = <5>;
166 gpios = <&gpio1 42 GPIO_ACTIVE_LOW>; 167 gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
167 }; 168 };
168 169
169 button@3 { 170 button@3 {
170 label = "Power-auto Switch"; 171 label = "Power-auto Switch";
171 linux,code = <KEY_ESC>; 172 linux,code = <KEY_ESC>;
172 linux,input-type = <5>; 173 linux,input-type = <5>;
173 gpios = <&gpio1 43 GPIO_ACTIVE_LOW>; 174 gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
174 }; 175 };
175 }; 176 };
176 177
@@ -185,12 +186,12 @@
185 186
186 led@1 { 187 led@1 {
187 label = "lswxl:blue:func"; 188 label = "lswxl:blue:func";
188 gpios = <&gpio1 36 GPIO_ACTIVE_LOW>; 189 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
189 }; 190 };
190 191
191 led@2 { 192 led@2 {
192 label = "lswxl:red:alarm"; 193 label = "lswxl:red:alarm";
193 gpios = <&gpio1 49 GPIO_ACTIVE_LOW>; 194 gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
194 }; 195 };
195 196
196 led@3 { 197 led@3 {
@@ -200,23 +201,23 @@
200 201
201 led@4 { 202 led@4 {
202 label = "lswxl:blue:power"; 203 label = "lswxl:blue:power";
203 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 204 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
205 default-state = "keep";
204 }; 206 };
205 207
206 led@5 { 208 led@5 {
207 label = "lswxl:red:func"; 209 label = "lswxl:red:func";
208 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; 210 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
209 default-state = "keep";
210 }; 211 };
211 212
212 led@6 { 213 led@6 {
213 label = "lswxl:red:hdderr0"; 214 label = "lswxl:red:hdderr0";
214 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 215 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
215 }; 216 };
216 217
217 led@7 { 218 led@7 {
218 label = "lswxl:red:hdderr1"; 219 label = "lswxl:red:hdderr1";
219 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 220 gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
220 }; 221 };
221 }; 222 };
222 223
@@ -225,15 +226,15 @@
225 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>; 226 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
226 pinctrl-names = "default"; 227 pinctrl-names = "default";
227 228
228 gpios = <&gpio0 47 GPIO_ACTIVE_LOW 229 gpios = <&gpio1 16 GPIO_ACTIVE_LOW
229 &gpio0 48 GPIO_ACTIVE_LOW>; 230 &gpio1 15 GPIO_ACTIVE_LOW>;
230 231
231 gpio-fan,speed-map = <0 3 232 gpio-fan,speed-map = <0 3
232 1500 2 233 1500 2
233 3250 1 234 3250 1
234 5000 0>; 235 5000 0>;
235 236
236 alarm-gpios = <&gpio1 49 GPIO_ACTIVE_HIGH>; 237 alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
237 }; 238 };
238 239
239 restart_poweroff { 240 restart_poweroff {
@@ -256,7 +257,7 @@
256 enable-active-high; 257 enable-active-high;
257 regulator-always-on; 258 regulator-always-on;
258 regulator-boot-on; 259 regulator-boot-on;
259 gpio = <&gpio0 37 GPIO_ACTIVE_HIGH>; 260 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
260 }; 261 };
261 hdd_power0: regulator@2 { 262 hdd_power0: regulator@2 {
262 compatible = "regulator-fixed"; 263 compatible = "regulator-fixed";
diff --git a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
index 1db6f2c506cc..8082d64266a3 100644
--- a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
+++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
@@ -131,6 +131,7 @@
131 chip-delay = <40>; 131 chip-delay = <40>;
132 status = "okay"; 132 status = "okay";
133 partitions { 133 partitions {
134 compatible = "fixed-partitions";
134 #address-cells = <1>; 135 #address-cells = <1>;
135 #size-cells = <1>; 136 #size-cells = <1>;
136 137
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 7fed0bd4f3de..00805322367e 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -112,14 +112,6 @@
112 clock-frequency = <400000>; 112 clock-frequency = <400000>;
113}; 113};
114 114
115&i2c2 {
116 clock-frequency = <400000>;
117};
118
119&i2c3 {
120 clock-frequency = <400000>;
121};
122
123/* 115/*
124 * Only found on the wireless SOM. For the SOM without wireless, the pins for 116 * Only found on the wireless SOM. For the SOM without wireless, the pins for
125 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and 117 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
@@ -143,6 +135,7 @@
143 interrupt-parent = <&gpio5>; 135 interrupt-parent = <&gpio5>;
144 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 136 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
145 ref-clock-frequency = <26000000>; 137 ref-clock-frequency = <26000000>;
138 tcxo-clock-frequency = <26000000>;
146 }; 139 };
147}; 140};
148 141
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index 888412c63f97..902657d6713b 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -130,6 +130,16 @@
130 }; 130 };
131}; 131};
132 132
133&gpio8 {
134 /* TI trees use GPIO instead of msecure, see also muxing */
135 p234 {
136 gpio-hog;
137 gpios = <10 GPIO_ACTIVE_HIGH>;
138 output-high;
139 line-name = "gpio8_234/msecure";
140 };
141};
142
133&omap5_pmx_core { 143&omap5_pmx_core {
134 pinctrl-names = "default"; 144 pinctrl-names = "default";
135 pinctrl-0 = < 145 pinctrl-0 = <
@@ -213,6 +223,13 @@
213 >; 223 >;
214 }; 224 };
215 225
226 /* TI trees use GPIO mode; msecure mode does not work reliably? */
227 palmas_msecure_pins: palmas_msecure_pins {
228 pinctrl-single,pins = <
229 OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
230 >;
231 };
232
216 usbhost_pins: pinmux_usbhost_pins { 233 usbhost_pins: pinmux_usbhost_pins {
217 pinctrl-single,pins = < 234 pinctrl-single,pins = <
218 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */ 235 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
@@ -278,6 +295,12 @@
278 &usbhost_wkup_pins 295 &usbhost_wkup_pins
279 >; 296 >;
280 297
298 palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
299 pinctrl-single,pins = <
300 OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
301 >;
302 };
303
281 usbhost_wkup_pins: pinmux_usbhost_wkup_pins { 304 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
282 pinctrl-single,pins = < 305 pinctrl-single,pins = <
283 OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */ 306 OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
@@ -345,6 +368,8 @@
345 interrupt-controller; 368 interrupt-controller;
346 #interrupt-cells = <2>; 369 #interrupt-cells = <2>;
347 ti,system-power-controller; 370 ti,system-power-controller;
371 pinctrl-names = "default";
372 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
348 373
349 extcon_usb3: palmas_usb { 374 extcon_usb3: palmas_usb {
350 compatible = "ti,palmas-usb-vid"; 375 compatible = "ti,palmas-usb-vid";
@@ -358,6 +383,14 @@
358 #clock-cells = <0>; 383 #clock-cells = <0>;
359 }; 384 };
360 385
386 rtc {
387 compatible = "ti,palmas-rtc";
388 interrupt-parent = <&palmas>;
389 interrupts = <8 IRQ_TYPE_NONE>;
390 ti,backup-battery-chargeable;
391 ti,backup-battery-charge-high-current;
392 };
393
361 palmas_pmic { 394 palmas_pmic {
362 compatible = "ti,palmas-pmic"; 395 compatible = "ti,palmas-pmic";
363 interrupt-parent = <&palmas>; 396 interrupt-parent = <&palmas>;
diff --git a/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts b/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
index 3daec912b4bf..aae8a7aceab7 100644
--- a/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
+++ b/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree file for Buffalo Linkstation LS-WTGL 2 * Device Tree file for Buffalo Linkstation LS-WTGL
3 * 3 *
4 * Copyright (C) 2015, Roger Shimizu <rogershimizu@gmail.com> 4 * Copyright (C) 2015, 2016
5 * Roger Shimizu <rogershimizu@gmail.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -69,8 +70,6 @@
69 70
70 internal-regs { 71 internal-regs {
71 pinctrl: pinctrl@10000 { 72 pinctrl: pinctrl@10000 {
72 pinctrl-0 = <&pmx_usb_power &pmx_power_hdd
73 &pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
74 pinctrl-names = "default"; 73 pinctrl-names = "default";
75 74
76 pmx_led_power: pmx-leds { 75 pmx_led_power: pmx-leds {
@@ -162,6 +161,7 @@
162 led@1 { 161 led@1 {
163 label = "lswtgl:blue:power"; 162 label = "lswtgl:blue:power";
164 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 163 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
164 default-state = "keep";
165 }; 165 };
166 166
167 led@2 { 167 led@2 {
@@ -188,7 +188,7 @@
188 3250 1 188 3250 1
189 5000 0>; 189 5000 0>;
190 190
191 alarm-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; 191 alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
192 }; 192 };
193 193
194 restart_poweroff { 194 restart_poweroff {
@@ -228,6 +228,37 @@
228 }; 228 };
229}; 229};
230 230
231&devbus_bootcs {
232 status = "okay";
233 devbus,keep-config;
234
235 flash@0 {
236 compatible = "jedec-flash";
237 reg = <0 0x40000>;
238 bank-width = <1>;
239
240 partitions {
241 compatible = "fixed-partitions";
242 #address-cells = <1>;
243 #size-cells = <1>;
244
245 header@0 {
246 reg = <0 0x30000>;
247 read-only;
248 };
249
250 uboot@30000 {
251 reg = <0x30000 0xF000>;
252 read-only;
253 };
254
255 uboot_env@3F000 {
256 reg = <0x3F000 0x1000>;
257 };
258 };
259 };
260};
261
231&mdio { 262&mdio {
232 status = "okay"; 263 status = "okay";
233 264
diff --git a/arch/arm/boot/dts/sama5d2-pinfunc.h b/arch/arm/boot/dts/sama5d2-pinfunc.h
index 1afe24629d1f..b0c912feaa2f 100644
--- a/arch/arm/boot/dts/sama5d2-pinfunc.h
+++ b/arch/arm/boot/dts/sama5d2-pinfunc.h
@@ -90,7 +90,7 @@
90#define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2) 90#define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2)
91#define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1) 91#define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1)
92#define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2) 92#define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2)
93#define PIN_PA15 14 93#define PIN_PA15 15
94#define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0) 94#define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0)
95#define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1) 95#define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1)
96#define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1) 96#define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1)
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index b8032bca4621..db1151c18466 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1342,7 +1342,7 @@
1342 dbgu: serial@fc069000 { 1342 dbgu: serial@fc069000 {
1343 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 1343 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
1344 reg = <0xfc069000 0x200>; 1344 reg = <0xfc069000 0x200>;
1345 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 1345 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
1346 pinctrl-names = "default"; 1346 pinctrl-names = "default";
1347 pinctrl-0 = <&pinctrl_dbgu>; 1347 pinctrl-0 = <&pinctrl_dbgu>;
1348 clocks = <&dbgu_clk>; 1348 clocks = <&dbgu_clk>;
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index d0c743853318..27a333eb8987 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -127,22 +127,14 @@
127 }; 127 };
128 mmcsd_default_mode: mmcsd_default { 128 mmcsd_default_mode: mmcsd_default {
129 mmcsd_default_cfg1 { 129 mmcsd_default_cfg1 {
130 /* MCCLK */ 130 /*
131 pins = "GPIO8_B10"; 131 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
132 ste,output = <0>; 132 * MCCMD, MCDAT3-0, MCMSFBCLK
133 }; 133 */
134 mmcsd_default_cfg2 { 134 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
135 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */ 135 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
136 pins = "GPIO10_C11", "GPIO15_A12", 136 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
137 "GPIO16_C13", "GPIO23_D15"; 137 ste,output = <2>;
138 ste,output = <1>;
139 };
140 mmcsd_default_cfg3 {
141 /* MCCMD, MCDAT3-0, MCMSFBCLK */
142 pins = "GPIO9_A10", "GPIO11_B11",
143 "GPIO12_A11", "GPIO13_C12",
144 "GPIO14_B12", "GPIO24_C15";
145 ste,input = <1>;
146 }; 138 };
147 }; 139 };
148 }; 140 };
@@ -802,10 +794,21 @@
802 clock-names = "mclk", "apb_pclk"; 794 clock-names = "mclk", "apb_pclk";
803 interrupt-parent = <&vica>; 795 interrupt-parent = <&vica>;
804 interrupts = <22>; 796 interrupts = <22>;
805 max-frequency = <48000000>; 797 max-frequency = <400000>;
806 bus-width = <4>; 798 bus-width = <4>;
807 cap-mmc-highspeed; 799 cap-mmc-highspeed;
808 cap-sd-highspeed; 800 cap-sd-highspeed;
801 full-pwr-cycle;
802 /*
803 * The STw4811 circuit used with the Nomadik strictly
804 * requires that all of these signal direction pins be
805 * routed and used for its 4-bit levelshifter.
806 */
807 st,sig-dir-dat0;
808 st,sig-dir-dat2;
809 st,sig-dir-dat31;
810 st,sig-dir-cmd;
811 st,sig-pin-fbclk;
809 pinctrl-names = "default"; 812 pinctrl-names = "default";
810 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; 813 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
811 vmmc-supply = <&vmmc_regulator>; 814 vmmc-supply = <&vmmc_regulator>;
diff --git a/arch/arm/boot/dts/tps65217.dtsi b/arch/arm/boot/dts/tps65217.dtsi
new file mode 100644
index 000000000000..a63272422d76
--- /dev/null
+++ b/arch/arm/boot/dts/tps65217.dtsi
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Integrated Power Management Chip
11 * http://www.ti.com/lit/ds/symlink/tps65217.pdf
12 */
13
14&tps {
15 compatible = "ti,tps65217";
16
17 regulators {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 dcdc1_reg: regulator@0 {
22 reg = <0>;
23 regulator-compatible = "dcdc1";
24 };
25
26 dcdc2_reg: regulator@1 {
27 reg = <1>;
28 regulator-compatible = "dcdc2";
29 };
30
31 dcdc3_reg: regulator@2 {
32 reg = <2>;
33 regulator-compatible = "dcdc3";
34 };
35
36 ldo1_reg: regulator@3 {
37 reg = <3>;
38 regulator-compatible = "ldo1";
39 };
40
41 ldo2_reg: regulator@4 {
42 reg = <4>;
43 regulator-compatible = "ldo2";
44 };
45
46 ldo3_reg: regulator@5 {
47 reg = <5>;
48 regulator-compatible = "ldo3";
49 };
50
51 ldo4_reg: regulator@6 {
52 reg = <6>;
53 regulator-compatible = "ldo4";
54 };
55 };
56};
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 314f6be2dca2..8e8b2ace9b7c 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -426,6 +426,7 @@ CONFIG_SUNXI_WATCHDOG=y
426CONFIG_IMX2_WDT=y 426CONFIG_IMX2_WDT=y
427CONFIG_TEGRA_WATCHDOG=m 427CONFIG_TEGRA_WATCHDOG=m
428CONFIG_MESON_WATCHDOG=y 428CONFIG_MESON_WATCHDOG=y
429CONFIG_DW_WATCHDOG=y
429CONFIG_DIGICOLOR_WATCHDOG=y 430CONFIG_DIGICOLOR_WATCHDOG=y
430CONFIG_MFD_AS3711=y 431CONFIG_MFD_AS3711=y
431CONFIG_MFD_AS3722=y 432CONFIG_MFD_AS3722=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index c5e1943e5427..d18d6b42fcf5 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -50,6 +50,7 @@ CONFIG_SOC_AM33XX=y
50CONFIG_SOC_AM43XX=y 50CONFIG_SOC_AM43XX=y
51CONFIG_SOC_DRA7XX=y 51CONFIG_SOC_DRA7XX=y
52CONFIG_ARM_THUMBEE=y 52CONFIG_ARM_THUMBEE=y
53CONFIG_ARM_KERNMEM_PERMS=y
53CONFIG_ARM_ERRATA_411920=y 54CONFIG_ARM_ERRATA_411920=y
54CONFIG_ARM_ERRATA_430973=y 55CONFIG_ARM_ERRATA_430973=y
55CONFIG_SMP=y 56CONFIG_SMP=y
@@ -177,6 +178,7 @@ CONFIG_TI_CPTS=y
177CONFIG_AT803X_PHY=y 178CONFIG_AT803X_PHY=y
178CONFIG_SMSC_PHY=y 179CONFIG_SMSC_PHY=y
179CONFIG_USB_USBNET=m 180CONFIG_USB_USBNET=m
181CONFIG_USB_NET_SMSC75XX=m
180CONFIG_USB_NET_SMSC95XX=m 182CONFIG_USB_NET_SMSC95XX=m
181CONFIG_USB_ALI_M5632=y 183CONFIG_USB_ALI_M5632=y
182CONFIG_USB_AN2720=y 184CONFIG_USB_AN2720=y
@@ -290,24 +292,23 @@ CONFIG_FB=y
290CONFIG_FIRMWARE_EDID=y 292CONFIG_FIRMWARE_EDID=y
291CONFIG_FB_MODE_HELPERS=y 293CONFIG_FB_MODE_HELPERS=y
292CONFIG_FB_TILEBLITTING=y 294CONFIG_FB_TILEBLITTING=y
293CONFIG_OMAP2_DSS=m 295CONFIG_FB_OMAP5_DSS_HDMI=y
294CONFIG_OMAP5_DSS_HDMI=y 296CONFIG_FB_OMAP2_DSS_SDI=y
295CONFIG_OMAP2_DSS_SDI=y 297CONFIG_FB_OMAP2_DSS_DSI=y
296CONFIG_OMAP2_DSS_DSI=y
297CONFIG_FB_OMAP2=m 298CONFIG_FB_OMAP2=m
298CONFIG_DISPLAY_ENCODER_TFP410=m 299CONFIG_FB_OMAP2_ENCODER_TFP410=m
299CONFIG_DISPLAY_ENCODER_TPD12S015=m 300CONFIG_FB_OMAP2_ENCODER_TPD12S015=m
300CONFIG_DISPLAY_CONNECTOR_DVI=m 301CONFIG_FB_OMAP2_CONNECTOR_DVI=m
301CONFIG_DISPLAY_CONNECTOR_HDMI=m 302CONFIG_FB_OMAP2_CONNECTOR_HDMI=m
302CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m 303CONFIG_FB_OMAP2_CONNECTOR_ANALOG_TV=m
303CONFIG_DISPLAY_PANEL_DPI=m 304CONFIG_FB_OMAP2_PANEL_DPI=m
304CONFIG_DISPLAY_PANEL_DSI_CM=m 305CONFIG_FB_OMAP2_PANEL_DSI_CM=m
305CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m 306CONFIG_FB_OMAP2_PANEL_SONY_ACX565AKM=m
306CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m 307CONFIG_FB_OMAP2_PANEL_LGPHILIPS_LB035Q02=m
307CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m 308CONFIG_FB_OMAP2_PANEL_SHARP_LS037V7DW01=m
308CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m 309CONFIG_FB_OMAP2_PANEL_TPO_TD028TTEC1=m
309CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m 310CONFIG_FB_OMAP2_PANEL_TPO_TD043MTEA1=m
310CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m 311CONFIG_FB_OMAP2_PANEL_NEC_NL8048HL11=m
311CONFIG_BACKLIGHT_LCD_SUPPORT=y 312CONFIG_BACKLIGHT_LCD_SUPPORT=y
312CONFIG_LCD_CLASS_DEVICE=y 313CONFIG_LCD_CLASS_DEVICE=y
313CONFIG_LCD_PLATFORM=y 314CONFIG_LCD_PLATFORM=y
@@ -354,6 +355,11 @@ CONFIG_USB_MUSB_DSPS=m
354CONFIG_USB_INVENTRA_DMA=y 355CONFIG_USB_INVENTRA_DMA=y
355CONFIG_USB_TI_CPPI41_DMA=y 356CONFIG_USB_TI_CPPI41_DMA=y
356CONFIG_USB_DWC3=m 357CONFIG_USB_DWC3=m
358CONFIG_USB_SERIAL=m
359CONFIG_USB_SERIAL_GENERIC=y
360CONFIG_USB_SERIAL_SIMPLE=m
361CONFIG_USB_SERIAL_FTDI_SIO=m
362CONFIG_USB_SERIAL_PL2303=m
357CONFIG_USB_TEST=m 363CONFIG_USB_TEST=m
358CONFIG_AM335X_PHY_USB=y 364CONFIG_AM335X_PHY_USB=y
359CONFIG_USB_GADGET=m 365CONFIG_USB_GADGET=m
@@ -387,6 +393,7 @@ CONFIG_NEW_LEDS=y
387CONFIG_LEDS_CLASS=m 393CONFIG_LEDS_CLASS=m
388CONFIG_LEDS_GPIO=m 394CONFIG_LEDS_GPIO=m
389CONFIG_LEDS_PWM=m 395CONFIG_LEDS_PWM=m
396CONFIG_LEDS_PCA963X=m
390CONFIG_LEDS_TRIGGERS=y 397CONFIG_LEDS_TRIGGERS=y
391CONFIG_LEDS_TRIGGER_TIMER=m 398CONFIG_LEDS_TRIGGER_TIMER=m
392CONFIG_LEDS_TRIGGER_ONESHOT=m 399CONFIG_LEDS_TRIGGER_ONESHOT=m
@@ -449,6 +456,8 @@ CONFIG_NLS_CODEPAGE_437=y
449CONFIG_NLS_ISO8859_1=y 456CONFIG_NLS_ISO8859_1=y
450CONFIG_PRINTK_TIME=y 457CONFIG_PRINTK_TIME=y
451CONFIG_DEBUG_INFO=y 458CONFIG_DEBUG_INFO=y
459CONFIG_DEBUG_INFO_SPLIT=y
460CONFIG_DEBUG_INFO_DWARF4=y
452CONFIG_MAGIC_SYSRQ=y 461CONFIG_MAGIC_SYSRQ=y
453CONFIG_SCHEDSTATS=y 462CONFIG_SCHEDSTATS=y
454CONFIG_TIMER_STATS=y 463CONFIG_TIMER_STATS=y
diff --git a/arch/arm/crypto/aes-ce-glue.c b/arch/arm/crypto/aes-ce-glue.c
index b445a5d56f43..89a3a3e592d6 100644
--- a/arch/arm/crypto/aes-ce-glue.c
+++ b/arch/arm/crypto/aes-ce-glue.c
@@ -364,7 +364,7 @@ static struct crypto_alg aes_algs[] = { {
364 .cra_blkcipher = { 364 .cra_blkcipher = {
365 .min_keysize = AES_MIN_KEY_SIZE, 365 .min_keysize = AES_MIN_KEY_SIZE,
366 .max_keysize = AES_MAX_KEY_SIZE, 366 .max_keysize = AES_MAX_KEY_SIZE,
367 .ivsize = AES_BLOCK_SIZE, 367 .ivsize = 0,
368 .setkey = ce_aes_setkey, 368 .setkey = ce_aes_setkey,
369 .encrypt = ecb_encrypt, 369 .encrypt = ecb_encrypt,
370 .decrypt = ecb_decrypt, 370 .decrypt = ecb_decrypt,
@@ -441,7 +441,7 @@ static struct crypto_alg aes_algs[] = { {
441 .cra_ablkcipher = { 441 .cra_ablkcipher = {
442 .min_keysize = AES_MIN_KEY_SIZE, 442 .min_keysize = AES_MIN_KEY_SIZE,
443 .max_keysize = AES_MAX_KEY_SIZE, 443 .max_keysize = AES_MAX_KEY_SIZE,
444 .ivsize = AES_BLOCK_SIZE, 444 .ivsize = 0,
445 .setkey = ablk_set_key, 445 .setkey = ablk_set_key,
446 .encrypt = ablk_encrypt, 446 .encrypt = ablk_encrypt,
447 .decrypt = ablk_decrypt, 447 .decrypt = ablk_decrypt,
diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h
index 7da5503c0591..e08d15184056 100644
--- a/arch/arm/include/asm/arch_gicv3.h
+++ b/arch/arm/include/asm/arch_gicv3.h
@@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void)
117 u32 irqstat; 117 u32 irqstat;
118 118
119 asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); 119 asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat));
120 dsb(sy);
120 return irqstat; 121 return irqstat;
121} 122}
122 123
diff --git a/arch/arm/include/asm/xen/page-coherent.h b/arch/arm/include/asm/xen/page-coherent.h
index 0375c8caa061..9408a994cc91 100644
--- a/arch/arm/include/asm/xen/page-coherent.h
+++ b/arch/arm/include/asm/xen/page-coherent.h
@@ -35,14 +35,21 @@ static inline void xen_dma_map_page(struct device *hwdev, struct page *page,
35 dma_addr_t dev_addr, unsigned long offset, size_t size, 35 dma_addr_t dev_addr, unsigned long offset, size_t size,
36 enum dma_data_direction dir, struct dma_attrs *attrs) 36 enum dma_data_direction dir, struct dma_attrs *attrs)
37{ 37{
38 bool local = XEN_PFN_DOWN(dev_addr) == page_to_xen_pfn(page); 38 unsigned long page_pfn = page_to_xen_pfn(page);
39 unsigned long dev_pfn = XEN_PFN_DOWN(dev_addr);
40 unsigned long compound_pages =
41 (1<<compound_order(page)) * XEN_PFN_PER_PAGE;
42 bool local = (page_pfn <= dev_pfn) &&
43 (dev_pfn - page_pfn < compound_pages);
44
39 /* 45 /*
40 * Dom0 is mapped 1:1, while the Linux page can be spanned accross 46 * Dom0 is mapped 1:1, while the Linux page can span across
41 * multiple Xen page, it's not possible to have a mix of local and 47 * multiple Xen pages, it's not possible for it to contain a
42 * foreign Xen page. So if the first xen_pfn == mfn the page is local 48 * mix of local and foreign Xen pages. So if the first xen_pfn
43 * otherwise it's a foreign page grant-mapped in dom0. If the page is 49 * == mfn the page is local otherwise it's a foreign page
44 * local we can safely call the native dma_ops function, otherwise we 50 * grant-mapped in dom0. If the page is local we can safely
45 * call the xen specific function. 51 * call the native dma_ops function, otherwise we call the xen
52 * specific function.
46 */ 53 */
47 if (local) 54 if (local)
48 __generic_dma_ops(hwdev)->map_page(hwdev, page, offset, size, dir, attrs); 55 __generic_dma_ops(hwdev)->map_page(hwdev, page, offset, size, dir, attrs);
diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
index 5fa69d7bae58..99361f11354a 100644
--- a/arch/arm/kvm/guest.c
+++ b/arch/arm/kvm/guest.c
@@ -161,7 +161,7 @@ static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
161 u64 val; 161 u64 val;
162 162
163 val = kvm_arm_timer_get_reg(vcpu, reg->id); 163 val = kvm_arm_timer_get_reg(vcpu, reg->id);
164 return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)); 164 return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
165} 165}
166 166
167static unsigned long num_core_regs(void) 167static unsigned long num_core_regs(void)
diff --git a/arch/arm/kvm/mmio.c b/arch/arm/kvm/mmio.c
index 7f33b2056ae6..0f6600f05137 100644
--- a/arch/arm/kvm/mmio.c
+++ b/arch/arm/kvm/mmio.c
@@ -206,7 +206,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
206 run->mmio.is_write = is_write; 206 run->mmio.is_write = is_write;
207 run->mmio.phys_addr = fault_ipa; 207 run->mmio.phys_addr = fault_ipa;
208 run->mmio.len = len; 208 run->mmio.len = len;
209 memcpy(run->mmio.data, data_buf, len); 209 if (is_write)
210 memcpy(run->mmio.data, data_buf, len);
210 211
211 if (!ret) { 212 if (!ret) {
212 /* We handled the access successfully in the kernel. */ 213 /* We handled the access successfully in the kernel. */
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 809827265fb3..bab814d2f37d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -18,6 +18,7 @@
18 18
19#include <asm/setup.h> 19#include <asm/setup.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/system_info.h>
21 22
22#include "common.h" 23#include "common.h"
23 24
@@ -77,12 +78,31 @@ static const char *const n900_boards_compat[] __initconst = {
77 NULL, 78 NULL,
78}; 79};
79 80
81/* Set system_rev from atags */
82static void __init rx51_set_system_rev(const struct tag *tags)
83{
84 const struct tag *tag;
85
86 if (tags->hdr.tag != ATAG_CORE)
87 return;
88
89 for_each_tag(tag, tags) {
90 if (tag->hdr.tag == ATAG_REVISION) {
91 system_rev = tag->u.revision.rev;
92 break;
93 }
94 }
95}
96
80/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags, 97/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
81 * save them while the data is still not overwritten 98 * save them while the data is still not overwritten
82 */ 99 */
83static void __init rx51_reserve(void) 100static void __init rx51_reserve(void)
84{ 101{
85 save_atags((const struct tag *)(PAGE_OFFSET + 0x100)); 102 const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);
103
104 save_atags(tags);
105 rx51_set_system_rev(tags);
86 omap_reserve(); 106 omap_reserve();
87} 107}
88 108
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9cda974a3009..d7f1d69daf6d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -18,7 +18,6 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/machine.h>
21#include <linux/platform_data/mailbox-omap.h>
22 21
23#include <asm/mach-types.h> 22#include <asm/mach-types.h>
24#include <asm/mach/map.h> 23#include <asm/mach/map.h>
@@ -66,32 +65,6 @@ static int __init omap3_l3_init(void)
66} 65}
67omap_postcore_initcall(omap3_l3_init); 66omap_postcore_initcall(omap3_l3_init);
68 67
69#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
70static inline void __init omap_init_mbox(void)
71{
72 struct omap_hwmod *oh;
73 struct platform_device *pdev;
74 struct omap_mbox_pdata *pdata;
75
76 oh = omap_hwmod_lookup("mailbox");
77 if (!oh) {
78 pr_err("%s: unable to find hwmod\n", __func__);
79 return;
80 }
81 if (!oh->dev_attr) {
82 pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
83 return;
84 }
85
86 pdata = (struct omap_mbox_pdata *)oh->dev_attr;
87 pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
88 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
89 __func__, PTR_ERR(pdev));
90}
91#else
92static inline void omap_init_mbox(void) { }
93#endif /* CONFIG_OMAP2PLUS_MBOX */
94
95static inline void omap_init_sti(void) {} 68static inline void omap_init_sti(void) {}
96 69
97#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 70#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
@@ -229,7 +202,6 @@ static int __init omap2_init_devices(void)
229 * please keep these calls, and their implementations above, 202 * please keep these calls, and their implementations above,
230 * in alphabetical order so they're easier to sort through. 203 * in alphabetical order so they're easier to sort through.
231 */ 204 */
232 omap_init_mbox();
233 omap_init_mcspi(); 205 omap_init_mcspi();
234 omap_init_sham(); 206 omap_init_sham();
235 omap_init_aes(); 207 omap_init_aes();
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 7b76ce01c21d..8633c703546a 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -101,10 +101,8 @@ static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
101 101
102static void set_onenand_cfg(void __iomem *onenand_base) 102static void set_onenand_cfg(void __iomem *onenand_base)
103{ 103{
104 u32 reg; 104 u32 reg = ONENAND_SYS_CFG1_RDY | ONENAND_SYS_CFG1_INT;
105 105
106 reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
107 reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
108 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) | 106 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
109 ONENAND_SYS_CFG1_BL_16; 107 ONENAND_SYS_CFG1_BL_16;
110 if (onenand_flags & ONENAND_FLAG_SYNCREAD) 108 if (onenand_flags & ONENAND_FLAG_SYNCREAD)
@@ -123,6 +121,7 @@ static void set_onenand_cfg(void __iomem *onenand_base)
123 reg |= ONENAND_SYS_CFG1_VHF; 121 reg |= ONENAND_SYS_CFG1_VHF;
124 else 122 else
125 reg &= ~ONENAND_SYS_CFG1_VHF; 123 reg &= ~ONENAND_SYS_CFG1_VHF;
124
126 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); 125 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
127} 126}
128 127
@@ -289,6 +288,7 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
289 } 288 }
290 } 289 }
291 290
291 onenand_async.sync_write = true;
292 omap2_onenand_calc_async_timings(&t); 292 omap2_onenand_calc_async_timings(&t);
293 293
294 ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async); 294 ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 0437537751bc..f7ff3b9dad87 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -191,12 +191,22 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
191{ 191{
192 struct platform_device *pdev = to_platform_device(dev); 192 struct platform_device *pdev = to_platform_device(dev);
193 struct omap_device *od; 193 struct omap_device *od;
194 int err;
194 195
195 switch (event) { 196 switch (event) {
196 case BUS_NOTIFY_DEL_DEVICE: 197 case BUS_NOTIFY_DEL_DEVICE:
197 if (pdev->archdata.od) 198 if (pdev->archdata.od)
198 omap_device_delete(pdev->archdata.od); 199 omap_device_delete(pdev->archdata.od);
199 break; 200 break;
201 case BUS_NOTIFY_UNBOUND_DRIVER:
202 od = to_omap_device(pdev);
203 if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED)) {
204 dev_info(dev, "enabled after unload, idling\n");
205 err = omap_device_idle(pdev);
206 if (err)
207 dev_err(dev, "failed to idle\n");
208 }
209 break;
200 case BUS_NOTIFY_ADD_DEVICE: 210 case BUS_NOTIFY_ADD_DEVICE:
201 if (pdev->dev.of_node) 211 if (pdev->dev.of_node)
202 omap_device_build_from_dt(pdev); 212 omap_device_build_from_dt(pdev);
@@ -602,8 +612,10 @@ static int _od_runtime_resume(struct device *dev)
602 int ret; 612 int ret;
603 613
604 ret = omap_device_enable(pdev); 614 ret = omap_device_enable(pdev);
605 if (ret) 615 if (ret) {
616 dev_err(dev, "use pm_runtime_put_sync_suspend() in driver?\n");
606 return ret; 617 return ret;
618 }
607 619
608 return pm_generic_runtime_resume(dev); 620 return pm_generic_runtime_resume(dev);
609} 621}
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index e781e4fae13a..a935d28443da 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -23,6 +23,8 @@
23#include <linux/platform_data/pinctrl-single.h> 23#include <linux/platform_data/pinctrl-single.h>
24#include <linux/platform_data/iommu-omap.h> 24#include <linux/platform_data/iommu-omap.h>
25#include <linux/platform_data/wkup_m3.h> 25#include <linux/platform_data/wkup_m3.h>
26#include <linux/platform_data/pwm_omap_dmtimer.h>
27#include <plat/dmtimer.h>
26 28
27#include "common.h" 29#include "common.h"
28#include "common-board-devices.h" 30#include "common-board-devices.h"
@@ -449,6 +451,24 @@ void omap_auxdata_legacy_init(struct device *dev)
449 dev->platform_data = &twl_gpio_auxdata; 451 dev->platform_data = &twl_gpio_auxdata;
450} 452}
451 453
454/* Dual mode timer PWM callbacks platdata */
455#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
456struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
457 .request_by_node = omap_dm_timer_request_by_node,
458 .free = omap_dm_timer_free,
459 .enable = omap_dm_timer_enable,
460 .disable = omap_dm_timer_disable,
461 .get_fclk = omap_dm_timer_get_fclk,
462 .start = omap_dm_timer_start,
463 .stop = omap_dm_timer_stop,
464 .set_load = omap_dm_timer_set_load,
465 .set_match = omap_dm_timer_set_match,
466 .set_pwm = omap_dm_timer_set_pwm,
467 .set_prescaler = omap_dm_timer_set_prescaler,
468 .write_counter = omap_dm_timer_write_counter,
469};
470#endif
471
452/* 472/*
453 * Few boards still need auxdata populated before we populate 473 * Few boards still need auxdata populated before we populate
454 * the dev entries in of_platform_populate(). 474 * the dev entries in of_platform_populate().
@@ -502,6 +522,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
502 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3", 522 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
503 &wkup_m3_data), 523 &wkup_m3_data),
504#endif 524#endif
525#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
526 OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
527#endif
505#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 528#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
506 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", 529 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
507 &omap4_iommu_pdata), 530 &omap4_iommu_pdata),
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index eafd120b53f1..1b9f0520dea9 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -86,13 +86,18 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
86 stmfd sp!, {lr} @ save registers on stack 86 stmfd sp!, {lr} @ save registers on stack
87 /* Setup so that we will disable and enable l2 */ 87 /* Setup so that we will disable and enable l2 */
88 mov r1, #0x1 88 mov r1, #0x1
89 adrl r2, l2dis_3630 @ may be too distant for plain adr 89 adrl r3, l2dis_3630_offset @ may be too distant for plain adr
90 str r1, [r2] 90 ldr r2, [r3] @ value for offset
91 str r1, [r2, r3] @ write to l2dis_3630
91 ldmfd sp!, {pc} @ restore regs and return 92 ldmfd sp!, {pc} @ restore regs and return
92ENDPROC(enable_omap3630_toggle_l2_on_restore) 93ENDPROC(enable_omap3630_toggle_l2_on_restore)
93 94
94 .text 95/*
95/* Function to call rom code to save secure ram context */ 96 * Function to call rom code to save secure ram context. This gets
97 * relocated to SRAM, so it can be all in .data section. Otherwise
98 * we need to initialize api_params separately.
99 */
100 .data
96 .align 3 101 .align 3
97ENTRY(save_secure_ram_context) 102ENTRY(save_secure_ram_context)
98 stmfd sp!, {r4 - r11, lr} @ save registers on stack 103 stmfd sp!, {r4 - r11, lr} @ save registers on stack
@@ -126,6 +131,8 @@ ENDPROC(save_secure_ram_context)
126ENTRY(save_secure_ram_context_sz) 131ENTRY(save_secure_ram_context_sz)
127 .word . - save_secure_ram_context 132 .word . - save_secure_ram_context
128 133
134 .text
135
129/* 136/*
130 * ====================== 137 * ======================
131 * == Idle entry point == 138 * == Idle entry point ==
@@ -289,12 +296,6 @@ wait_sdrc_ready:
289 bic r5, r5, #0x40 296 bic r5, r5, #0x40
290 str r5, [r4] 297 str r5, [r4]
291 298
292/*
293 * PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
294 * base instead.
295 * Be careful not to clobber r7 when maintaing this code.
296 */
297
298is_dll_in_lock_mode: 299is_dll_in_lock_mode:
299 /* Is dll in lock mode? */ 300 /* Is dll in lock mode? */
300 ldr r4, sdrc_dlla_ctrl 301 ldr r4, sdrc_dlla_ctrl
@@ -302,11 +303,7 @@ is_dll_in_lock_mode:
302 tst r5, #0x4 303 tst r5, #0x4
303 bne exit_nonoff_modes @ Return if locked 304 bne exit_nonoff_modes @ Return if locked
304 /* wait till dll locks */ 305 /* wait till dll locks */
305 adr r7, kick_counter
306wait_dll_lock_timed: 306wait_dll_lock_timed:
307 ldr r4, wait_dll_lock_counter
308 add r4, r4, #1
309 str r4, [r7, #wait_dll_lock_counter - kick_counter]
310 ldr r4, sdrc_dlla_status 307 ldr r4, sdrc_dlla_status
311 /* Wait 20uS for lock */ 308 /* Wait 20uS for lock */
312 mov r6, #8 309 mov r6, #8
@@ -330,9 +327,6 @@ kick_dll:
330 orr r6, r6, #(1<<3) @ enable dll 327 orr r6, r6, #(1<<3) @ enable dll
331 str r6, [r4] 328 str r6, [r4]
332 dsb 329 dsb
333 ldr r4, kick_counter
334 add r4, r4, #1
335 str r4, [r7] @ kick_counter
336 b wait_dll_lock_timed 330 b wait_dll_lock_timed
337 331
338exit_nonoff_modes: 332exit_nonoff_modes:
@@ -360,15 +354,6 @@ sdrc_dlla_status:
360 .word SDRC_DLLA_STATUS_V 354 .word SDRC_DLLA_STATUS_V
361sdrc_dlla_ctrl: 355sdrc_dlla_ctrl:
362 .word SDRC_DLLA_CTRL_V 356 .word SDRC_DLLA_CTRL_V
363 /*
364 * When exporting to userspace while the counters are in SRAM,
365 * these 2 words need to be at the end to facilitate retrival!
366 */
367kick_counter:
368 .word 0
369wait_dll_lock_counter:
370 .word 0
371
372ENTRY(omap3_do_wfi_sz) 357ENTRY(omap3_do_wfi_sz)
373 .word . - omap3_do_wfi 358 .word . - omap3_do_wfi
374 359
@@ -437,7 +422,9 @@ ENTRY(omap3_restore)
437 cmp r2, #0x0 @ Check if target power state was OFF or RET 422 cmp r2, #0x0 @ Check if target power state was OFF or RET
438 bne logic_l1_restore 423 bne logic_l1_restore
439 424
440 ldr r0, l2dis_3630 425 adr r1, l2dis_3630_offset @ address for offset
426 ldr r0, [r1] @ value for offset
427 ldr r0, [r1, r0] @ value at l2dis_3630
441 cmp r0, #0x1 @ should we disable L2 on 3630? 428 cmp r0, #0x1 @ should we disable L2 on 3630?
442 bne skipl2dis 429 bne skipl2dis
443 mrc p15, 0, r0, c1, c0, 1 430 mrc p15, 0, r0, c1, c0, 1
@@ -449,12 +436,14 @@ skipl2dis:
449 and r1, #0x700 436 and r1, #0x700
450 cmp r1, #0x300 437 cmp r1, #0x300
451 beq l2_inv_gp 438 beq l2_inv_gp
439 adr r0, l2_inv_api_params_offset
440 ldr r3, [r0]
441 add r3, r3, r0 @ r3 points to dummy parameters
452 mov r0, #40 @ set service ID for PPA 442 mov r0, #40 @ set service ID for PPA
453 mov r12, r0 @ copy secure Service ID in r12 443 mov r12, r0 @ copy secure Service ID in r12
454 mov r1, #0 @ set task id for ROM code in r1 444 mov r1, #0 @ set task id for ROM code in r1
455 mov r2, #4 @ set some flags in r2, r6 445 mov r2, #4 @ set some flags in r2, r6
456 mov r6, #0xff 446 mov r6, #0xff
457 adr r3, l2_inv_api_params @ r3 points to dummy parameters
458 dsb @ data write barrier 447 dsb @ data write barrier
459 dmb @ data memory barrier 448 dmb @ data memory barrier
460 smc #1 @ call SMI monitor (smi #1) 449 smc #1 @ call SMI monitor (smi #1)
@@ -488,8 +477,8 @@ skipl2dis:
488 b logic_l1_restore 477 b logic_l1_restore
489 478
490 .align 479 .align
491l2_inv_api_params: 480l2_inv_api_params_offset:
492 .word 0x1, 0x00 481 .long l2_inv_api_params - .
493l2_inv_gp: 482l2_inv_gp:
494 /* Execute smi to invalidate L2 cache */ 483 /* Execute smi to invalidate L2 cache */
495 mov r12, #0x1 @ set up to invalidate L2 484 mov r12, #0x1 @ set up to invalidate L2
@@ -506,7 +495,9 @@ l2_inv_gp:
506 mov r12, #0x2 495 mov r12, #0x2
507 smc #0 @ Call SMI monitor (smieq) 496 smc #0 @ Call SMI monitor (smieq)
508logic_l1_restore: 497logic_l1_restore:
509 ldr r1, l2dis_3630 498 adr r0, l2dis_3630_offset @ adress for offset
499 ldr r1, [r0] @ value for offset
500 ldr r1, [r0, r1] @ value at l2dis_3630
510 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 501 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
511 bne skipl2reen 502 bne skipl2reen
512 mrc p15, 0, r1, c1, c0, 1 503 mrc p15, 0, r1, c1, c0, 1
@@ -535,9 +526,17 @@ control_stat:
535 .word CONTROL_STAT 526 .word CONTROL_STAT
536control_mem_rta: 527control_mem_rta:
537 .word CONTROL_MEM_RTA_CTRL 528 .word CONTROL_MEM_RTA_CTRL
529l2dis_3630_offset:
530 .long l2dis_3630 - .
531
532 .data
538l2dis_3630: 533l2dis_3630:
539 .word 0 534 .word 0
540 535
536 .data
537l2_inv_api_params:
538 .word 0x1, 0x00
539
541/* 540/*
542 * Internal functions 541 * Internal functions
543 */ 542 */
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 9b09d85d811a..c7a3b4aab4b5 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -29,12 +29,6 @@
29 dsb 29 dsb
30.endm 30.endm
31 31
32ppa_zero_params:
33 .word 0x0
34
35ppa_por_params:
36 .word 1, 0
37
38#ifdef CONFIG_ARCH_OMAP4 32#ifdef CONFIG_ARCH_OMAP4
39 33
40/* 34/*
@@ -266,7 +260,9 @@ ENTRY(omap4_cpu_resume)
266 beq skip_ns_smp_enable 260 beq skip_ns_smp_enable
267ppa_actrl_retry: 261ppa_actrl_retry:
268 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX 262 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
269 adr r3, ppa_zero_params @ Pointer to parameters 263 adr r1, ppa_zero_params_offset
264 ldr r3, [r1]
265 add r3, r3, r1 @ Pointer to ppa_zero_params
270 mov r1, #0x0 @ Process ID 266 mov r1, #0x0 @ Process ID
271 mov r2, #0x4 @ Flag 267 mov r2, #0x4 @ Flag
272 mov r6, #0xff 268 mov r6, #0xff
@@ -303,7 +299,9 @@ skip_ns_smp_enable:
303 ldr r0, =OMAP4_PPA_L2_POR_INDEX 299 ldr r0, =OMAP4_PPA_L2_POR_INDEX
304 ldr r1, =OMAP44XX_SAR_RAM_BASE 300 ldr r1, =OMAP44XX_SAR_RAM_BASE
305 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET] 301 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
306 adr r3, ppa_por_params 302 adr r1, ppa_por_params_offset
303 ldr r3, [r1]
304 add r3, r3, r1 @ Pointer to ppa_por_params
307 str r4, [r3, #0x04] 305 str r4, [r3, #0x04]
308 mov r1, #0x0 @ Process ID 306 mov r1, #0x0 @ Process ID
309 mov r2, #0x4 @ Flag 307 mov r2, #0x4 @ Flag
@@ -328,6 +326,8 @@ skip_l2en:
328#endif 326#endif
329 327
330 b cpu_resume @ Jump to generic resume 328 b cpu_resume @ Jump to generic resume
329ppa_por_params_offset:
330 .long ppa_por_params - .
331ENDPROC(omap4_cpu_resume) 331ENDPROC(omap4_cpu_resume)
332#endif /* CONFIG_ARCH_OMAP4 */ 332#endif /* CONFIG_ARCH_OMAP4 */
333 333
@@ -380,4 +380,13 @@ ENTRY(omap_do_wfi)
380 nop 380 nop
381 381
382 ldmfd sp!, {pc} 382 ldmfd sp!, {pc}
383ppa_zero_params_offset:
384 .long ppa_zero_params - .
383ENDPROC(omap_do_wfi) 385ENDPROC(omap_do_wfi)
386
387 .data
388ppa_zero_params:
389 .word 0
390
391ppa_por_params:
392 .word 1, 0
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index def40a0dd60c..70ab4a25a5f8 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -1,5 +1,6 @@
1menuconfig ARCH_REALVIEW 1menuconfig ARCH_REALVIEW
2 bool "ARM Ltd. RealView family" if ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7 2 bool "ARM Ltd. RealView family"
3 depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
3 select ARM_AMBA 4 select ARM_AMBA
4 select ARM_TIMER_SP804 5 select ARM_TIMER_SP804
5 select COMMON_CLK_VERSATILE 6 select COMMON_CLK_VERSATILE
diff --git a/arch/arm/mach-realview/platsmp-dt.c b/arch/arm/mach-realview/platsmp-dt.c
index 65585392655b..6964e8876061 100644
--- a/arch/arm/mach-realview/platsmp-dt.c
+++ b/arch/arm/mach-realview/platsmp-dt.c
@@ -80,7 +80,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
80 virt_to_phys(versatile_secondary_startup)); 80 virt_to_phys(versatile_secondary_startup));
81} 81}
82 82
83struct smp_operations realview_dt_smp_ops __initdata = { 83static const struct smp_operations realview_dt_smp_ops __initconst = {
84 .smp_prepare_cpus = realview_smp_prepare_cpus, 84 .smp_prepare_cpus = realview_smp_prepare_cpus,
85 .smp_secondary_init = versatile_secondary_init, 85 .smp_secondary_init = versatile_secondary_init,
86 .smp_boot_secondary = versatile_boot_secondary, 86 .smp_boot_secondary = versatile_boot_secondary,
diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
index 9cb11215ceba..b3a4ed5289ec 100644
--- a/arch/arm/mach-shmobile/common.h
+++ b/arch/arm/mach-shmobile/common.h
@@ -4,7 +4,6 @@
4extern void shmobile_init_delay(void); 4extern void shmobile_init_delay(void);
5extern void shmobile_boot_vector(void); 5extern void shmobile_boot_vector(void);
6extern unsigned long shmobile_boot_fn; 6extern unsigned long shmobile_boot_fn;
7extern unsigned long shmobile_boot_arg;
8extern unsigned long shmobile_boot_size; 7extern unsigned long shmobile_boot_size;
9extern void shmobile_smp_boot(void); 8extern void shmobile_smp_boot(void);
10extern void shmobile_smp_sleep(void); 9extern void shmobile_smp_sleep(void);
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
index fa5248c52399..5e503d91ad70 100644
--- a/arch/arm/mach-shmobile/headsmp-scu.S
+++ b/arch/arm/mach-shmobile/headsmp-scu.S
@@ -38,9 +38,3 @@ ENTRY(shmobile_boot_scu)
38 38
39 b secondary_startup 39 b secondary_startup
40ENDPROC(shmobile_boot_scu) 40ENDPROC(shmobile_boot_scu)
41
42 .text
43 .align 2
44 .globl shmobile_scu_base
45shmobile_scu_base:
46 .space 4
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 330c1fc63197..32e0bf6e3ccb 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -24,7 +24,6 @@
24 .arm 24 .arm
25 .align 12 25 .align 12
26ENTRY(shmobile_boot_vector) 26ENTRY(shmobile_boot_vector)
27 ldr r0, 2f
28 ldr r1, 1f 27 ldr r1, 1f
29 bx r1 28 bx r1
30 29
@@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector)
34 .globl shmobile_boot_fn 33 .globl shmobile_boot_fn
35shmobile_boot_fn: 34shmobile_boot_fn:
361: .space 4 351: .space 4
37 .globl shmobile_boot_arg
38shmobile_boot_arg:
392: .space 4
40 .globl shmobile_boot_size 36 .globl shmobile_boot_size
41shmobile_boot_size: 37shmobile_boot_size:
42 .long . - shmobile_boot_vector 38 .long . - shmobile_boot_vector
@@ -46,13 +42,15 @@ shmobile_boot_size:
46 */ 42 */
47 43
48ENTRY(shmobile_smp_boot) 44ENTRY(shmobile_smp_boot)
49 @ r0 = MPIDR_HWID_BITMASK
50 mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR 45 mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
51 and r0, r1, r0 @ r0 = cpu_logical_map() value 46 and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK
47 @ r0 = cpu_logical_map() value
52 mov r1, #0 @ r1 = CPU index 48 mov r1, #0 @ r1 = CPU index
53 adr r5, 1f @ array of per-cpu mpidr values 49 adr r2, 1f
54 adr r6, 2f @ array of per-cpu functions 50 ldmia r2, {r5, r6, r7}
55 adr r7, 3f @ array of per-cpu arguments 51 add r5, r5, r2 @ array of per-cpu mpidr values
52 add r6, r6, r2 @ array of per-cpu functions
53 add r7, r7, r2 @ array of per-cpu arguments
56 54
57shmobile_smp_boot_find_mpidr: 55shmobile_smp_boot_find_mpidr:
58 ldr r8, [r5, r1, lsl #2] 56 ldr r8, [r5, r1, lsl #2]
@@ -80,12 +78,18 @@ ENTRY(shmobile_smp_sleep)
80 b shmobile_smp_boot 78 b shmobile_smp_boot
81ENDPROC(shmobile_smp_sleep) 79ENDPROC(shmobile_smp_sleep)
82 80
81 .align 2
821: .long shmobile_smp_mpidr - .
83 .long shmobile_smp_fn - 1b
84 .long shmobile_smp_arg - 1b
85
86 .bss
83 .globl shmobile_smp_mpidr 87 .globl shmobile_smp_mpidr
84shmobile_smp_mpidr: 88shmobile_smp_mpidr:
851: .space NR_CPUS * 4 89 .space NR_CPUS * 4
86 .globl shmobile_smp_fn 90 .globl shmobile_smp_fn
87shmobile_smp_fn: 91shmobile_smp_fn:
882: .space NR_CPUS * 4 92 .space NR_CPUS * 4
89 .globl shmobile_smp_arg 93 .globl shmobile_smp_arg
90shmobile_smp_arg: 94shmobile_smp_arg:
913: .space NR_CPUS * 4 95 .space NR_CPUS * 4
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 911884f7e28b..aba75c89f9c1 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -123,7 +123,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
123{ 123{
124 /* install boot code shared by all CPUs */ 124 /* install boot code shared by all CPUs */
125 shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); 125 shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
126 shmobile_boot_arg = MPIDR_HWID_BITMASK;
127 126
128 /* perform per-cpu setup */ 127 /* perform per-cpu setup */
129 apmu_parse_cfg(apmu_init_cpu, apmu_config, num); 128 apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
index 64663110ab6c..081a097c9219 100644
--- a/arch/arm/mach-shmobile/platsmp-scu.c
+++ b/arch/arm/mach-shmobile/platsmp-scu.c
@@ -17,6 +17,9 @@
17#include <asm/smp_scu.h> 17#include <asm/smp_scu.h>
18#include "common.h" 18#include "common.h"
19 19
20
21void __iomem *shmobile_scu_base;
22
20static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb, 23static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
21 unsigned long action, void *hcpu) 24 unsigned long action, void *hcpu)
22{ 25{
@@ -41,7 +44,6 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
41{ 44{
42 /* install boot code shared by all CPUs */ 45 /* install boot code shared by all CPUs */
43 shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); 46 shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
44 shmobile_boot_arg = MPIDR_HWID_BITMASK;
45 47
46 /* enable SCU and cache coherency on booting CPU */ 48 /* enable SCU and cache coherency on booting CPU */
47 scu_enable(shmobile_scu_base); 49 scu_enable(shmobile_scu_base);
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index b854fe2095ad..0b024a9dbd43 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -92,8 +92,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
92{ 92{
93 /* Map the reset vector (in headsmp-scu.S, headsmp.S) */ 93 /* Map the reset vector (in headsmp-scu.S, headsmp.S) */
94 __raw_writel(__pa(shmobile_boot_vector), AVECR); 94 __raw_writel(__pa(shmobile_boot_vector), AVECR);
95 shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
96 shmobile_boot_arg = (unsigned long)shmobile_scu_base;
97 95
98 /* setup r8a7779 specific SCU bits */ 96 /* setup r8a7779 specific SCU bits */
99 shmobile_scu_base = IOMEM(R8A7779_SCU_BASE); 97 shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
diff --git a/arch/arm/mach-tango/Kconfig b/arch/arm/mach-tango/Kconfig
index d6a3714b096e..ebe15b93bbe8 100644
--- a/arch/arm/mach-tango/Kconfig
+++ b/arch/arm/mach-tango/Kconfig
@@ -1,5 +1,6 @@
1config ARCH_TANGO 1config ARCH_TANGO
2 bool "Sigma Designs Tango4 (SMP87xx)" if ARCH_MULTI_V7 2 bool "Sigma Designs Tango4 (SMP87xx)"
3 depends on ARCH_MULTI_V7
3 # Cortex-A9 MPCore r3p0, PL310 r3p2 4 # Cortex-A9 MPCore r3p0, PL310 r3p2
4 select ARCH_HAS_HOLES_MEMORYMODEL 5 select ARCH_HAS_HOLES_MEMORYMODEL
5 select ARM_ERRATA_754322 6 select ARM_ERRATA_754322
diff --git a/arch/arm/mach-tango/platsmp.c b/arch/arm/mach-tango/platsmp.c
index a18d5a34e2f5..a21f55e000d2 100644
--- a/arch/arm/mach-tango/platsmp.c
+++ b/arch/arm/mach-tango/platsmp.c
@@ -9,7 +9,7 @@ static int tango_boot_secondary(unsigned int cpu, struct task_struct *idle)
9 return 0; 9 return 0;
10} 10}
11 11
12static struct smp_operations tango_smp_ops __initdata = { 12static const struct smp_operations tango_smp_ops __initconst = {
13 .smp_boot_secondary = tango_boot_secondary, 13 .smp_boot_secondary = tango_boot_secondary,
14}; 14};
15 15
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 4b4058db0781..66353caa35b9 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -173,7 +173,7 @@ unsigned long arch_mmap_rnd(void)
173{ 173{
174 unsigned long rnd; 174 unsigned long rnd;
175 175
176 rnd = (unsigned long)get_random_int() & ((1 << mmap_rnd_bits) - 1); 176 rnd = get_random_long() & ((1UL << mmap_rnd_bits) - 1);
177 177
178 return rnd << PAGE_SHIFT; 178 return rnd << PAGE_SHIFT;
179} 179}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 17:52:16 -0500