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-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi14
-rw-r--r--arch/arm/boot/dts/am335x-chilisom.dtsi14
-rw-r--r--arch/arm/boot/dts/am335x-nano.dts14
-rw-r--r--arch/arm/boot/dts/am335x-pepper.dts14
-rw-r--r--arch/arm/boot/dts/am335x-sl50.dts13
-rw-r--r--arch/arm/boot/dts/tps65217.dtsi56
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c6
7 files changed, 70 insertions, 61 deletions
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index f3db13d2d90e..0cc150b87b86 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -285,8 +285,10 @@
285 }; 285 };
286}; 286};
287 287
288
289/include/ "tps65217.dtsi"
290
288&tps { 291&tps {
289 compatible = "ti,tps65217";
290 /* 292 /*
291 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 293 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
292 * mode") at poweroff. Most BeagleBone versions do not support RTC-only 294 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
@@ -307,17 +309,12 @@
307 ti,pmic-shutdown-controller; 309 ti,pmic-shutdown-controller;
308 310
309 regulators { 311 regulators {
310 #address-cells = <1>;
311 #size-cells = <0>;
312
313 dcdc1_reg: regulator@0 { 312 dcdc1_reg: regulator@0 {
314 reg = <0>;
315 regulator-name = "vdds_dpr"; 313 regulator-name = "vdds_dpr";
316 regulator-always-on; 314 regulator-always-on;
317 }; 315 };
318 316
319 dcdc2_reg: regulator@1 { 317 dcdc2_reg: regulator@1 {
320 reg = <1>;
321 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 318 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
322 regulator-name = "vdd_mpu"; 319 regulator-name = "vdd_mpu";
323 regulator-min-microvolt = <925000>; 320 regulator-min-microvolt = <925000>;
@@ -327,7 +324,6 @@
327 }; 324 };
328 325
329 dcdc3_reg: regulator@2 { 326 dcdc3_reg: regulator@2 {
330 reg = <2>;
331 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 327 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
332 regulator-name = "vdd_core"; 328 regulator-name = "vdd_core";
333 regulator-min-microvolt = <925000>; 329 regulator-min-microvolt = <925000>;
@@ -337,25 +333,21 @@
337 }; 333 };
338 334
339 ldo1_reg: regulator@3 { 335 ldo1_reg: regulator@3 {
340 reg = <3>;
341 regulator-name = "vio,vrtc,vdds"; 336 regulator-name = "vio,vrtc,vdds";
342 regulator-always-on; 337 regulator-always-on;
343 }; 338 };
344 339
345 ldo2_reg: regulator@4 { 340 ldo2_reg: regulator@4 {
346 reg = <4>;
347 regulator-name = "vdd_3v3aux"; 341 regulator-name = "vdd_3v3aux";
348 regulator-always-on; 342 regulator-always-on;
349 }; 343 };
350 344
351 ldo3_reg: regulator@5 { 345 ldo3_reg: regulator@5 {
352 reg = <5>;
353 regulator-name = "vdd_1v8"; 346 regulator-name = "vdd_1v8";
354 regulator-always-on; 347 regulator-always-on;
355 }; 348 };
356 349
357 ldo4_reg: regulator@6 { 350 ldo4_reg: regulator@6 {
358 reg = <6>;
359 regulator-name = "vdd_3v3a"; 351 regulator-name = "vdd_3v3a";
360 regulator-always-on; 352 regulator-always-on;
361 }; 353 };
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index fda457b07e15..857d9894103a 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -128,21 +128,16 @@
128 128
129}; 129};
130 130
131&tps { 131/include/ "tps65217.dtsi"
132 compatible = "ti,tps65217";
133 132
133&tps {
134 regulators { 134 regulators {
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 dcdc1_reg: regulator@0 { 135 dcdc1_reg: regulator@0 {
139 reg = <0>;
140 regulator-name = "vdds_dpr"; 136 regulator-name = "vdds_dpr";
141 regulator-always-on; 137 regulator-always-on;
142 }; 138 };
143 139
144 dcdc2_reg: regulator@1 { 140 dcdc2_reg: regulator@1 {
145 reg = <1>;
146 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 141 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
147 regulator-name = "vdd_mpu"; 142 regulator-name = "vdd_mpu";
148 regulator-min-microvolt = <925000>; 143 regulator-min-microvolt = <925000>;
@@ -152,7 +147,6 @@
152 }; 147 };
153 148
154 dcdc3_reg: regulator@2 { 149 dcdc3_reg: regulator@2 {
155 reg = <2>;
156 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 150 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
157 regulator-name = "vdd_core"; 151 regulator-name = "vdd_core";
158 regulator-min-microvolt = <925000>; 152 regulator-min-microvolt = <925000>;
@@ -162,28 +156,24 @@
162 }; 156 };
163 157
164 ldo1_reg: regulator@3 { 158 ldo1_reg: regulator@3 {
165 reg = <3>;
166 regulator-name = "vio,vrtc,vdds"; 159 regulator-name = "vio,vrtc,vdds";
167 regulator-boot-on; 160 regulator-boot-on;
168 regulator-always-on; 161 regulator-always-on;
169 }; 162 };
170 163
171 ldo2_reg: regulator@4 { 164 ldo2_reg: regulator@4 {
172 reg = <4>;
173 regulator-name = "vdd_3v3aux"; 165 regulator-name = "vdd_3v3aux";
174 regulator-boot-on; 166 regulator-boot-on;
175 regulator-always-on; 167 regulator-always-on;
176 }; 168 };
177 169
178 ldo3_reg: regulator@5 { 170 ldo3_reg: regulator@5 {
179 reg = <5>;
180 regulator-name = "vdd_1v8"; 171 regulator-name = "vdd_1v8";
181 regulator-boot-on; 172 regulator-boot-on;
182 regulator-always-on; 173 regulator-always-on;
183 }; 174 };
184 175
185 ldo4_reg: regulator@6 { 176 ldo4_reg: regulator@6 {
186 reg = <6>;
187 regulator-name = "vdd_3v3d"; 177 regulator-name = "vdd_3v3d";
188 regulator-boot-on; 178 regulator-boot-on;
189 regulator-always-on; 179 regulator-always-on;
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index 77559a1ded60..f313999c503e 100644
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -375,15 +375,11 @@
375 wp-gpios = <&gpio3 18 0>; 375 wp-gpios = <&gpio3 18 0>;
376}; 376};
377 377
378&tps { 378#include "tps65217.dtsi"
379 compatible = "ti,tps65217";
380 379
380&tps {
381 regulators { 381 regulators {
382 #address-cells = <1>;
383 #size-cells = <0>;
384
385 dcdc1_reg: regulator@0 { 382 dcdc1_reg: regulator@0 {
386 reg = <0>;
387 /* +1.5V voltage with ±4% tolerance */ 383 /* +1.5V voltage with ±4% tolerance */
388 regulator-min-microvolt = <1450000>; 384 regulator-min-microvolt = <1450000>;
389 regulator-max-microvolt = <1550000>; 385 regulator-max-microvolt = <1550000>;
@@ -392,7 +388,6 @@
392 }; 388 };
393 389
394 dcdc2_reg: regulator@1 { 390 dcdc2_reg: regulator@1 {
395 reg = <1>;
396 /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */ 391 /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
397 regulator-name = "vdd_mpu"; 392 regulator-name = "vdd_mpu";
398 regulator-min-microvolt = <915000>; 393 regulator-min-microvolt = <915000>;
@@ -402,7 +397,6 @@
402 }; 397 };
403 398
404 dcdc3_reg: regulator@2 { 399 dcdc3_reg: regulator@2 {
405 reg = <2>;
406 /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */ 400 /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
407 regulator-name = "vdd_core"; 401 regulator-name = "vdd_core";
408 regulator-min-microvolt = <915000>; 402 regulator-min-microvolt = <915000>;
@@ -412,7 +406,6 @@
412 }; 406 };
413 407
414 ldo1_reg: regulator@3 { 408 ldo1_reg: regulator@3 {
415 reg = <3>;
416 /* +1.8V voltage with ±4% tolerance */ 409 /* +1.8V voltage with ±4% tolerance */
417 regulator-min-microvolt = <1750000>; 410 regulator-min-microvolt = <1750000>;
418 regulator-max-microvolt = <1870000>; 411 regulator-max-microvolt = <1870000>;
@@ -421,7 +414,6 @@
421 }; 414 };
422 415
423 ldo2_reg: regulator@4 { 416 ldo2_reg: regulator@4 {
424 reg = <4>;
425 /* +3.3V voltage with ±4% tolerance */ 417 /* +3.3V voltage with ±4% tolerance */
426 regulator-min-microvolt = <3175000>; 418 regulator-min-microvolt = <3175000>;
427 regulator-max-microvolt = <3430000>; 419 regulator-max-microvolt = <3430000>;
@@ -430,7 +422,6 @@
430 }; 422 };
431 423
432 ldo3_reg: regulator@5 { 424 ldo3_reg: regulator@5 {
433 reg = <5>;
434 /* +1.8V voltage with ±4% tolerance */ 425 /* +1.8V voltage with ±4% tolerance */
435 regulator-min-microvolt = <1750000>; 426 regulator-min-microvolt = <1750000>;
436 regulator-max-microvolt = <1870000>; 427 regulator-max-microvolt = <1870000>;
@@ -439,7 +430,6 @@
439 }; 430 };
440 431
441 ldo4_reg: regulator@6 { 432 ldo4_reg: regulator@6 {
442 reg = <6>;
443 /* +3.3V voltage with ±4% tolerance */ 433 /* +3.3V voltage with ±4% tolerance */
444 regulator-min-microvolt = <3175000>; 434 regulator-min-microvolt = <3175000>;
445 regulator-max-microvolt = <3430000>; 435 regulator-max-microvolt = <3430000>;
diff --git a/arch/arm/boot/dts/am335x-pepper.dts b/arch/arm/boot/dts/am335x-pepper.dts
index 471a3a70ea1f..8867aaaec54d 100644
--- a/arch/arm/boot/dts/am335x-pepper.dts
+++ b/arch/arm/boot/dts/am335x-pepper.dts
@@ -420,9 +420,9 @@
420 vin-supply = <&vbat>; 420 vin-supply = <&vbat>;
421}; 421};
422 422
423&tps { 423/include/ "tps65217.dtsi"
424 compatible = "ti,tps65217";
425 424
425&tps {
426 backlight { 426 backlight {
427 isel = <1>; /* ISET1 */ 427 isel = <1>; /* ISET1 */
428 fdim = <200>; /* TPS65217_BL_FDIM_200HZ */ 428 fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
@@ -430,17 +430,12 @@
430 }; 430 };
431 431
432 regulators { 432 regulators {
433 #address-cells = <1>;
434 #size-cells = <0>;
435
436 dcdc1_reg: regulator@0 { 433 dcdc1_reg: regulator@0 {
437 reg = <0>;
438 /* VDD_1V8 system supply */ 434 /* VDD_1V8 system supply */
439 regulator-always-on; 435 regulator-always-on;
440 }; 436 };
441 437
442 dcdc2_reg: regulator@1 { 438 dcdc2_reg: regulator@1 {
443 reg = <1>;
444 /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */ 439 /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
445 regulator-name = "vdd_core"; 440 regulator-name = "vdd_core";
446 regulator-min-microvolt = <925000>; 441 regulator-min-microvolt = <925000>;
@@ -450,7 +445,6 @@
450 }; 445 };
451 446
452 dcdc3_reg: regulator@2 { 447 dcdc3_reg: regulator@2 {
453 reg = <2>;
454 /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */ 448 /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
455 regulator-name = "vdd_mpu"; 449 regulator-name = "vdd_mpu";
456 regulator-min-microvolt = <925000>; 450 regulator-min-microvolt = <925000>;
@@ -460,21 +454,18 @@
460 }; 454 };
461 455
462 ldo1_reg: regulator@3 { 456 ldo1_reg: regulator@3 {
463 reg = <3>;
464 /* VRTC 1.8V always-on supply */ 457 /* VRTC 1.8V always-on supply */
465 regulator-name = "vrtc,vdds"; 458 regulator-name = "vrtc,vdds";
466 regulator-always-on; 459 regulator-always-on;
467 }; 460 };
468 461
469 ldo2_reg: regulator@4 { 462 ldo2_reg: regulator@4 {
470 reg = <4>;
471 /* 3.3V rail */ 463 /* 3.3V rail */
472 regulator-name = "vdd_3v3aux"; 464 regulator-name = "vdd_3v3aux";
473 regulator-always-on; 465 regulator-always-on;
474 }; 466 };
475 467
476 ldo3_reg: regulator@5 { 468 ldo3_reg: regulator@5 {
477 reg = <5>;
478 /* VDD_3V3A 3.3V rail */ 469 /* VDD_3V3A 3.3V rail */
479 regulator-name = "vdd_3v3a"; 470 regulator-name = "vdd_3v3a";
480 regulator-min-microvolt = <3300000>; 471 regulator-min-microvolt = <3300000>;
@@ -482,7 +473,6 @@
482 }; 473 };
483 474
484 ldo4_reg: regulator@6 { 475 ldo4_reg: regulator@6 {
485 reg = <6>;
486 /* VDD_3V3B 3.3V rail */ 476 /* VDD_3V3B 3.3V rail */
487 regulator-name = "vdd_3v3b"; 477 regulator-name = "vdd_3v3b";
488 regulator-always-on; 478 regulator-always-on;
diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts
index d38edfa53bb9..3303c281697b 100644
--- a/arch/arm/boot/dts/am335x-sl50.dts
+++ b/arch/arm/boot/dts/am335x-sl50.dts
@@ -375,19 +375,16 @@
375 pinctrl-0 = <&uart4_pins>; 375 pinctrl-0 = <&uart4_pins>;
376}; 376};
377 377
378#include "tps65217.dtsi"
379
378&tps { 380&tps {
379 compatible = "ti,tps65217";
380 ti,pmic-shutdown-controller; 381 ti,pmic-shutdown-controller;
381 382
382 interrupt-parent = <&intc>; 383 interrupt-parent = <&intc>;
383 interrupts = <7>; /* NNMI */ 384 interrupts = <7>; /* NNMI */
384 385
385 regulators { 386 regulators {
386 #address-cells = <1>;
387 #size-cells = <0>;
388
389 dcdc1_reg: regulator@0 { 387 dcdc1_reg: regulator@0 {
390 reg = <0>;
391 /* VDDS_DDR */ 388 /* VDDS_DDR */
392 regulator-min-microvolt = <1500000>; 389 regulator-min-microvolt = <1500000>;
393 regulator-max-microvolt = <1500000>; 390 regulator-max-microvolt = <1500000>;
@@ -395,7 +392,6 @@
395 }; 392 };
396 393
397 dcdc2_reg: regulator@1 { 394 dcdc2_reg: regulator@1 {
398 reg = <1>;
399 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 395 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
400 regulator-name = "vdd_mpu"; 396 regulator-name = "vdd_mpu";
401 regulator-min-microvolt = <925000>; 397 regulator-min-microvolt = <925000>;
@@ -405,7 +401,6 @@
405 }; 401 };
406 402
407 dcdc3_reg: regulator@2 { 403 dcdc3_reg: regulator@2 {
408 reg = <2>;
409 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 404 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
410 regulator-name = "vdd_core"; 405 regulator-name = "vdd_core";
411 regulator-min-microvolt = <925000>; 406 regulator-min-microvolt = <925000>;
@@ -415,7 +410,6 @@
415 }; 410 };
416 411
417 ldo1_reg: regulator@3 { 412 ldo1_reg: regulator@3 {
418 reg = <3>;
419 /* VRTC / VIO / VDDS*/ 413 /* VRTC / VIO / VDDS*/
420 regulator-always-on; 414 regulator-always-on;
421 regulator-min-microvolt = <1800000>; 415 regulator-min-microvolt = <1800000>;
@@ -423,7 +417,6 @@
423 }; 417 };
424 418
425 ldo2_reg: regulator@4 { 419 ldo2_reg: regulator@4 {
426 reg = <4>;
427 /* VDD_3V3AUX */ 420 /* VDD_3V3AUX */
428 regulator-always-on; 421 regulator-always-on;
429 regulator-min-microvolt = <3300000>; 422 regulator-min-microvolt = <3300000>;
@@ -431,7 +424,6 @@
431 }; 424 };
432 425
433 ldo3_reg: regulator@5 { 426 ldo3_reg: regulator@5 {
434 reg = <5>;
435 /* VDD_1V8 */ 427 /* VDD_1V8 */
436 regulator-min-microvolt = <1800000>; 428 regulator-min-microvolt = <1800000>;
437 regulator-max-microvolt = <1800000>; 429 regulator-max-microvolt = <1800000>;
@@ -439,7 +431,6 @@
439 }; 431 };
440 432
441 ldo4_reg: regulator@6 { 433 ldo4_reg: regulator@6 {
442 reg = <6>;
443 /* VDD_3V3A */ 434 /* VDD_3V3A */
444 regulator-min-microvolt = <3300000>; 435 regulator-min-microvolt = <3300000>;
445 regulator-max-microvolt = <3300000>; 436 regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tps65217.dtsi b/arch/arm/boot/dts/tps65217.dtsi
new file mode 100644
index 000000000000..a63272422d76
--- /dev/null
+++ b/arch/arm/boot/dts/tps65217.dtsi
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Integrated Power Management Chip
11 * http://www.ti.com/lit/ds/symlink/tps65217.pdf
12 */
13
14&tps {
15 compatible = "ti,tps65217";
16
17 regulators {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 dcdc1_reg: regulator@0 {
22 reg = <0>;
23 regulator-compatible = "dcdc1";
24 };
25
26 dcdc2_reg: regulator@1 {
27 reg = <1>;
28 regulator-compatible = "dcdc2";
29 };
30
31 dcdc3_reg: regulator@2 {
32 reg = <2>;
33 regulator-compatible = "dcdc3";
34 };
35
36 ldo1_reg: regulator@3 {
37 reg = <3>;
38 regulator-compatible = "ldo1";
39 };
40
41 ldo2_reg: regulator@4 {
42 reg = <4>;
43 regulator-compatible = "ldo2";
44 };
45
46 ldo3_reg: regulator@5 {
47 reg = <5>;
48 regulator-compatible = "ldo3";
49 };
50
51 ldo4_reg: regulator@6 {
52 reg = <6>;
53 regulator-compatible = "ldo4";
54 };
55 };
56};
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 7b76ce01c21d..8633c703546a 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -101,10 +101,8 @@ static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
101 101
102static void set_onenand_cfg(void __iomem *onenand_base) 102static void set_onenand_cfg(void __iomem *onenand_base)
103{ 103{
104 u32 reg; 104 u32 reg = ONENAND_SYS_CFG1_RDY | ONENAND_SYS_CFG1_INT;
105 105
106 reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
107 reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
108 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) | 106 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
109 ONENAND_SYS_CFG1_BL_16; 107 ONENAND_SYS_CFG1_BL_16;
110 if (onenand_flags & ONENAND_FLAG_SYNCREAD) 108 if (onenand_flags & ONENAND_FLAG_SYNCREAD)
@@ -123,6 +121,7 @@ static void set_onenand_cfg(void __iomem *onenand_base)
123 reg |= ONENAND_SYS_CFG1_VHF; 121 reg |= ONENAND_SYS_CFG1_VHF;
124 else 122 else
125 reg &= ~ONENAND_SYS_CFG1_VHF; 123 reg &= ~ONENAND_SYS_CFG1_VHF;
124
126 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); 125 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
127} 126}
128 127
@@ -289,6 +288,7 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
289 } 288 }
290 } 289 }
291 290
291 onenand_async.sync_write = true;
292 omap2_onenand_calc_async_timings(&t); 292 omap2_onenand_calc_async_timings(&t);
293 293
294 ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async); 294 ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);