96 files changed, 1263 insertions, 825 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fcedd612c54c..a39e3214ea3d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -550,6 +550,8 @@ config ARCH_IXP4XX
        select GENERIC_CLOCKEVENTS
        select MIGHT_HAVE_PCI
        select NEED_MACH_IO_H
+        select USB_EHCI_BIG_ENDIAN_MMIO
+        select USB_EHCI_BIG_ENDIAN_DESC
        help
          Support for Intel's IXP4XX (XScale) family of processors.
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index cb7bcc51608d..39253b9aedd1 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -322,6 +322,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 0 0x1 0x0    /* PA0 periph A SPI0_MISO pin */
+                                                         0 1 0x1 0x0    /* PA1 periph A SPI0_MOSI pin */
+                                                         0 2 0x1 0x0>;  /* PA2 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <1 0 0x1 0x0    /* PB0 periph A SPI1_MISO pin */
+                                                         1 1 0x1 0x0    /* PB1 periph A SPI1_MOSI pin */
+                                                         1 2 0x1 0x0>;  /* PB2 periph A SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@ -471,6 +489,28 @@
                                status = "disabled";
                        };
+                        spi0: spi@fffc8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffc8000 0x200>;
+                                interrupts = <12 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@fffcc000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffcc000 0x200>;
+                                interrupts = <13 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                        adc0: adc@fffe0000 {
                                compatible = "atmel,at91sam9260-adc";
                                reg = <0xfffe0000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 271d4de026e9..94b58ab2cc08 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -303,6 +303,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 0 0x2 0x0    /* PA0 periph B SPI0_MISO pin */
+                                                         0 1 0x2 0x0    /* PA1 periph B SPI0_MOSI pin */
+                                                         0 2 0x2 0x0>;  /* PA2 periph B SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <1 12 0x1 0x0   /* PB12 periph A SPI1_MISO pin */
+                                                         1 13 0x1 0x0   /* PB13 periph A SPI1_MOSI pin */
+                                                         1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff200 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff200 0x200>;
@@ -462,6 +480,28 @@
                                reg = <0xfffffd40 0x10>;
                                status = "disabled";
                        };
+                        spi0: spi@fffa4000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa4000 0x200>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@fffa8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa8000 0x200>;
+                                interrupts = <15 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 1eb08728f527..a14e424b2e81 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -79,6 +79,16 @@
                                        };
                                };
                        };
+                        spi0: spi@fffa4000 {
+                                status = "okay";
+                                cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
+                                mtd_dataflash@0 {
+                                        compatible = "atmel,at45", "atmel,dataflash";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index da15e83e7f17..23d1f468f27f 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -96,6 +96,16 @@
                                status = "okay";
                                pinctrl-0 = <&pinctrl_ssc0_tx>;
                        };
+                        spi0: spi@fffc8000 {
+                                status = "okay";
+                                cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
+                                mtd_dataflash@0 {
+                                        compatible = "atmel,at45", "atmel,dataflash";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <1>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 6b1d4cab24c2..cfdf429578b5 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -322,6 +322,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <1 0 0x1 0x0    /* PB0 periph A SPI0_MISO pin */
+                                                         1 1 0x1 0x0    /* PB1 periph A SPI0_MOSI pin */
+                                                         1 2 0x1 0x0>;  /* PB2 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <1 14 0x1 0x0   /* PB14 periph A SPI1_MISO pin */
+                                                         1 15 0x1 0x0   /* PB15 periph A SPI1_MOSI pin */
+                                                         1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff200 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff200 0x200>;
@@ -531,6 +549,28 @@
                                reg = <0xfffffd40 0x10>;
                                status = "disabled";
                        };
+                        spi0: spi@fffa4000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa4000 0x200>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@fffa8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa8000 0x200>;
+                                interrupts = <15 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 20c31913c270..92c52a7d70bc 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -102,6 +102,16 @@
                                        };
                                };
                        };
+                        spi0: spi@fffa4000{
+                                status = "okay";
+                                cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
+                                mtd_dataflash@0 {
+                                        compatible = "atmel,at45", "atmel,dataflash";
+                                        spi-max-frequency = <13000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 7750f98dd764..b2961f1ea51b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -261,6 +261,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
+                                                         0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
+                                                         0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
+                                                         0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
+                                                         0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@ -373,6 +391,28 @@
                                #size-cells = <0>;
                                status = "disabled";
                        };
+                        spi0: spi@f0000000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0000000 0x100>;
+                                interrupts = <13 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@f0004000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0004000 0x100>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index d400f8de4387..34c842b1efb2 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -67,6 +67,16 @@
                                        };
                                };
                        };
+                        spi0: spi@f0000000 {
+                                status = "okay";
+                                cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+                                m25p80@0 {
+                                        compatible = "atmel,at25df321a";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index a98c0d50fbbe..347b438d47fa 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -343,6 +343,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
+                                                         0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
+                                                         0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
+                                                         0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
+                                                         0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@ -529,6 +547,28 @@
                                        trigger-value = <0x6>;
                                };
                        };
+                        spi0: spi@f0000000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0000000 0x100>;
+                                interrupts = <13 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@f0004000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0004000 0x100>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 8a7cf1d9cf5d..09f5e667ca7a 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -84,6 +84,16 @@
                                        };
                                };
                        };
+                        spi0: spi@f0000000 {
+                                status = "okay";
+                                cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+                                m25p80@0 {
+                                        compatible = "atmel,at25df321a";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                usb0: ohci@00600000 {
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 6ce3d17c3a29..fd36e1cca104 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -152,7 +152,6 @@
                        i2c0: i2c@80058000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&i2c0_pins_a>;
-                                clock-frequency = <400000>;
                                status = "okay";
                                sgtl5000: codec@0a {
diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts
index e6cde8aa7fff..6c6a5442800a 100644
--- a/arch/arm/boot/dts/imx28-sps1.dts
+++ b/arch/arm/boot/dts/imx28-sps1.dts
@@ -70,7 +70,6 @@
                        i2c0: i2c@80058000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&i2c0_pins_a>;
-                                clock-frequency = <400000>;
                                status = "okay";
                                rtc: rtc@51 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 06ec460b4581..281a223591ff 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -91,6 +91,7 @@
                        compatible = "arm,cortex-a9-twd-timer";
                        reg = <0x00a00600 0x20>;
                        interrupts = <1 13 0xf01>;
+                        clocks = <&clks 15>;
                };
                L2: l2-cache@00a02000 {
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 93c3afbef9ee..3694e94f6e99 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -96,11 +96,11 @@
                                marvell,function = "gpio";
                        };
                        pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
-                                marvell,pins = "mpp44";
+                                marvell,pins = "mpp46";
                                marvell,function = "gpio";
                        };
                        pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
-                                marvell,pins = "mpp45";
+                                marvell,pins = "mpp47";
                                marvell,function = "gpio";
                        };
@@ -157,14 +157,14 @@
                        gpios = <&gpio0 16 0>;
                        linux,default-trigger = "default-on";
                };
-                health_led1 {
+                rebuild_led {
+                        label = "status:white:rebuild_led";
+                        gpios = <&gpio1 4 0>;
+                };
+                health_led {
                        label = "status:red:health_led";
                        gpios = <&gpio1 5 0>;
                };
-                health_led2 {
-                        label = "status:white:health_led";
-                        gpios = <&gpio1 4 0>;
-                };
                backup_led {
                        label = "status:blue:backup_led";
                        gpios = <&gpio0 15 0>;
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 31f2157cd7d7..67f8670c4d6a 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -38,4 +38,10 @@
                      <0x19c00000 0x1000>;
                interrupts = <0 195 0x0>;
        };
+        qcom,ssbi@500000 {
+                compatible = "qcom,ssbi";
+                reg = <0x500000 0x1000>;
+                qcom,controller-type = "pmic-arbiter";
+        };
 };
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
index 9e621b5ad3dd..c9b09a813a4b 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -38,4 +38,10 @@
                      <0x16400000 0x1000>;
                interrupts = <0 154 0x0>;
        };
+        qcom,ssbi@500000 {
+                compatible = "qcom,ssbi";
+                reg = <0x500000 0x1000>;
+                qcom,controller-type = "pmic-arbiter";
+        };
 };
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 1513c1927cc8..122ae94076c8 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -89,7 +89,7 @@
                pinmux: pinmux@e0700000 {
                        compatible = "st,spear1310-pinmux";
                        reg = <0xe0700000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                apb {
@@ -212,7 +212,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 246>;
+                                gpio-ranges = <&pinmux 0 0 246>;
                                status = "disabled";
                                st-plgpio,ngpio = <246>;
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index 34da11aa6795..c511c4772efd 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -63,7 +63,7 @@
                pinmux: pinmux@e0700000 {
                        compatible = "st,spear1340-pinmux";
                        reg = <0xe0700000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                pwm: pwm@e0180000 {
@@ -127,7 +127,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 252>;
+                                gpio-ranges = <&pinmux 0 0 252>;
                                status = "disabled";
                                st-plgpio,ngpio = <250>;
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index ab45b8c81982..95372080eea6 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -25,7 +25,7 @@
                pinmux: pinmux@b4000000 {
                        compatible = "st,spear310-pinmux";
                        reg = <0xb4000000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                fsmc: flash@44000000 {
@@ -102,7 +102,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 102>;
+                                gpio-ranges = <&pinmux 0 0 102>;
                                status = "disabled";
                                st-plgpio,ngpio = <102>;
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index caa5520b1fd4..ffea342aeec9 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -24,7 +24,7 @@
                pinmux: pinmux@b3000000 {
                        compatible = "st,spear320-pinmux";
                        reg = <0xb3000000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                clcd@90000000 {
@@ -130,7 +130,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 102>;
+                                gpio-ranges = <&pinmux 0 0 102>;
                                status = "disabled";
                                st-plgpio,ngpio = <102>;
diff --git a/arch/arm/boot/dts/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500-bv07.dts
index 567cf4e8ab84..877b33afa7ed 100644
--- a/arch/arm/boot/dts/vt8500-bv07.dts
+++ b/arch/arm/boot/dts/vt8500-bv07.dts
@@ -11,26 +11,22 @@
 / {
        model = "Benign BV07 Netbook";
+};
-        /*
+&fb {
-         * Display node is based on Sascha Hauer's patch on dri-devel.
+        bits-per-pixel = <16>;
-         * Added a bpp property to calculate the size of the framebuffer
+        display-timings {
-         * until the binding is formalized.
+                native-mode = <&timing0>;
-         */
+                timing0: 800x480 {
-        display: display@0 {
+                        clock-frequency = <0>; /* unused but required */
-                modes {
+                        hactive = <800>;
-                        mode0: mode@0 {
+                        vactive = <480>;
-                                hactive = <800>;
+                        hfront-porch = <40>;
-                                vactive = <480>;
+                        hback-porch = <88>;
-                                hback-porch = <88>;
+                        hsync-len = <0>;
-                                hfront-porch = <40>;
+                        vback-porch = <32>;
-                                hsync-len = <0>;
+                        vfront-porch = <11>;
-                                vback-porch = <32>;
+                        vsync-len = <1>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <16>;     /* non-standard but required */
-                        };
                };
        };
 };
diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi
index cf31ced46602..68c8dc644383 100644
--- a/arch/arm/boot/dts/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500.dtsi
@@ -98,12 +98,10 @@
                        interrupts = <43>;
                };
-                fb@d800e400 {
+                fb: fb@d8050800 {
                        compatible = "via,vt8500-fb";
                        reg = <0xd800e400 0x400>;
                        interrupts = <12>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/boot/dts/wm8505-ref.dts b/arch/arm/boot/dts/wm8505-ref.dts
index fd4e248074c6..edd2cec3d37f 100644
--- a/arch/arm/boot/dts/wm8505-ref.dts
+++ b/arch/arm/boot/dts/wm8505-ref.dts
@@ -11,26 +11,22 @@
 / {
        model = "Wondermedia WM8505 Netbook";
+};
-        /*
+&fb {
-         * Display node is based on Sascha Hauer's patch on dri-devel.
+        bits-per-pixel = <32>;
-         * Added a bpp property to calculate the size of the framebuffer
+        display-timings {
-         * until the binding is formalized.
+                native-mode = <&timing0>;
-         */
+                timing0: 800x480 {
-        display: display@0 {
+                        clock-frequency = <0>; /* unused but required */
-                modes {
+                        hactive = <800>;
-                        mode0: mode@0 {
+                        vactive = <480>;
-                                hactive = <800>;
+                        hfront-porch = <40>;
-                                vactive = <480>;
+                        hback-porch = <88>;
-                                hback-porch = <88>;
+                        hsync-len = <0>;
-                                hfront-porch = <40>;
+                        vback-porch = <32>;
-                                hsync-len = <0>;
+                        vfront-porch = <11>;
-                                vback-porch = <32>;
+                        vsync-len = <1>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <32>;     /* non-standard but required */
-                        };
                };
        };
 };
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index e74a1c0fb9a2..bcf668d31b28 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -128,11 +128,9 @@
                        interrupts = <0>;
                };
-                fb@d8050800 {
+                fb: fb@d8050800 {
                        compatible = "wm,wm8505-fb";
                        reg = <0xd8050800 0x200>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/boot/dts/wm8650-mid.dts b/arch/arm/boot/dts/wm8650-mid.dts
index cefd938f842f..61671a0d9ede 100644
--- a/arch/arm/boot/dts/wm8650-mid.dts
+++ b/arch/arm/boot/dts/wm8650-mid.dts
@@ -11,26 +11,24 @@
 / {
        model = "Wondermedia WM8650-MID Tablet";
+};
+&fb {
+        bits-per-pixel = <16>;
-        /*
+        display-timings {
-         * Display node is based on Sascha Hauer's patch on dri-devel.
+                native-mode = <&timing0>;
-         * Added a bpp property to calculate the size of the framebuffer
+                timing0: 800x480 {
-         * until the binding is formalized.
+                        clock-frequency = <0>; /* unused but required */
-         */
+                        hactive = <800>;
-        display: display@0 {
+                        vactive = <480>;
-                modes {
+                        hfront-porch = <40>;
-                        mode0: mode@0 {
+                        hback-porch = <88>;
-                                hactive = <800>;
+                        hsync-len = <0>;
-                                vactive = <480>;
+                        vback-porch = <32>;
-                                hback-porch = <88>;
+                        vfront-porch = <11>;
-                                hfront-porch = <40>;
+                        vsync-len = <1>;
-                                hsync-len = <0>;
-                                vback-porch = <32>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <16>;     /* non-standard but required */
-                        };
                };
        };
 };
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index db3c0a12e052..9313407bbc30 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -128,11 +128,9 @@
                        interrupts = <43>;
                };
-                fb@d8050800 {
+                fb: fb@d8050800 {
                        compatible = "wm,wm8505-fb";
                        reg = <0xd8050800 0x200>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/boot/dts/wm8850-w70v2.dts b/arch/arm/boot/dts/wm8850-w70v2.dts
index fcc660c89540..32d22532cd6c 100644
--- a/arch/arm/boot/dts/wm8850-w70v2.dts
+++ b/arch/arm/boot/dts/wm8850-w70v2.dts
@@ -15,28 +15,6 @@
 / {
        model = "Wondermedia WM8850-W70v2 Tablet";
-        /*
-         * Display node is based on Sascha Hauer's patch on dri-devel.
-         * Added a bpp property to calculate the size of the framebuffer
-         * until the binding is formalized.
-         */
-        display: display@0 {
-                modes {
-                        mode0: mode@0 {
-                                hactive = <800>;
-                                vactive = <480>;
-                                hback-porch = <88>;
-                                hfront-porch = <40>;
-                                hsync-len = <0>;
-                                vback-porch = <32>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <16>;     /* non-standard but required */
-                        };
-                };
-        };
        backlight {
                compatible = "pwm-backlight";
                pwms = <&pwm 0 50000 1>;        /* duty inverted */
@@ -45,3 +23,21 @@
                default-brightness-level = <5>;
        };
 };
+&fb {
+        bits-per-pixel = <16>;
+        display-timings {
+                native-mode = <&timing0>;
+                timing0: 800x480 {
+                        clock-frequency = <0>; /* unused but required */
+                        hactive = <800>;
+                        vactive = <480>;
+                        hfront-porch = <40>;
+                        hback-porch = <88>;
+                        hsync-len = <0>;
+                        vback-porch = <32>;
+                        vfront-porch = <11>;
+                        vsync-len = <1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index e8cbfdc87bba..7149cd13e3b9 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -135,11 +135,9 @@
                        };
                };
-                fb@d8051700 {
+                fb: fb@d8051700 {
                        compatible = "wm,wm8505-fb";
                        reg = <0xd8051700 0x200>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index e36b01025321..088d6c11a0fa 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -188,6 +188,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_PHY=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_USB_STORAGE=y
 CONFIG_MMC=y
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
index 92386b20bd09..afa7249fac6e 100644
--- a/arch/arm/configs/lpc32xx_defconfig
+++ b/arch/arm/configs/lpc32xx_defconfig
@@ -134,6 +134,7 @@ CONFIG_SND_DEBUG_VERBOSE=y
 # CONFIG_SND_SPI is not set
 CONFIG_SND_SOC=y
 CONFIG_USB=y
+CONFIG_USB_PHY=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 6a99e30f81d2..87924d671115 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -120,6 +120,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_HOST=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_PHY=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_MMC=y
 CONFIG_MMC_MXS=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 42eab9a2a0fd..7e0ebb64a7f9 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -195,6 +195,7 @@ CONFIG_SND_SOC=y
 CONFIG_SND_OMAP_SOC=y
 # CONFIG_USB_HID is not set
 CONFIG_USB=y
+CONFIG_USB_PHY=y
 CONFIG_USB_DEBUG=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index cca9f15704ed..ea289e1435e7 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -19,14 +19,6 @@
 #undef _CACHE
 #undef MULTI_CACHE
-#if defined(CONFIG_CPU_CACHE_V3)
-# ifdef _CACHE
-#  define MULTI_CACHE 1
-# else
-#  define _CACHE v3
-# endif
-#endif
 #if defined(CONFIG_CPU_CACHE_V4)
 # ifdef _CACHE
 #  define MULTI_CACHE 1
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 02fe2fbe2477..ed94b1a366ae 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -37,7 +37,7 @@ extern int iop3xx_get_init_atu(void);
 * IOP3XX processor registers
 */
 #define IOP3XX_PERIPHERAL_PHYS_BASE     0xffffe000
-#define IOP3XX_PERIPHERAL_VIRT_BASE     0xfeffe000
+#define IOP3XX_PERIPHERAL_VIRT_BASE     0xfedfe000
 #define IOP3XX_PERIPHERAL_SIZE          0x00002000
 #define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
                                        IOP3XX_PERIPHERAL_SIZE - 1)
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index 6ef8afd1b64c..86b8fe398b95 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -111,7 +111,7 @@
 #define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
 #define L_PTE_S2_MT_WRITEBACK    (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
 #define L_PTE_S2_RDONLY          (_AT(pteval_t, 1) << 6)   /* HAP[1]   */
-#define L_PTE_S2_RDWR            (_AT(pteval_t, 2) << 6)   /* HAP[2:1] */
+#define L_PTE_S2_RDWR            (_AT(pteval_t, 3) << 6)   /* HAP[2:1] */
 /*
 * Hyp-mode PL2 PTE definitions for LPAE.
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 80d6fc4dbe4a..9bcd262a9008 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,6 +61,15 @@ extern void __pgd_error(const char *file, int line, pgd_t);
 #define FIRST_USER_ADDRESS      PAGE_SIZE
 /*
+ * Use TASK_SIZE as the ceiling argument for free_pgtables() and
+ * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
+ * page shared between user and kernel).
+ */
+#ifdef CONFIG_ARM_LPAE
+#define USER_PGTABLES_CEILING   TASK_SIZE
+#endif
+/*
 * The pgprot_* and protection_map entries will be fixed up in runtime
 * to include the cachable and bufferable bits based on memory policy,
 * as well as any architecture dependent bits like global/ASID and SMP
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 9e9c041358ca..ab865e65a84c 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -14,7 +14,6 @@
 #include <asm/glue.h>
-#define TLB_V3_PAGE     (1 << 0)
 #define TLB_V4_U_PAGE   (1 << 1)
 #define TLB_V4_D_PAGE   (1 << 2)
 #define TLB_V4_I_PAGE   (1 << 3)
@@ -22,7 +21,6 @@
 #define TLB_V6_D_PAGE   (1 << 5)
 #define TLB_V6_I_PAGE   (1 << 6)
-#define TLB_V3_FULL     (1 << 8)
 #define TLB_V4_U_FULL   (1 << 9)
 #define TLB_V4_D_FULL   (1 << 10)
 #define TLB_V4_I_FULL   (1 << 11)
@@ -52,7 +50,6 @@
 *      =============
 *
 *      We have the following to choose from:
- *        v3    - ARMv3
 *        v4    - ARMv4 without write buffer
 *        v4wb  - ARMv4 with write buffer without I TLB flush entry instruction
 *        v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
@@ -330,7 +327,6 @@ static inline void local_flush_tlb_all(void)
        if (tlb_flag(TLB_WB))
                dsb();
-        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
        tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
        tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
        tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
@@ -351,9 +347,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
        if (tlb_flag(TLB_WB))
                dsb();
-        if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
+        if (possible_tlb_flags & (TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
                if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
-                        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
                        tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
                        tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
                        tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
@@ -385,9 +380,8 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
        if (tlb_flag(TLB_WB))
                dsb();
-        if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
+        if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
            cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
-                tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
                tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
                tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
                tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
@@ -418,7 +412,6 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
        if (tlb_flag(TLB_WB))
                dsb();
-        tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
        tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
        tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
        tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
diff --git a/arch/arm/kernel/early_printk.c b/arch/arm/kernel/early_printk.c
index 85aa2b292692..43076536965c 100644
--- a/arch/arm/kernel/early_printk.c
+++ b/arch/arm/kernel/early_printk.c
@@ -29,28 +29,17 @@ static void early_console_write(struct console *con, const char *s, unsigned n)
        early_write(s, n);
 }
-static struct console early_console = {
+static struct console early_console_dev = {
        .name =         "earlycon",
        .write =        early_console_write,
        .flags =        CON_PRINTBUFFER | CON_BOOT,
        .index =        -1,
 };
-asmlinkage void early_printk(const char *fmt, ...)
-{
-        char buf[512];
-        int n;
-        va_list ap;
-        va_start(ap, fmt);
-        n = vscnprintf(buf, sizeof(buf), fmt, ap);
-        early_write(buf, n);
-        va_end(ap);
-}
 static int __init setup_early_printk(char *buf)
 {
-        register_console(&early_console);
+        early_console = &early_console_dev;
+        register_console(&early_console_dev);
        return 0;
 }
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 5dc1aa6f0f7d..1fd749ee4a1b 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1043,7 +1043,7 @@ static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
        return NOTIFY_OK;
 }
-static struct notifier_block __cpuinitdata dbg_cpu_pm_nb = {
+static struct notifier_block dbg_cpu_pm_nb = {
        .notifier_call = dbg_cpu_pm_notify,
 };
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 146157dfe27c..8c3094d0f7b7 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -253,7 +253,10 @@ validate_event(struct pmu_hw_events *hw_events,
        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
        struct pmu *leader_pmu = event->group_leader->pmu;
-        if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
+        if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
+                return 1;
+        if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
                return 1;
        return armpmu->get_event_idx(hw_events, event) >= 0;
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index bd6f56b9ec21..59d2adb764a9 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -45,12 +45,12 @@ static u32 notrace jiffy_sched_clock_read(void)
 static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
 {
        return (cyc * mult) >> shift;
 }
-static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
+static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
 {
        u64 epoch_ns;
        u32 epoch_cyc;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d343a6c3a6d1..234e339196c0 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -56,7 +56,6 @@
 #include <asm/virt.h>
 #include "atags.h"
-#include "tcm.h"
 #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
@@ -798,8 +797,6 @@ void __init setup_arch(char **cmdline_p)
        reserve_crashkernel();
-        tcm_init();
 #ifdef CONFIG_MULTI_IRQ_HANDLER
        handle_arch_irq = mdesc->handle_irq;
 #endif
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30ae6bb4a310..f50f19e5c138 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -17,7 +17,6 @@
 #include <asm/mach/map.h>
 #include <asm/memory.h>
 #include <asm/system_info.h>
-#include "tcm.h"
 static struct gen_pool *tcm_pool;
 static bool dtcm_present;
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 5a936988eb24..c1fe498983ac 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -201,6 +201,7 @@ int kvm_dev_ioctl_check_extension(long ext)
                break;
        case KVM_CAP_ARM_SET_DEVICE_ADDR:
                r = 1;
+                break;
        case KVM_CAP_NR_VCPUS:
                r = num_online_cpus();
                break;
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 4ea9a982269c..7bed7556077a 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -79,11 +79,11 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
        u32 val;
        int cpu;
-        cpu = get_cpu();
        if (!p->is_write)
                return read_from_write_only(vcpu, p);
+        cpu = get_cpu();
        cpumask_setall(&vcpu->arch.require_dcache_flush);
        cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b67cd5374117..44199bc2c665 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
        CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
        CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
        CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index d3addee43d8d..2ec5efea3f03 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -262,6 +262,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 5dfc8fd87103..ccd078355eed 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -172,6 +172,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 44a9a62dcc13..a200d8a17123 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 497fcb793dc1..d28c7fbaba2d 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -97,6 +97,19 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
 static struct regulator_consumer_supply max8952_consumer =
        REGULATOR_SUPPLY("vdd_arm", NULL);
+static struct regulator_init_data universal_max8952_reg_data = {
+        .constraints    = {
+                .name           = "VARM_1.2V",
+                .min_uV         = 770000,
+                .max_uV         = 1400000,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+                .always_on      = 1,
+                .boot_on        = 1,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &max8952_consumer,
+};
 static struct max8952_platform_data universal_max8952_pdata __initdata = {
        .gpio_vid0      = EXYNOS4_GPX0(3),
        .gpio_vid1      = EXYNOS4_GPX0(4),
@@ -105,19 +118,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
        .dvs_mode       = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
        .sync_freq      = 0, /* default: fastest */
        .ramp_speed     = 0, /* default: fastest */
+        .reg_data       = &universal_max8952_reg_data,
-        .reg_data       = {
-                .constraints    = {
-                        .name           = "VARM_1.2V",
-                        .min_uV         = 770000,
-                        .max_uV         = 1400000,
-                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
-                        .always_on      = 1,
-                        .boot_on        = 1,
-                },
-                .num_consumer_supplies  = 1,
-                .consumer_supplies      = &max8952_consumer,
-        },
 };
 static struct regulator_consumer_supply lp3974_buck1_consumer =
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c
index b81cc569a8dd..6af40662a449 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -204,9 +204,9 @@ static int exynos4210_usb_phy1_exit(struct platform_device *pdev)
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return exynos4210_usb_phy0_init(pdev);
-        else if (type == S5P_USB_PHY_HOST)
+        else if (type == USB_PHY_TYPE_HOST)
                return exynos4210_usb_phy1_init(pdev);
        return -EINVAL;
@@ -214,9 +214,9 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return exynos4210_usb_phy0_exit(pdev);
-        else if (type == S5P_USB_PHY_HOST)
+        else if (type == USB_PHY_TYPE_HOST)
                return exynos4210_usb_phy1_exit(pdev);
        return -EINVAL;
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index f30c52843396..890cae23c12a 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -28,13 +28,11 @@ extern void secondary_startup(void);
 */
 void __ref highbank_cpu_die(unsigned int cpu)
 {
-        flush_cache_all();
        highbank_set_cpu_jump(cpu, phys_to_virt(0));
-        highbank_set_core_pwr();
-        cpu_do_idle();
+        flush_cache_louis();
+        highbank_set_core_pwr();
-        /* We should never return from idle */
+        while (1)
-        panic("highbank: cpu %d unexpectedly exit from shutdown\n", cpu);
+                cpu_do_idle();
 }
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 1ab91b5209e6..85b728cc27ab 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -169,7 +169,7 @@ struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
        busy->mux.reg = reg;
        busy->mux.shift = shift;
-        busy->mux.width = width;
+        busy->mux.mask = BIT(width) - 1;
        busy->mux.lock = &imx_ccm_lock;
        busy->mux_ops = &clk_mux_ops;
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index e13a8fa5e62c..2193c834f55c 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -257,6 +257,7 @@ int __init mx35_clocks_init(void)
        clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
        clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
        clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
+        clk_register_clkdev(clk[admux_gate], "audmux", NULL);
        clk_prepare_enable(clk[spba_gate]);
        clk_prepare_enable(clk[gpio1_gate]);
@@ -265,6 +266,7 @@ int __init mx35_clocks_init(void)
        clk_prepare_enable(clk[iim_gate]);
        clk_prepare_enable(clk[emi_gate]);
        clk_prepare_enable(clk[max_gate]);
+        clk_prepare_enable(clk[iomuxc_gate]);
        /*
         * SCC is needed to boot via mmc after a watchdog reset. The clock code
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2f9ff93a4e61..d38e54f5b6d7 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -115,7 +115,7 @@ static const char *gpu2d_core_sels[]	= { "axi", "pll3_usb_otg", "pll2_pfd0_352m"
 static const char *gpu3d_core_sels[]    = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
 static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
 static const char *ipu_sels[]           = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
-static const char *ldb_di_sels[]        = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", };
+static const char *ldb_di_sels[]        = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
 static const char *ipu_di_pre_sels[]    = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
 static const char *ipu1_di0_sels[]      = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
 static const char *ipu1_di1_sels[]      = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
@@ -443,7 +443,6 @@ int __init mx6q_clocks_init(void)
        clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
-        clk_register_clkdev(clk[twd], NULL, "smp_twd");
        clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
        clk_register_clkdev(clk[ahb], "ahb", NULL);
        clk_register_clkdev(clk[cko1], "cko1", NULL);
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index f655b2637b0e..e5f70415905a 100644
--- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
        .duplex         = DUPLEX_FULL,
 };
+static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
+};
 void __init iomega_ix2_200_init(void)
 {
        /*
         * Basic setup. Needs to be called early.
         */
-        kirkwood_ge01_init(&iomega_ix2_200_ge00_data);
+        kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
+        kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
 }
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 9f64d5632e07..76901f4ce611 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -223,13 +223,7 @@ static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
 };
 #if defined(CONFIG_USB_EHCI_MV)
-static char *pxa168_sph_clock_name[] = {
-        [0] = "PXA168-USBCLK",
-};
 static struct mv_usb_platform_data pxa168_sph_pdata = {
-        .clknum         = 1,
-        .clkname        = pxa168_sph_clock_name,
        .mode           = MV_USB_MODE_HOST,
        .phy_init       = pxa_usb_phy_init,
        .phy_deinit     = pxa_usb_phy_deinit,
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 22a9058f9f4d..6528a5fa6a26 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -162,13 +162,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
 #ifdef CONFIG_USB_SUPPORT
 #if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
-static char *pxa910_usb_clock_name[] = {
-        [0] = "U2OCLK",
-};
 static struct mv_usb_platform_data ttc_usb_pdata = {
-        .clknum         = 1,
-        .clkname        = pxa910_usb_clock_name,
        .vbus           = NULL,
        .mode           = MV_USB_MODE_OTG,
        .otg_force_a_bus_req = 1,
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c
index 6a9195e10579..d5970f5a1e8d 100644
--- a/arch/arm/mach-mvebu/irq-armada-370-xp.c
+++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c
@@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain;
 */
 static void armada_370_xp_irq_mask(struct irq_data *d)
 {
-#ifdef CONFIG_SMP
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
        if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
@@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d)
        else
                writel(hwirq, per_cpu_int_base +
                                ARMADA_370_XP_INT_SET_MASK_OFFS);
-#else
-        writel(irqd_to_hwirq(d),
-               per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
-#endif
 }
 static void armada_370_xp_irq_unmask(struct irq_data *d)
 {
-#ifdef CONFIG_SMP
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
        if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
@@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)
        else
                writel(hwirq, per_cpu_int_base +
                                ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
-#else
-        writel(irqd_to_hwirq(d),
-               per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
-#endif
 }
 #ifdef CONFIG_SMP
@@ -146,7 +136,11 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
                                      unsigned int virq, irq_hw_number_t hw)
 {
        armada_370_xp_irq_mask(irq_get_irq_data(virq));
-        writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
+        if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+                writel(hw, per_cpu_int_base +
+                        ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
+        else
+                writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
        irq_set_status_flags(virq, IRQ_LEVEL);
        if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 9e0576569e07..eaba9dc91a0d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2714,16 +2714,22 @@ static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
        { }
 };
-static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = {
-        { .role = "48mhz", .clk = "ocp2scp_usb_phy_phy_48m" },
-};
 /* ocp2scp_usb_phy */
 static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
        .name           = "ocp2scp_usb_phy",
        .class          = &omap44xx_ocp2scp_hwmod_class,
        .clkdm_name     = "l3_init_clkdm",
-        .main_clk       = "func_48m_fclk",
+        /*
+         * ocp2scp_usb_phy_phy_48m is provided by the OMAP4 PRCM IP
+         * block as an "optional clock," and normally should never be
+         * specified as the main_clk for an OMAP IP block.  However it
+         * turns out that this clock is actually the main clock for
+         * the ocp2scp_usb_phy IP block:
+         * http://lists.infradead.org/pipermail/linux-arm-kernel/2012-September/119943.html
+         * So listing ocp2scp_usb_phy_phy_48m as a main_clk here seems
+         * to be the best workaround.
+         */
+        .main_clk       = "ocp2scp_usb_phy_phy_48m",
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET,
@@ -2732,8 +2738,6 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
                },
        },
        .dev_attr       = ocp2scp_dev_attr,
-        .opt_clks       = ocp2scp_usb_phy_opt_clks,
-        .opt_clks_cnt   = ARRAY_SIZE(ocp2scp_usb_phy_opt_clks),
 };
 /*
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 04b87ec92537..1069b5680826 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -123,6 +123,11 @@ static struct clk s3c2440_clk_ac97 = {
        .ctrlbit        = S3C2440_CLKCON_AC97,
 };
+#define S3C24XX_VA_UART0      (S3C_VA_UART)
+#define S3C24XX_VA_UART1      (S3C_VA_UART + 0x4000 )
+#define S3C24XX_VA_UART2      (S3C_VA_UART + 0x8000 )
+#define S3C24XX_VA_UART3      (S3C_VA_UART + 0xC000 )
 static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
 {
        unsigned long ucon0, ucon1, ucon2, divisor;
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 6bcf87f65f9e..92e609440c57 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -239,6 +239,11 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 /* Serial port registrations */
+#define S3C2410_PA_UART0      (S3C24XX_PA_UART)
+#define S3C2410_PA_UART1      (S3C24XX_PA_UART + 0x4000 )
+#define S3C2410_PA_UART2      (S3C24XX_PA_UART + 0x8000 )
+#define S3C2443_PA_UART3      (S3C24XX_PA_UART + 0xC000 )
 static struct resource s3c2410_uart0_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),
        [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \
diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h
index b7a9f4d469e8..1e73f5fa8659 100644
--- a/arch/arm/mach-s3c24xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h
@@ -188,10 +188,8 @@
 #if defined(CONFIG_CPU_S3C2416)
 #define NR_IRQS (IRQ_S3C2416_I2S1 + 1)
-#elif defined(CONFIG_CPU_S3C2443)
-#define NR_IRQS (IRQ_S3C2443_AC97+1)
 #else
-#define NR_IRQS (IRQ_S3C2440_AC97+1)
+#define NR_IRQS (IRQ_S3C2443_AC97 + 1)
 #endif
 /* compatibility define. */
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index cb9f5e011e73..d8ba9bee4c7e 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
                base = (void *)0xfd000000;
                intc->reg_mask = base + 0xa4;
-                intc->reg_pending = base + 0x08;
+                intc->reg_pending = base + 0xa8;
                irq_num = 20;
                irq_start = S3C2410_IRQ(32);
                irq_offset = 4;
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index c8174d95339b..ca960bda02fd 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -76,7 +76,7 @@ static int s3c_usb_otgphy_exit(struct platform_device *pdev)
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s3c_usb_otgphy_init(pdev);
        return -EINVAL;
@@ -84,7 +84,7 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s3c_usb_otgphy_exit(pdev);
        return -EINVAL;
diff --git a/arch/arm/mach-s5pv210/setup-usb-phy.c b/arch/arm/mach-s5pv210/setup-usb-phy.c
index 356a0900af03..b2ee5333f89c 100644
--- a/arch/arm/mach-s5pv210/setup-usb-phy.c
+++ b/arch/arm/mach-s5pv210/setup-usb-phy.c
@@ -80,7 +80,7 @@ static int s5pv210_usb_otgphy_exit(struct platform_device *pdev)
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s5pv210_usb_otgphy_init(pdev);
        return -EINVAL;
@@ -88,7 +88,7 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s5pv210_usb_otgphy_exit(pdev);
        return -EINVAL;
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index f2ec0777cfbe..ff8b7ba9b93c 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -169,7 +169,7 @@ static int usbhsf_get_id(struct platform_device *pdev)
        return USBHS_GADGET;
 }
-static void usbhsf_power_ctrl(struct platform_device *pdev,
+static int usbhsf_power_ctrl(struct platform_device *pdev,
                              void __iomem *base, int enable)
 {
        struct usbhsf_private *priv = usbhsf_get_priv(pdev);
@@ -223,6 +223,8 @@ static void usbhsf_power_ctrl(struct platform_device *pdev,
                clk_disable(priv->pci);         /* usb work around */
                clk_disable(priv->usb24);       /* usb work around */
        }
+        return 0;
 }
 static int usbhsf_get_vbus(struct platform_device *pdev)
@@ -239,7 +241,7 @@ static irqreturn_t usbhsf_interrupt(int irq, void *data)
        return IRQ_HANDLED;
 }
-static void usbhsf_hardware_exit(struct platform_device *pdev)
+static int usbhsf_hardware_exit(struct platform_device *pdev)
 {
        struct usbhsf_private *priv = usbhsf_get_priv(pdev);
@@ -264,6 +266,8 @@ static void usbhsf_hardware_exit(struct platform_device *pdev)
        priv->usbh_base = NULL;
        free_irq(IRQ7, pdev);
+        return 0;
 }
 static int usbhsf_hardware_init(struct platform_device *pdev)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 7f3a6b7e7b7c..a385f570bbfc 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -155,12 +155,14 @@ static int usbhs_get_vbus(struct platform_device *pdev)
        return !((1 << 7) & __raw_readw(priv->cr2));
 }
-static void usbhs_phy_reset(struct platform_device *pdev)
+static int usbhs_phy_reset(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
        /* init phy */
        __raw_writew(0x8a0a, priv->cr2);
+        return 0;
 }
 static int usbhs_get_id(struct platform_device *pdev)
@@ -202,7 +204,7 @@ static int usbhs_hardware_init(struct platform_device *pdev)
        return 0;
 }
-static void usbhs_hardware_exit(struct platform_device *pdev)
+static int usbhs_hardware_exit(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
@@ -210,6 +212,8 @@ static void usbhs_hardware_exit(struct platform_device *pdev)
        __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->phy);
        free_irq(IRQ15, pdev);
+        return 0;
 }
 static u32 usbhs_pipe_cfg[] = {
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index db968a585ff0..979237c18dad 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -596,12 +596,14 @@ static int usbhs_get_vbus(struct platform_device *pdev)
        return usbhs_is_connected(usbhs_get_priv(pdev));
 }
-static void usbhs_phy_reset(struct platform_device *pdev)
+static int usbhs_phy_reset(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
        /* init phy */
        __raw_writew(0x8a0a, priv->usbcrcaddr);
+        return 0;
 }
 static int usbhs0_get_id(struct platform_device *pdev)
@@ -628,11 +630,13 @@ static int usbhs0_hardware_init(struct platform_device *pdev)
        return 0;
 }
-static void usbhs0_hardware_exit(struct platform_device *pdev)
+static int usbhs0_hardware_exit(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
        cancel_delayed_work_sync(&priv->work);
+        return 0;
 }
 static struct usbhs_private usbhs0_private = {
@@ -735,7 +739,7 @@ static int usbhs1_hardware_init(struct platform_device *pdev)
        return 0;
 }
-static void usbhs1_hardware_exit(struct platform_device *pdev)
+static int usbhs1_hardware_exit(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
@@ -743,6 +747,8 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
        __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
        free_irq(IRQ8, pdev);
+        return 0;
 }
 static int usbhs1_get_id(struct platform_device *pdev)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index d1c4893894ce..dbc653ea851c 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -18,8 +18,8 @@ config ARCH_TEGRA_2x_SOC
        select PL310_ERRATA_727915 if CACHE_L2X0
        select PL310_ERRATA_769419 if CACHE_L2X0
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-        select USB_ULPI if USB
+        select USB_ULPI if USB_PHY
-        select USB_ULPI_VIEWPORT if USB_SUPPORT
+        select USB_ULPI_VIEWPORT if USB_PHY
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -37,8 +37,8 @@ config ARCH_TEGRA_3x_SOC
        select PINCTRL_TEGRA30
        select PL310_ERRATA_769419 if CACHE_L2X0
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-        select USB_ULPI if USB
+        select USB_ULPI if USB_PHY
-        select USB_ULPI_VIEWPORT if USB_SUPPORT
+        select USB_ULPI_VIEWPORT if USB_PHY
        help
          Support for NVIDIA Tegra T30 processor family, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 2a17bc506cff..ff3c9f016591 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -5,6 +5,7 @@
 *
 * Authors: Sundar Iyer <sundar.iyer@stericsson.com>
 *          Bengt Jonsson <bengt.g.jonsson@stericsson.com>
+ *          Daniel Willerud <daniel.willerud@stericsson.com>
 *
 * MOP500 board specific initialization for regulators
 */
@@ -12,6 +13,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/ab8500.h>
 #include "board-mop500-regulators.h"
+#include "id.h"
 static struct regulator_consumer_supply gpio_en_3v3_consumers[] = {
       REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
@@ -53,21 +55,37 @@ struct regulator_init_data tps61052_regulator = {
 };
 static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
-        /* External displays, connector on board 2v5 power supply */
+        /* Main display, u8500 R3 uib */
-        REGULATOR_SUPPLY("vaux12v5", "mcde.0"),
+        REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
+        /* Main display, u8500 uib and ST uib */
+        REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
+        /* Secondary display, ST uib */
+        REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
        /* SFH7741 proximity sensor */
        REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
        /* BH1780GLS ambient light sensor */
        REGULATOR_SUPPLY("vcc", "2-0029"),
        /* lsm303dlh accelerometer */
-        REGULATOR_SUPPLY("vdd", "3-0018"),
+        REGULATOR_SUPPLY("vdd", "2-0018"),
+        /* lsm303dlhc accelerometer */
+        REGULATOR_SUPPLY("vdd", "2-0019"),
        /* lsm303dlh magnetometer */
-        REGULATOR_SUPPLY("vdd", "3-001e"),
+        REGULATOR_SUPPLY("vdd", "2-001e"),
        /* Rohm BU21013 Touchscreen devices */
        REGULATOR_SUPPLY("avdd", "3-005c"),
        REGULATOR_SUPPLY("avdd", "3-005d"),
        /* Synaptics RMI4 Touchscreen device */
        REGULATOR_SUPPLY("vdd", "3-004b"),
+        /* L3G4200D Gyroscope device */
+        REGULATOR_SUPPLY("vdd", "2-0068"),
+        /* Ambient light sensor device */
+        REGULATOR_SUPPLY("vdd", "3-0029"),
+        /* Pressure sensor device */
+        REGULATOR_SUPPLY("vdd", "2-005c"),
+        /* Cypress TrueTouch Touchscreen device */
+        REGULATOR_SUPPLY("vcpin", "spi8.0"),
+        /* Camera device */
+        REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
 };
 static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
@@ -75,18 +93,50 @@ static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
        REGULATOR_SUPPLY("vmmc", "sdi4"),
        /* AB8500 audio codec */
        REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
+        /* AB8500 accessory detect 1 */
+        REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
+        /* AB8500 Tv-out device */
+        REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
+        /* AV8100 HDMI device */
+        REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
 };
 static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
+        REGULATOR_SUPPLY("v-SD-STM", "stm"),
        /* External MMC slot power */
        REGULATOR_SUPPLY("vmmc", "sdi0"),
 };
+static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
+};
+static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
+};
+static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
+};
+static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
+        /* AB8500 audio codec device */
+        REGULATOR_SUPPLY("v-aux8", NULL),
+};
+static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
+        /* Internal general-purpose ADC */
+        REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
+        /* ADC for charger */
+        REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
+};
 static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
        /* TV-out DENC supply */
        REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
        /* Internal general-purpose ADC */
        REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
+        /* ADC for charger */
+        REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
+        /* AB8500 Tv-out device */
+        REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
 };
 static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
@@ -114,77 +164,90 @@ static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
        REGULATOR_SUPPLY("v-intcore", NULL),
        /* USB Transceiver */
        REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
+        /* Handled by abx500 clk driver */
+        REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
+};
+static struct regulator_consumer_supply ab8505_usb_consumers[] = {
+        /* HS USB OTG physical interface */
+        REGULATOR_SUPPLY("v-ape", NULL),
 };
 static struct regulator_consumer_supply ab8500_vana_consumers[] = {
-        /* External displays, connector on board, 1v8 power supply */
+        /* DB8500 DSI */
-        REGULATOR_SUPPLY("vsmps2", "mcde.0"),
+        REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
+        REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
+        REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
+        REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
+        REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
+        REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
+        /* DB8500 CSI */
+        REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
 };
 /* ab8500 regulator register initialization */
-struct ab8500_regulator_reg_init
+static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
-ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
        /*
         * VanaRequestCtrl          = HP/LP depending on VxRequest
         * VextSupply1RequestCtrl   = HP/LP depending on VxRequest
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2,       0xf0, 0x00),
        /*
         * VextSupply2RequestCtrl   = HP/LP depending on VxRequest
         * VextSupply3RequestCtrl   = HP/LP depending on VxRequest
         * Vaux1RequestCtrl         = HP/LP depending on VxRequest
         * Vaux2RequestCtrl         = HP/LP depending on VxRequest
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3,       0xff, 0x00),
        /*
         * Vaux3RequestCtrl         = HP/LP depending on VxRequest
         * SwHPReq                  = Control through SWValid disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4,       0x07, 0x00),
        /*
         * VanaSysClkReq1HPValid    = disabled
         * Vaux1SysClkReq1HPValid   = disabled
         * Vaux2SysClkReq1HPValid   = disabled
         * Vaux3SysClkReq1HPValid   = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
        /*
         * VextSupply1SysClkReq1HPValid = disabled
         * VextSupply2SysClkReq1HPValid = disabled
         * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
        /*
         * VanaHwHPReq1Valid        = disabled
         * Vaux1HwHPreq1Valid       = disabled
         * Vaux2HwHPReq1Valid       = disabled
         * Vaux3HwHPReqValid        = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1,     0xe8, 0x00),
        /*
         * VextSupply1HwHPReq1Valid = disabled
         * VextSupply2HwHPReq1Valid = disabled
         * VextSupply3HwHPReq1Valid = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2,     0x07, 0x00),
        /*
         * VanaHwHPReq2Valid        = disabled
         * Vaux1HwHPReq2Valid       = disabled
         * Vaux2HwHPReq2Valid       = disabled
         * Vaux3HwHPReq2Valid       = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1,     0xe8, 0x00),
        /*
         * VextSupply1HwHPReq2Valid = disabled
         * VextSupply2HwHPReq2Valid = disabled
         * VextSupply3HwHPReq2Valid = HWReq2 controlled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2,     0x07, 0x04),
        /*
         * VanaSwHPReqValid         = disabled
         * Vaux1SwHPReqValid        = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1,      0xa0, 0x00),
        /*
         * Vaux2SwHPReqValid        = disabled
         * Vaux3SwHPReqValid        = disabled
@@ -192,7 +255,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * VextSupply2SwHPReqValid  = disabled
         * VextSupply3SwHPReqValid  = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2,      0x1f, 0x00),
        /*
         * SysClkReq2Valid1         = SysClkReq2 controlled
         * SysClkReq3Valid1         = disabled
@@ -202,7 +265,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * SysClkReq7Valid1         = disabled
         * SysClkReq8Valid1         = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1,    0xfe, 0x2a),
        /*
         * SysClkReq2Valid2         = disabled
         * SysClkReq3Valid2         = disabled
@@ -212,7 +275,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * SysClkReq7Valid2         = disabled
         * SysClkReq8Valid2         = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2,    0xfe, 0x20),
        /*
         * VTVoutEna                = disabled
         * Vintcore12Ena            = disabled
@@ -220,66 +283,62 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * Vintcore12LP             = inactive (HP)
         * VTVoutLP                 = inactive (HP)
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
+        INIT_REGULATOR_REGISTER(AB8500_REGUMISC1,              0xfe, 0x10),
        /*
         * VaudioEna                = disabled
         * VdmicEna                 = disabled
         * Vamic1Ena                = disabled
         * Vamic2Ena                = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY,           0x1e, 0x00),
        /*
         * Vamic1_dzout             = high-Z when Vamic1 is disabled
         * Vamic2_dzout             = high-Z when Vamic2 is disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC,         0x03, 0x00),
        /*
-         * VPll                     = Hw controlled
+         * VPll                     = Hw controlled (NOTE! PRCMU bits)
         * VanaRegu                 = force off
         */
-        INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
+        INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU,           0x0f, 0x02),
        /*
         * VrefDDREna               = disabled
         * VrefDDRSleepMode         = inactive (no pulldown)
         */
-        INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_VREFDDR,                0x03, 0x00),
        /*
-         * VextSupply1Regu          = HW control
+         * VextSupply1Regu          = force LP
-         * VextSupply2Regu          = HW control
+         * VextSupply2Regu          = force OFF
-         * VextSupply3Regu          = HW control
+         * VextSupply3Regu          = force HP (-> STBB2=LP and TPS=LP)
         * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
         * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
         */
-        INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
+        INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU,          0xff, 0x13),
        /*
         * Vaux1Regu                = force HP
         * Vaux2Regu                = force off
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
+        INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU,             0x0f, 0x01),
        /*
-         * Vaux3regu                = force off
+         * Vaux3Regu                = force off
         */
-        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU,          0x03, 0x00),
        /*
-         * Vsmps1                   = 1.15V
+         * Vaux1Sel                 = 2.8 V
         */
-        INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
+        INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL,               0x0f, 0x0C),
-        /*
-         * Vaux1Sel                 = 2.5 V
-         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
        /*
         * Vaux2Sel                 = 2.9 V
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
+        INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL,               0x0f, 0x0d),
        /*
         * Vaux3Sel                 = 2.91 V
         */
-        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
+        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL,           0x07, 0x07),
        /*
         * VextSupply12LP           = disabled (no LP)
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE,         0x01, 0x00),
        /*
         * Vaux1Disch               = short discharge time
         * Vaux2Disch               = short discharge time
@@ -288,33 +347,26 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * VTVoutDisch              = short discharge time
         * VaudioDisch              = short discharge time
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH,          0xfc, 0x00),
        /*
         * VanaDisch                = short discharge time
         * VdmicPullDownEna         = pulldown disabled when Vdmic is disabled
         * VdmicDisch               = short discharge time
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2,         0x16, 0x00),
 };
 /* AB8500 regulators */
-struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
+static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
        /* supplies to the display/camera */
        [AB8500_LDO_AUX1] = {
                .constraints = {
                        .name = "V-DISPLAY",
-                        .min_uV = 2500000,
+                        .min_uV = 2800000,
-                        .max_uV = 2900000,
+                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
                                          REGULATOR_CHANGE_STATUS,
                        .boot_on = 1, /* display is on at boot */
-                        /*
-                         * This voltage cannot be disabled right now because
-                         * it is somehow affecting the external MMC
-                         * functionality, though that typically will use
-                         * AUX3.
-                         */
-                        .always_on = 1,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
                .consumer_supplies = ab8500_vaux1_consumers,
@@ -326,7 +378,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
                        .min_uV = 1100000,
                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
-                                          REGULATOR_CHANGE_STATUS,
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
                .consumer_supplies = ab8500_vaux2_consumers,
@@ -338,7 +393,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
                        .min_uV = 1100000,
                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
-                                          REGULATOR_CHANGE_STATUS,
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
                .consumer_supplies = ab8500_vaux3_consumers,
@@ -392,18 +450,614 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
        [AB8500_LDO_INTCORE] = {
                .constraints = {
                        .name = "V-INTCORE",
-                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                        .min_uV = 1250000,
+                        .max_uV = 1350000,
+                        .input_uV = 1800000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE |
+                                          REGULATOR_CHANGE_DRMS,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
                .consumer_supplies = ab8500_vintcore_consumers,
        },
-        /* supply for U8500 CSI/DSI, VANA LDO */
+        /* supply for U8500 CSI-DSI, VANA LDO */
        [AB8500_LDO_ANA] = {
                .constraints = {
-                        .name = "V-CSI/DSI",
+                        .name = "V-CSI-DSI",
                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
                .consumer_supplies = ab8500_vana_consumers,
        },
 };
+/* supply for VextSupply3 */
+static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
+        /* SIM supply for 3 V SIM cards */
+        REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
+};
+/* extended configuration for VextSupply2, only used for HREFP_V20 boards */
+static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = {
+        .hwreq = true,
+};
+/*
+ * AB8500 external regulators
+ */
+static struct regulator_init_data ab8500_ext_regulators[] = {
+        /* fixed Vbat supplies VSMPS1_EXT_1V8 */
+        [AB8500_EXT_SUPPLY1] = {
+                .constraints = {
+                        .name = "ab8500-ext-supply1",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                        .initial_mode = REGULATOR_MODE_IDLE,
+                        .boot_on = 1,
+                        .always_on = 1,
+                },
+        },
+        /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
+        [AB8500_EXT_SUPPLY2] = {
+                .constraints = {
+                        .name = "ab8500-ext-supply2",
+                        .min_uV = 1360000,
+                        .max_uV = 1360000,
+                },
+        },
+        /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
+        [AB8500_EXT_SUPPLY3] = {
+                .constraints = {
+                        .name = "ab8500-ext-supply3",
+                        .min_uV = 3400000,
+                        .max_uV = 3400000,
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                        .boot_on = 1,
+                },
+                .num_consumer_supplies =
+                        ARRAY_SIZE(ab8500_ext_supply3_consumers),
+                .consumer_supplies = ab8500_ext_supply3_consumers,
+        },
+};
+/* ab8505 regulator register initialization */
+static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
+        /*
+         * VarmRequestCtrl
+         * VsmpsCRequestCtrl
+         * VsmpsARequestCtrl
+         * VsmpsBRequestCtrl
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1,       0x00, 0x00),
+        /*
+         * VsafeRequestCtrl
+         * VpllRequestCtrl
+         * VanaRequestCtrl          = HP/LP depending on VxRequest
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2,       0x30, 0x00),
+        /*
+         * Vaux1RequestCtrl         = HP/LP depending on VxRequest
+         * Vaux2RequestCtrl         = HP/LP depending on VxRequest
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3,       0xf0, 0x00),
+        /*
+         * Vaux3RequestCtrl         = HP/LP depending on VxRequest
+         * SwHPReq                  = Control through SWValid disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4,       0x07, 0x00),
+        /*
+         * VsmpsASysClkReq1HPValid
+         * VsmpsBSysClkReq1HPValid
+         * VsafeSysClkReq1HPValid
+         * VanaSysClkReq1HPValid    = disabled
+         * VpllSysClkReq1HPValid
+         * Vaux1SysClkReq1HPValid   = disabled
+         * Vaux2SysClkReq1HPValid   = disabled
+         * Vaux3SysClkReq1HPValid   = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
+        /*
+         * VsmpsCSysClkReq1HPValid
+         * VarmSysClkReq1HPValid
+         * VbbSysClkReq1HPValid
+         * VsmpsMSysClkReq1HPValid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
+        /*
+         * VsmpsAHwHPReq1Valid
+         * VsmpsBHwHPReq1Valid
+         * VsafeHwHPReq1Valid
+         * VanaHwHPReq1Valid        = disabled
+         * VpllHwHPReq1Valid
+         * Vaux1HwHPreq1Valid       = disabled
+         * Vaux2HwHPReq1Valid       = disabled
+         * Vaux3HwHPReqValid        = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1,     0xe8, 0x00),
+        /*
+         * VsmpsMHwHPReq1Valid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2,     0x00, 0x00),
+        /*
+         * VsmpsAHwHPReq2Valid
+         * VsmpsBHwHPReq2Valid
+         * VsafeHwHPReq2Valid
+         * VanaHwHPReq2Valid        = disabled
+         * VpllHwHPReq2Valid
+         * Vaux1HwHPReq2Valid       = disabled
+         * Vaux2HwHPReq2Valid       = disabled
+         * Vaux3HwHPReq2Valid       = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1,     0xe8, 0x00),
+        /*
+         * VsmpsMHwHPReq2Valid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2,     0x00, 0x00),
+        /**
+         * VsmpsCSwHPReqValid
+         * VarmSwHPReqValid
+         * VsmpsASwHPReqValid
+         * VsmpsBSwHPReqValid
+         * VsafeSwHPReqValid
+         * VanaSwHPReqValid
+         * VanaSwHPReqValid         = disabled
+         * VpllSwHPReqValid
+         * Vaux1SwHPReqValid        = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1,      0xa0, 0x00),
+        /*
+         * Vaux2SwHPReqValid        = disabled
+         * Vaux3SwHPReqValid        = disabled
+         * VsmpsMSwHPReqValid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2,      0x03, 0x00),
+        /*
+         * SysClkReq2Valid1         = SysClkReq2 controlled
+         * SysClkReq3Valid1         = disabled
+         * SysClkReq4Valid1         = SysClkReq4 controlled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1,    0x0e, 0x0a),
+        /*
+         * SysClkReq2Valid2         = disabled
+         * SysClkReq3Valid2         = disabled
+         * SysClkReq4Valid2         = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2,    0x0e, 0x00),
+        /*
+         * Vaux4SwHPReqValid
+         * Vaux4HwHPReq2Valid
+         * Vaux4HwHPReq1Valid
+         * Vaux4SysClkReq1HPValid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID,    0x00, 0x00),
+        /*
+         * VadcEna                  = disabled
+         * VintCore12Ena            = disabled
+         * VintCore12Sel            = 1.25 V
+         * VintCore12LP             = inactive (HP)
+         * VadcLP                   = inactive (HP)
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUMISC1,              0xfe, 0x10),
+        /*
+         * VaudioEna                = disabled
+         * Vaux8Ena                 = disabled
+         * Vamic1Ena                = disabled
+         * Vamic2Ena                = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY,           0x1e, 0x00),
+        /*
+         * Vamic1_dzout             = high-Z when Vamic1 is disabled
+         * Vamic2_dzout             = high-Z when Vamic2 is disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC,         0x03, 0x00),
+        /*
+         * VsmpsARegu
+         * VsmpsASelCtrl
+         * VsmpsAAutoMode
+         * VsmpsAPWMMode
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU,    0x00, 0x00),
+        /*
+         * VsmpsBRegu
+         * VsmpsBSelCtrl
+         * VsmpsBAutoMode
+         * VsmpsBPWMMode
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU,    0x00, 0x00),
+        /*
+         * VsafeRegu
+         * VsafeSelCtrl
+         * VsafeAutoMode
+         * VsafePWMMode
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU,    0x00, 0x00),
+        /*
+         * VPll                     = Hw controlled (NOTE! PRCMU bits)
+         * VanaRegu                 = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU,           0x0f, 0x02),
+        /*
+         * VextSupply1Regu          = force OFF (OTP_ExtSupply12LPnPolarity 1)
+         * VextSupply2Regu          = force OFF (OTP_ExtSupply12LPnPolarity 1)
+         * VextSupply3Regu          = force OFF (OTP_ExtSupply3LPnPolarity 0)
+         * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
+         * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
+         */
+        INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU,          0xff, 0x30),
+        /*
+         * Vaux1Regu                = force HP
+         * Vaux2Regu                = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU,             0x0f, 0x01),
+        /*
+         * Vaux3Regu                = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU,          0x03, 0x00),
+        /*
+         * VsmpsASel1
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1,    0x00, 0x00),
+        /*
+         * VsmpsASel2
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2,    0x00, 0x00),
+        /*
+         * VsmpsASel3
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3,    0x00, 0x00),
+        /*
+         * VsmpsBSel1
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1,    0x00, 0x00),
+        /*
+         * VsmpsBSel2
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2,    0x00, 0x00),
+        /*
+         * VsmpsBSel3
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3,    0x00, 0x00),
+        /*
+         * VsafeSel1
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1,    0x00, 0x00),
+        /*
+         * VsafeSel2
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2,    0x00, 0x00),
+        /*
+         * VsafeSel3
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3,    0x00, 0x00),
+        /*
+         * Vaux1Sel                 = 2.8 V
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL,               0x0f, 0x0C),
+        /*
+         * Vaux2Sel                 = 2.9 V
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL,               0x0f, 0x0d),
+        /*
+         * Vaux3Sel                 = 2.91 V
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL,           0x07, 0x07),
+        /*
+         * Vaux4RequestCtrl
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL,    0x00, 0x00),
+        /*
+         * Vaux4Regu
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU,    0x00, 0x00),
+        /*
+         * Vaux4Sel
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL,    0x00, 0x00),
+        /*
+         * Vaux1Disch               = short discharge time
+         * Vaux2Disch               = short discharge time
+         * Vaux3Disch               = short discharge time
+         * Vintcore12Disch          = short discharge time
+         * VTVoutDisch              = short discharge time
+         * VaudioDisch              = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH,          0xfc, 0x00),
+        /*
+         * VanaDisch                = short discharge time
+         * Vaux8PullDownEna         = pulldown disabled when Vaux8 is disabled
+         * Vaux8Disch               = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2,         0x16, 0x00),
+        /*
+         * Vaux4Disch               = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3,         0x01, 0x00),
+        /*
+         * Vaux5Sel
+         * Vaux5LP
+         * Vaux5Ena
+         * Vaux5Disch
+         * Vaux5DisSfst
+         * Vaux5DisPulld
+         */
+        INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5,              0x00, 0x00),
+        /*
+         * Vaux6Sel
+         * Vaux6LP
+         * Vaux6Ena
+         * Vaux6DisPulld
+         */
+        INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6,              0x00, 0x00),
+};
+struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
+        /* supplies to the display/camera */
+        [AB8505_LDO_AUX1] = {
+                .constraints = {
+                        .name = "V-DISPLAY",
+                        .min_uV = 2800000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS,
+                        .boot_on = 1, /* display is on at boot */
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
+                .consumer_supplies = ab8500_vaux1_consumers,
+        },
+        /* supplies to the on-board eMMC */
+        [AB8505_LDO_AUX2] = {
+                .constraints = {
+                        .name = "V-eMMC1",
+                        .min_uV = 1100000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
+                .consumer_supplies = ab8500_vaux2_consumers,
+        },
+        /* supply for VAUX3, supplies to SDcard slots */
+        [AB8505_LDO_AUX3] = {
+                .constraints = {
+                        .name = "V-MMC-SD",
+                        .min_uV = 1100000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
+                .consumer_supplies = ab8500_vaux3_consumers,
+        },
+        /* supply for VAUX4, supplies to NFC and standalone secure element */
+        [AB8505_LDO_AUX4] = {
+                .constraints = {
+                        .name = "V-NFC-SE",
+                        .min_uV = 1100000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
+                .consumer_supplies = ab8505_vaux4_consumers,
+        },
+        /* supply for VAUX5, supplies to TBD */
+        [AB8505_LDO_AUX5] = {
+                .constraints = {
+                        .name = "V-AUX5",
+                        .min_uV = 1050000,
+                        .max_uV = 2790000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
+                .consumer_supplies = ab8505_vaux5_consumers,
+        },
+        /* supply for VAUX6, supplies to TBD */
+        [AB8505_LDO_AUX6] = {
+                .constraints = {
+                        .name = "V-AUX6",
+                        .min_uV = 1050000,
+                        .max_uV = 2790000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
+                .consumer_supplies = ab8505_vaux6_consumers,
+        },
+        /* supply for gpadc, ADC LDO */
+        [AB8505_LDO_ADC] = {
+                .constraints = {
+                        .name = "V-ADC",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
+                .consumer_supplies = ab8505_vadc_consumers,
+        },
+        /* supply for ab8500-vaudio, VAUDIO LDO */
+        [AB8505_LDO_AUDIO] = {
+                .constraints = {
+                        .name = "V-AUD",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
+                .consumer_supplies = ab8500_vaud_consumers,
+        },
+        /* supply for v-anamic1 VAMic1-LDO */
+        [AB8505_LDO_ANAMIC1] = {
+                .constraints = {
+                        .name = "V-AMIC1",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
+                .consumer_supplies = ab8500_vamic1_consumers,
+        },
+        /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
+        [AB8505_LDO_ANAMIC2] = {
+                .constraints = {
+                        .name = "V-AMIC2",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
+                .consumer_supplies = ab8500_vamic2_consumers,
+        },
+        /* supply for v-aux8, VAUX8 LDO */
+        [AB8505_LDO_AUX8] = {
+                .constraints = {
+                        .name = "V-AUX8",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
+                .consumer_supplies = ab8505_vaux8_consumers,
+        },
+        /* supply for v-intcore12, VINTCORE12 LDO */
+        [AB8505_LDO_INTCORE] = {
+                .constraints = {
+                        .name = "V-INTCORE",
+                        .min_uV = 1250000,
+                        .max_uV = 1350000,
+                        .input_uV = 1800000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE |
+                                          REGULATOR_CHANGE_DRMS,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
+                .consumer_supplies = ab8500_vintcore_consumers,
+        },
+        /* supply for LDO USB */
+        [AB8505_LDO_USB] = {
+                .constraints = {
+                        .name = "V-USB",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
+                .consumer_supplies = ab8505_usb_consumers,
+        },
+        /* supply for U8500 CSI-DSI, VANA LDO */
+        [AB8505_LDO_ANA] = {
+                .constraints = {
+                        .name = "V-CSI-DSI",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
+                .consumer_supplies = ab8500_vana_consumers,
+        },
+};
+struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
+        .reg_init               = ab8500_reg_init,
+        .num_reg_init           = ARRAY_SIZE(ab8500_reg_init),
+        .regulator              = ab8500_regulators,
+        .num_regulator          = ARRAY_SIZE(ab8500_regulators),
+        .ext_regulator          = ab8500_ext_regulators,
+        .num_ext_regulator      = ARRAY_SIZE(ab8500_ext_regulators),
+};
+/* Use the AB8500 init settings for AB8505 as they are the same right now */
+struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
+        .reg_init               = ab8505_reg_init,
+        .num_reg_init           = ARRAY_SIZE(ab8505_reg_init),
+        .regulator              = ab8505_regulators,
+        .num_regulator          = ARRAY_SIZE(ab8505_regulators),
+};
+static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
+{
+        int i;
+        if (cpu_is_u8520()) {
+                for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
+                        if (ab8505_reg_init[i].id == id) {
+                                u8 initval = ab8505_reg_init[i].value;
+                                initval = (initval & ~mask) | (value & mask);
+                                ab8505_reg_init[i].value = initval;
+                                BUG_ON(mask & ~ab8505_reg_init[i].mask);
+                                return;
+                        }
+                }
+        } else {
+                for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
+                        if (ab8500_reg_init[i].id == id) {
+                                u8 initval = ab8500_reg_init[i].value;
+                                initval = (initval & ~mask) | (value & mask);
+                                ab8500_reg_init[i].value = initval;
+                                BUG_ON(mask & ~ab8500_reg_init[i].mask);
+                                return;
+                        }
+                }
+        }
+        BUG_ON(1);
+}
+void mop500_regulator_init(void)
+{
+        struct regulator_init_data *regulator;
+        /*
+         * Temporarily turn on Vaux2 on 8520 machine
+         */
+        if (cpu_is_u8520()) {
+                /* Vaux2 initialized to be on */
+                ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
+        }
+        /*
+         * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
+         * all HREFP_V20 boards)
+         */
+        if (cpu_is_u8500v20()) {
+                /* VextSupply2RequestCtrl =  HP/OFF depending on VxRequest */
+                ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01);
+                /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */
+                ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2,
+                        0x20, 0x20);
+                /* VextSupply2 = force HP at initialization */
+                ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04);
+                /* enable VextSupply2 during platform active */
+                regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
+                regulator->constraints.always_on = 1;
+                /* disable VextSupply2 in suspend */
+                regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
+                regulator->constraints.state_mem.disabled = 1;
+                regulator->constraints.state_standby.disabled = 1;
+                /* enable VextSupply2 HW control (used in suspend) */
+                regulator->driver_data = (void *)&ab8500_ext_supply2;
+        }
+}
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index 78a0642a2206..9bece38fe933 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -14,10 +14,11 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/ab8500.h>
-extern struct ab8500_regulator_reg_init
+extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
-ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS];
+extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
-extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
 extern struct regulator_init_data tps61052_regulator;
 extern struct regulator_init_data gpio_en_3v3_regulator;
+void mop500_regulator_init(void);
 #endif
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 87d2d7b38ce9..ce672378a830 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -199,10 +199,7 @@ static struct platform_device snowball_sbnet_dev = {
 struct ab8500_platform_data ab8500_platdata = {
        .irq_base       = MOP500_AB8500_IRQ_BASE,
-        .regulator_reg_init = ab8500_regulator_reg_init,
+        .regulator      = &ab8500_regulator_plat_data,
-        .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
-        .regulator      = ab8500_regulators,
-        .num_regulator  = ARRAY_SIZE(ab8500_regulators),
        .gpio           = &ab8500_gpio_pdata,
        .codec          = &ab8500_codec_pdata,
 };
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 915683cb67d6..c5e20b52e3b7 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -21,6 +21,8 @@
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/vexpress.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
 #include <asm/arch_timer.h>
 #include <asm/mach-types.h>
@@ -433,7 +435,7 @@ static void __init v2m_dt_timer_init(void)
 {
        struct device_node *node = NULL;
-        vexpress_clk_of_init();
+        of_clk_init(NULL);
        do {
                node = of_find_compatible_node(node, NULL, "arm,sp804");
@@ -441,6 +443,10 @@ static void __init v2m_dt_timer_init(void)
        if (node) {
                pr_info("Using SP804 '%s' as a clock & events source\n",
                                node->full_name);
+                WARN_ON(clk_register_clkdev(of_clk_get_by_name(node,
+                                "timclken1"), "v2m-timer0", "sp804"));
+                WARN_ON(clk_register_clkdev(of_clk_get_by_name(node,
+                                "timclken2"), "v2m-timer1", "sp804"));
                v2m_sp804_init(of_iomap(node, 0),
                                irq_of_parse_and_map(node, 0));
        }
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 025d17328730..4045c4931a30 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
        depends on !MMU
        select CPU_32v4T
        select CPU_ABRT_LV4T
-        select CPU_CACHE_V3     # although the core is v4t
+        select CPU_CACHE_V4
        select CPU_CP15_MPU
        select CPU_PABRT_LEGACY
        help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7
        bool
 # The cache model
-config CPU_CACHE_V3
-        bool
 config CPU_CACHE_V4
        bool
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 4e333fa2756f..9e51be96f635 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY)	+= pabort-legacy.o
 obj-$(CONFIG_CPU_PABRT_V6)      += pabort-v6.o
 obj-$(CONFIG_CPU_PABRT_V7)      += pabort-v7.o
-obj-$(CONFIG_CPU_CACHE_V3)      += cache-v3.o
 obj-$(CONFIG_CPU_CACHE_V4)      += cache-v4.o
 obj-$(CONFIG_CPU_CACHE_V4WT)    += cache-v4wt.o
 obj-$(CONFIG_CPU_CACHE_V4WB)    += cache-v4wb.o
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index dd3d59122cc3..48bc3c0a87ce 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -343,6 +343,7 @@ void __init feroceon_l2_init(int __l2_wt_override)
        outer_cache.inv_range = feroceon_l2_inv_range;
        outer_cache.clean_range = feroceon_l2_clean_range;
        outer_cache.flush_range = feroceon_l2_flush_range;
+        outer_cache.inv_all = l2_inv_all;
        enable_l2();
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
deleted file mode 100644
index 8a3fadece8d3..000000000000
--- a/arch/arm/mm/cache-v3.S
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- *  linux/arch/arm/mm/cache-v3.S
- *
- *  Copyright (C) 1997-2002 Russell king
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/page.h>
-#include "proc-macros.S"
-/*
- *      flush_icache_all()
- *
- *      Unconditionally clean and invalidate the entire icache.
- */
-ENTRY(v3_flush_icache_all)
-        mov     pc, lr
-ENDPROC(v3_flush_icache_all)
-/*
- *      flush_user_cache_all()
- *
- *      Invalidate all cache entries in a particular address
- *      space.
- *
- *      - mm    - mm_struct describing address space
- */
-ENTRY(v3_flush_user_cache_all)
-        /* FALLTHROUGH */
-/*
- *      flush_kern_cache_all()
- *
- *      Clean and invalidate the entire cache.
- */
-ENTRY(v3_flush_kern_cache_all)
-        /* FALLTHROUGH */
-/*
- *      flush_user_cache_range(start, end, flags)
- *
- *      Invalidate a range of cache entries in the specified
- *      address space.
- *
- *      - start - start address (may not be aligned)
- *      - end   - end address (exclusive, may not be aligned)
- *      - flags - vma_area_struct flags describing address space
- */
-ENTRY(v3_flush_user_cache_range)
-        mov     ip, #0
-        mcreq   p15, 0, ip, c7, c0, 0           @ flush ID cache
-        mov     pc, lr
-/*
- *      coherent_kern_range(start, end)
- *
- *      Ensure coherency between the Icache and the Dcache in the
- *      region described by start.  If you have non-snooping
- *      Harvard caches, you need to implement this function.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_coherent_kern_range)
-        /* FALLTHROUGH */
-/*
- *      coherent_user_range(start, end)
- *
- *      Ensure coherency between the Icache and the Dcache in the
- *      region described by start.  If you have non-snooping
- *      Harvard caches, you need to implement this function.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_coherent_user_range)
-        mov     r0, #0
-        mov     pc, lr
-/*
- *      flush_kern_dcache_area(void *page, size_t size)
- *
- *      Ensure no D cache aliasing occurs, either with itself or
- *      the I cache
- *
- *      - addr  - kernel address
- *      - size  - region size
- */
-ENTRY(v3_flush_kern_dcache_area)
-        /* FALLTHROUGH */
-/*
- *      dma_flush_range(start, end)
- *
- *      Clean and invalidate the specified virtual address range.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_dma_flush_range)
-        mov     r0, #0
-        mcr     p15, 0, r0, c7, c0, 0           @ flush ID cache
-        mov     pc, lr
-/*
- *      dma_unmap_area(start, size, dir)
- *      - start - kernel virtual start address
- *      - size  - size of region
- *      - dir   - DMA direction
- */
-ENTRY(v3_dma_unmap_area)
-        teq     r2, #DMA_TO_DEVICE
-        bne     v3_dma_flush_range
-        /* FALLTHROUGH */
-/*
- *      dma_map_area(start, size, dir)
- *      - start - kernel virtual start address
- *      - size  - size of region
- *      - dir   - DMA direction
- */
-ENTRY(v3_dma_map_area)
-        mov     pc, lr
-ENDPROC(v3_dma_unmap_area)
-ENDPROC(v3_dma_map_area)
-        .globl  v3_flush_kern_cache_louis
-        .equ    v3_flush_kern_cache_louis, v3_flush_kern_cache_all
-        __INITDATA
-        @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
-        define_cache_functions v3
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 43e5d77be677..a7ba68f59f0c 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all)
 ENTRY(v4_flush_user_cache_range)
 #ifdef CONFIG_CPU_CP15
        mov     ip, #0
-        mcreq   p15, 0, ip, c7, c7, 0           @ flush ID cache
+        mcr     p15, 0, ip, c7, c7, 0           @ flush ID cache
        mov     pc, lr
 #else
        /* FALLTHROUGH */
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index ad722f1208a5..9a5cdc01fcdf 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -99,6 +99,9 @@ void show_mem(unsigned int filter)
        printk("Mem-info:\n");
        show_free_areas(filter);
+        if (filter & SHOW_MEM_FILTER_PAGE_COUNT)
+                return;
        for_each_bank (i, mi) {
                struct membank *bank = &mi->bank[i];
                unsigned int pfn1, pfn2;
@@ -424,24 +427,6 @@ void __init bootmem_init(void)
        max_pfn = max_high - PHYS_PFN_OFFSET;
 }
-static inline int free_area(unsigned long pfn, unsigned long end, char *s)
-{
-        unsigned int pages = 0, size = (end - pfn) << (PAGE_SHIFT - 10);
-        for (; pfn < end; pfn++) {
-                struct page *page = pfn_to_page(pfn);
-                ClearPageReserved(page);
-                init_page_count(page);
-                __free_page(page);
-                pages++;
-        }
-        if (size && s)
-                printk(KERN_INFO "Freeing %s memory: %dK\n", s, size);
-        return pages;
-}
 /*
 * Poison init memory with an undefined instruction (ARM) or a branch to an
 * undefined instruction (Thumb).
@@ -534,6 +519,14 @@ static void __init free_unused_memmap(struct meminfo *mi)
 #endif
 }
+#ifdef CONFIG_HIGHMEM
+static inline void free_area_high(unsigned long pfn, unsigned long end)
+{
+        for (; pfn < end; pfn++)
+                free_highmem_page(pfn_to_page(pfn));
+}
+#endif
 static void __init free_highpages(void)
 {
 #ifdef CONFIG_HIGHMEM
@@ -569,8 +562,7 @@ static void __init free_highpages(void)
                        if (res_end > end)
                                res_end = end;
                        if (res_start != start)
-                                totalhigh_pages += free_area(start, res_start,
+                                free_area_high(start, res_start);
-                                                             NULL);
                        start = res_end;
                        if (start == end)
                                break;
@@ -578,9 +570,8 @@ static void __init free_highpages(void)
                /* And now free anything which remains */
                if (start < end)
-                        totalhigh_pages += free_area(start, end, NULL);
+                        free_area_high(start, end);
        }
-        totalram_pages += totalhigh_pages;
 #endif
 }
@@ -609,8 +600,7 @@ void __init mem_init(void)
 #ifdef CONFIG_SA1111
        /* now that our DMA memory is actually so designated, we can free it */
-        totalram_pages += free_area(PHYS_PFN_OFFSET,
+        free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, 0, NULL);
-                                    __phys_to_pfn(__pa(swapper_pg_dir)), NULL);
 #endif
        free_highpages();
@@ -738,16 +728,12 @@ void free_initmem(void)
        extern char __tcm_start, __tcm_end;
        poison_init_mem(&__tcm_start, &__tcm_end - &__tcm_start);
-        totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
+        free_reserved_area(&__tcm_start, &__tcm_end, 0, "TCM link");
-                                    __phys_to_pfn(__pa(&__tcm_end)),
-                                    "TCM link");
 #endif
        poison_init_mem(__init_begin, __init_end - __init_begin);
        if (!machine_is_integrator() && !machine_is_cintegrator())
-                totalram_pages += free_area(__phys_to_pfn(__pa(__init_begin)),
+                free_initmem_default(0);
-                                            __phys_to_pfn(__pa(__init_end)),
-                                            "init");
 }
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -758,9 +744,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
 {
        if (!keep_initrd) {
                poison_init_mem((void *)start, PAGE_ALIGN(end) - start);
-                totalram_pages += free_area(__phys_to_pfn(__pa(start)),
+                free_reserved_area(start, end, 0, "initrd");
-                                            __phys_to_pfn(__pa(end)),
-                                            "initrd");
        }
 }
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 78978945492a..a84ff763ac39 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -34,6 +34,7 @@
 #include <asm/mach/pci.h>
 #include "mm.h"
+#include "tcm.h"
 /*
 * empty_zero_page is a special page that is used for
@@ -1277,6 +1278,7 @@ void __init paging_init(struct machine_desc *mdesc)
        dma_contiguous_remap();
        devicemaps_init(mdesc);
        kmap_init();
+        tcm_init();
        top_pmd = pmd_off_k(0xffff0000);
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index dc5de5d53f20..fde2d2a794cf 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -77,24 +77,27 @@ __arm740_setup:
        mcr     p15, 0, r0, c6, c0              @ set area 0, default
        ldr     r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
-        ldr     r1, =(CONFIG_DRAM_SIZE >> 12)   @ size of RAM (must be >= 4KB)
+        ldr     r3, =(CONFIG_DRAM_SIZE >> 12)   @ size of RAM (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        mov     r4, #10                         @ 11 is the minimum (4KB)
-1:      add     r2, r2, #1                      @ area size *= 2
+1:      add     r4, r4, #1                      @ area size *= 2
-        mov     r1, r1, lsr #1
+        movs    r3, r3, lsr #1
        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the area register value
+        orr     r0, r0, r4, lsl #1              @ the area register value
        orr     r0, r0, #1                      @ set enable bit
        mcr     p15, 0, r0, c6, c1              @ set area 1, RAM
        ldr     r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
-        ldr     r1, =(CONFIG_FLASH_SIZE >> 12)  @ size of FLASH (must be >= 4KB)
+        ldr     r3, =(CONFIG_FLASH_SIZE >> 12)  @ size of FLASH (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        cmp     r3, #0
-1:      add     r2, r2, #1                      @ area size *= 2
+        moveq   r0, #0
-        mov     r1, r1, lsr #1
+        beq     2f
+        mov     r4, #10                         @ 11 is the minimum (4KB)
+1:      add     r4, r4, #1                      @ area size *= 2
+        movs    r3, r3, lsr #1
        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the area register value
+        orr     r0, r0, r4, lsl #1              @ the area register value
        orr     r0, r0, #1                      @ set enable bit
-        mcr     p15, 0, r0, c6, c2              @ set area 2, ROM/FLASH
+2:      mcr     p15, 0, r0, c6, c2              @ set area 2, ROM/FLASH
        mov     r0, #0x06
        mcr     p15, 0, r0, c2, c0              @ Region 1&2 cacheable
@@ -137,13 +140,14 @@ __arm740_proc_info:
        .long   0x41807400
        .long   0xfffffff0
        .long   0
+        .long   0
        b       __arm740_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
-        .long   HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+        .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
        .long   cpu_arm740_name
        .long   arm740_processor_functions
        .long   0
        .long   0
-        .long   v3_cache_fns                    @ cache model
+        .long   v4_cache_fns                    @ cache model
        .size   __arm740_proc_info, . - __arm740_proc_info
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2c3b9421ab5e..2556cf1c2da1 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext)
 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
 .globl  cpu_arm920_suspend_size
 .equ    cpu_arm920_suspend_size, 4 * 3
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_arm920_do_suspend)
        stmfd   sp!, {r4 - r6, lr}
        mrc     p15, 0, r4, c13, c0, 0  @ PID
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index f1803f7e2972..344c8a548cc0 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -402,7 +402,7 @@ ENTRY(cpu_arm926_set_pte_ext)
 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
 .globl  cpu_arm926_suspend_size
 .equ    cpu_arm926_suspend_size, 4 * 3
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_arm926_do_suspend)
        stmfd   sp!, {r4 - r6, lr}
        mrc     p15, 0, r4, c13, c0, 0  @ PID
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 82f9cdc751d6..0b60dd3d742a 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -350,7 +350,7 @@ ENTRY(cpu_mohawk_set_pte_ext)
 .globl  cpu_mohawk_suspend_size
 .equ    cpu_mohawk_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_mohawk_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p14, 0, r4, c6, c0, 0   @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 3aa0da11fd84..d92dfd081429 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -172,7 +172,7 @@ ENTRY(cpu_sa1100_set_pte_ext)
 .globl  cpu_sa1100_suspend_size
 .equ    cpu_sa1100_suspend_size, 4 * 3
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_sa1100_do_suspend)
        stmfd   sp!, {r4 - r6, lr}
        mrc     p15, 0, r4, c3, c0, 0           @ domain ID
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 3e6210b4d6d4..054b491ff764 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -17,7 +17,9 @@
 #ifndef MULTI_CPU
 EXPORT_SYMBOL(cpu_dcache_clean_area);
+#ifdef CONFIG_MMU
 EXPORT_SYMBOL(cpu_set_pte_ext);
+#endif
 #else
 EXPORT_SYMBOL(processor);
 #endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index bcaaa8de9325..5c07ee4fe3eb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -138,7 +138,7 @@ ENTRY(cpu_v6_set_pte_ext)
 /* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
 .globl  cpu_v6_suspend_size
 .equ    cpu_v6_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v6_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p15, 0, r4, c13, c0, 0  @ FCSE/PID
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index eb93d6487f35..e8efd83b6f25 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -413,7 +413,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
 .globl  cpu_xsc3_suspend_size
 .equ    cpu_xsc3_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_xsc3_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p14, 0, r4, c6, c0, 0   @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 25510361aa18..e766f889bfd6 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -528,7 +528,7 @@ ENTRY(cpu_xscale_set_pte_ext)
 .globl  cpu_xscale_suspend_size
 .equ    cpu_xscale_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_xscale_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p14, 0, r4, c6, c0, 0   @ clock configuration, for turbo mode
diff --git a/arch/arm/kernel/tcm.h b/arch/arm/mm/tcm.h
index 8015ad434a40..8015ad434a40 100644
--- a/arch/arm/kernel/tcm.h
+++ b/arch/arm/mm/tcm.h
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 51afedda9ab6..03db14d8ace9 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -10,6 +10,7 @@
 * published by the Free Software Foundation.
 */
+#include <linux/amba/pl330.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/interrupt.h>
@@ -1552,6 +1553,9 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+        pd.filter = pl330_filter;
+#endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
 }
@@ -1590,6 +1594,9 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+        pd.filter = pl330_filter;
+#endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
 }
@@ -1628,6 +1635,9 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+        pd.filter = pl330_filter;
+#endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
 }
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index b885322717a1..9ae507270785 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -15,55 +15,7 @@
 #ifndef __PLAT_S3C_FB_H
 #define __PLAT_S3C_FB_H __FILE__
-/* S3C_FB_MAX_WIN
+#include <linux/platform_data/video_s3c.h>
- * Set to the maximum number of windows that any of the supported hardware
- * can use. Since the platform data uses this for an array size, having it
- * set to the maximum of any version of the hardware can do is safe.
- */
-#define S3C_FB_MAX_WIN  (5)
-/**
- * struct s3c_fb_pd_win - per window setup data
- * @xres     : The window X size.
- * @yres     : The window Y size.
- * @virtual_x: The virtual X size.
- * @virtual_y: The virtual Y size.
- */
-struct s3c_fb_pd_win {
-        unsigned short          default_bpp;
-        unsigned short          max_bpp;
-        unsigned short          xres;
-        unsigned short          yres;
-        unsigned short          virtual_x;
-        unsigned short          virtual_y;
-};
-/**
- * struct s3c_fb_platdata -  S3C driver platform specific information
- * @setup_gpio: Setup the external GPIO pins to the right state to transfer
- *              the data from the display system to the connected display
- *              device.
- * @vidcon0: The base vidcon0 values to control the panel data format.
- * @vidcon1: The base vidcon1 values to control the panel data output.
- * @vtiming: Video timing when connected to a RGB type panel.
- * @win: The setup data for each hardware window, or NULL for unused.
- * @display_mode: The LCD output display mode.
- *
- * The platform data supplies the video driver with all the information
- * it requires to work with the display(s) attached to the machine. It
- * controls the initial mode, the number of display windows (0 is always
- * the base framebuffer) that are initialised etc.
- *
- */
-struct s3c_fb_platdata {
-        void    (*setup_gpio)(void);
-        struct s3c_fb_pd_win    *win[S3C_FB_MAX_WIN];
-        struct fb_videomode     *vtiming;
-        u32                      vidcon0;
-        u32                      vidcon1;
-};
 /**
 * s3c_fb_set_platdata() - Setup the FB device with platform data.
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 29c26a818842..f05f2afa440d 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,281 +1 @@
-/* arch/arm/plat-samsung/include/plat/regs-serial.h
+#include <linux/serial_s3c.h>
- *
- *  From linux/include/asm-arm/hardware/serial_s3c2410.h
- *
- *  Internal header file for Samsung S3C2410 serial ports (UART0-2)
- *
- *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
- *
- *  Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk)
- *
- *  Adapted from:
- *
- *  Internal header file for MX1ADS serial ports (UART1 & 2)
- *
- *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#ifndef __ASM_ARM_REGS_SERIAL_H
-#define __ASM_ARM_REGS_SERIAL_H
-#define S3C24XX_VA_UART0      (S3C_VA_UART)
-#define S3C24XX_VA_UART1      (S3C_VA_UART + 0x4000 )
-#define S3C24XX_VA_UART2      (S3C_VA_UART + 0x8000 )
-#define S3C24XX_VA_UART3      (S3C_VA_UART + 0xC000 )
-#define S3C2410_PA_UART0      (S3C24XX_PA_UART)
-#define S3C2410_PA_UART1      (S3C24XX_PA_UART + 0x4000 )
-#define S3C2410_PA_UART2      (S3C24XX_PA_UART + 0x8000 )
-#define S3C2443_PA_UART3      (S3C24XX_PA_UART + 0xC000 )
-#define S3C2410_URXH      (0x24)
-#define S3C2410_UTXH      (0x20)
-#define S3C2410_ULCON     (0x00)
-#define S3C2410_UCON      (0x04)
-#define S3C2410_UFCON     (0x08)
-#define S3C2410_UMCON     (0x0C)
-#define S3C2410_UBRDIV    (0x28)
-#define S3C2410_UTRSTAT   (0x10)
-#define S3C2410_UERSTAT   (0x14)
-#define S3C2410_UFSTAT    (0x18)
-#define S3C2410_UMSTAT    (0x1C)
-#define S3C2410_LCON_CFGMASK      ((0xF<<3)|(0x3))
-#define S3C2410_LCON_CS5          (0x0)
-#define S3C2410_LCON_CS6          (0x1)
-#define S3C2410_LCON_CS7          (0x2)
-#define S3C2410_LCON_CS8          (0x3)
-#define S3C2410_LCON_CSMASK       (0x3)
-#define S3C2410_LCON_PNONE        (0x0)
-#define S3C2410_LCON_PEVEN        (0x5 << 3)
-#define S3C2410_LCON_PODD         (0x4 << 3)
-#define S3C2410_LCON_PMASK        (0x7 << 3)
-#define S3C2410_LCON_STOPB        (1<<2)
-#define S3C2410_LCON_IRM          (1<<6)
-#define S3C2440_UCON_CLKMASK      (3<<10)
-#define S3C2440_UCON_CLKSHIFT     (10)
-#define S3C2440_UCON_PCLK         (0<<10)
-#define S3C2440_UCON_UCLK         (1<<10)
-#define S3C2440_UCON_PCLK2        (2<<10)
-#define S3C2440_UCON_FCLK         (3<<10)
-#define S3C2443_UCON_EPLL         (3<<10)
-#define S3C6400_UCON_CLKMASK    (3<<10)
-#define S3C6400_UCON_CLKSHIFT   (10)
-#define S3C6400_UCON_PCLK       (0<<10)
-#define S3C6400_UCON_PCLK2      (2<<10)
-#define S3C6400_UCON_UCLK0      (1<<10)
-#define S3C6400_UCON_UCLK1      (3<<10)
-#define S3C2440_UCON2_FCLK_EN     (1<<15)
-#define S3C2440_UCON0_DIVMASK     (15 << 12)
-#define S3C2440_UCON1_DIVMASK     (15 << 12)
-#define S3C2440_UCON2_DIVMASK     (7 << 12)
-#define S3C2440_UCON_DIVSHIFT     (12)
-#define S3C2412_UCON_CLKMASK    (3<<10)
-#define S3C2412_UCON_CLKSHIFT   (10)
-#define S3C2412_UCON_UCLK       (1<<10)
-#define S3C2412_UCON_USYSCLK    (3<<10)
-#define S3C2412_UCON_PCLK       (0<<10)
-#define S3C2412_UCON_PCLK2      (2<<10)
-#define S3C2410_UCON_CLKMASK    (1 << 10)
-#define S3C2410_UCON_CLKSHIFT   (10)
-#define S3C2410_UCON_UCLK         (1<<10)
-#define S3C2410_UCON_SBREAK       (1<<4)
-#define S3C2410_UCON_TXILEVEL     (1<<9)
-#define S3C2410_UCON_RXILEVEL     (1<<8)
-#define S3C2410_UCON_TXIRQMODE    (1<<2)
-#define S3C2410_UCON_RXIRQMODE    (1<<0)
-#define S3C2410_UCON_RXFIFO_TOI   (1<<7)
-#define S3C2443_UCON_RXERR_IRQEN  (1<<6)
-#define S3C2443_UCON_LOOPBACK     (1<<5)
-#define S3C2410_UCON_DEFAULT      (S3C2410_UCON_TXILEVEL  | \
-                                   S3C2410_UCON_RXILEVEL  | \
-                                   S3C2410_UCON_TXIRQMODE | \
-                                   S3C2410_UCON_RXIRQMODE | \
-                                   S3C2410_UCON_RXFIFO_TOI)
-#define S3C2410_UFCON_FIFOMODE    (1<<0)
-#define S3C2410_UFCON_TXTRIG0     (0<<6)
-#define S3C2410_UFCON_RXTRIG8     (1<<4)
-#define S3C2410_UFCON_RXTRIG12    (2<<4)
-/* S3C2440 FIFO trigger levels */
-#define S3C2440_UFCON_RXTRIG1     (0<<4)
-#define S3C2440_UFCON_RXTRIG8     (1<<4)
-#define S3C2440_UFCON_RXTRIG16    (2<<4)
-#define S3C2440_UFCON_RXTRIG32    (3<<4)
-#define S3C2440_UFCON_TXTRIG0     (0<<6)
-#define S3C2440_UFCON_TXTRIG16    (1<<6)
-#define S3C2440_UFCON_TXTRIG32    (2<<6)
-#define S3C2440_UFCON_TXTRIG48    (3<<6)
-#define S3C2410_UFCON_RESETBOTH   (3<<1)
-#define S3C2410_UFCON_RESETTX     (1<<2)
-#define S3C2410_UFCON_RESETRX     (1<<1)
-#define S3C2410_UFCON_DEFAULT     (S3C2410_UFCON_FIFOMODE | \
-                                   S3C2410_UFCON_TXTRIG0  | \
-                                   S3C2410_UFCON_RXTRIG8 )
-#define S3C2410_UMCOM_AFC         (1<<4)
-#define S3C2410_UMCOM_RTS_LOW     (1<<0)
-#define S3C2412_UMCON_AFC_63    (0<<5)          /* same as s3c2443 */
-#define S3C2412_UMCON_AFC_56    (1<<5)
-#define S3C2412_UMCON_AFC_48    (2<<5)
-#define S3C2412_UMCON_AFC_40    (3<<5)
-#define S3C2412_UMCON_AFC_32    (4<<5)
-#define S3C2412_UMCON_AFC_24    (5<<5)
-#define S3C2412_UMCON_AFC_16    (6<<5)
-#define S3C2412_UMCON_AFC_8     (7<<5)
-#define S3C2410_UFSTAT_TXFULL     (1<<9)
-#define S3C2410_UFSTAT_RXFULL     (1<<8)
-#define S3C2410_UFSTAT_TXMASK     (15<<4)
-#define S3C2410_UFSTAT_TXSHIFT    (4)
-#define S3C2410_UFSTAT_RXMASK     (15<<0)
-#define S3C2410_UFSTAT_RXSHIFT    (0)
-/* UFSTAT S3C2443 same as S3C2440 */
-#define S3C2440_UFSTAT_TXFULL     (1<<14)
-#define S3C2440_UFSTAT_RXFULL     (1<<6)
-#define S3C2440_UFSTAT_TXSHIFT    (8)
-#define S3C2440_UFSTAT_RXSHIFT    (0)
-#define S3C2440_UFSTAT_TXMASK     (63<<8)
-#define S3C2440_UFSTAT_RXMASK     (63)
-#define S3C2410_UTRSTAT_TXE       (1<<2)
-#define S3C2410_UTRSTAT_TXFE      (1<<1)
-#define S3C2410_UTRSTAT_RXDR      (1<<0)
-#define S3C2410_UERSTAT_OVERRUN   (1<<0)
-#define S3C2410_UERSTAT_FRAME     (1<<2)
-#define S3C2410_UERSTAT_BREAK     (1<<3)
-#define S3C2443_UERSTAT_PARITY    (1<<1)
-#define S3C2410_UERSTAT_ANY       (S3C2410_UERSTAT_OVERRUN | \
-                                   S3C2410_UERSTAT_FRAME | \
-                                   S3C2410_UERSTAT_BREAK)
-#define S3C2410_UMSTAT_CTS        (1<<0)
-#define S3C2410_UMSTAT_DeltaCTS   (1<<2)
-#define S3C2443_DIVSLOT           (0x2C)
-/* S3C64XX interrupt registers. */
-#define S3C64XX_UINTP           0x30
-#define S3C64XX_UINTSP          0x34
-#define S3C64XX_UINTM           0x38
-#define S3C64XX_UINTM_RXD       (0)
-#define S3C64XX_UINTM_TXD       (2)
-#define S3C64XX_UINTM_RXD_MSK   (1 << S3C64XX_UINTM_RXD)
-#define S3C64XX_UINTM_TXD_MSK   (1 << S3C64XX_UINTM_TXD)
-/* Following are specific to S5PV210 */
-#define S5PV210_UCON_CLKMASK    (1<<10)
-#define S5PV210_UCON_CLKSHIFT   (10)
-#define S5PV210_UCON_PCLK       (0<<10)
-#define S5PV210_UCON_UCLK       (1<<10)
-#define S5PV210_UFCON_TXTRIG0   (0<<8)
-#define S5PV210_UFCON_TXTRIG4   (1<<8)
-#define S5PV210_UFCON_TXTRIG8   (2<<8)
-#define S5PV210_UFCON_TXTRIG16  (3<<8)
-#define S5PV210_UFCON_TXTRIG32  (4<<8)
-#define S5PV210_UFCON_TXTRIG64  (5<<8)
-#define S5PV210_UFCON_TXTRIG128 (6<<8)
-#define S5PV210_UFCON_TXTRIG256 (7<<8)
-#define S5PV210_UFCON_RXTRIG1   (0<<4)
-#define S5PV210_UFCON_RXTRIG4   (1<<4)
-#define S5PV210_UFCON_RXTRIG8   (2<<4)
-#define S5PV210_UFCON_RXTRIG16  (3<<4)
-#define S5PV210_UFCON_RXTRIG32  (4<<4)
-#define S5PV210_UFCON_RXTRIG64  (5<<4)
-#define S5PV210_UFCON_RXTRIG128 (6<<4)
-#define S5PV210_UFCON_RXTRIG256 (7<<4)
-#define S5PV210_UFSTAT_TXFULL   (1<<24)
-#define S5PV210_UFSTAT_RXFULL   (1<<8)
-#define S5PV210_UFSTAT_TXMASK   (255<<16)
-#define S5PV210_UFSTAT_TXSHIFT  (16)
-#define S5PV210_UFSTAT_RXMASK   (255<<0)
-#define S5PV210_UFSTAT_RXSHIFT  (0)
-#define S3C2410_UCON_CLKSEL0    (1 << 0)
-#define S3C2410_UCON_CLKSEL1    (1 << 1)
-#define S3C2410_UCON_CLKSEL2    (1 << 2)
-#define S3C2410_UCON_CLKSEL3    (1 << 3)
-/* Default values for s5pv210 UCON and UFCON uart registers */
-#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
-                                 S3C2410_UCON_RXILEVEL |        \
-                                 S3C2410_UCON_TXIRQMODE |       \
-                                 S3C2410_UCON_RXIRQMODE |       \
-                                 S3C2410_UCON_RXFIFO_TOI |      \
-                                 S3C2443_UCON_RXERR_IRQEN)
-#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
-                                 S5PV210_UFCON_TXTRIG4 |        \
-                                 S5PV210_UFCON_RXTRIG4)
-#ifndef __ASSEMBLY__
-/* configuration structure for per-machine configurations for the
- * serial port
- *
- * the pointer is setup by the machine specific initialisation from the
- * arch/arm/mach-s3c2410/ directory.
-*/
-struct s3c2410_uartcfg {
-        unsigned char      hwport;       /* hardware port number */
-        unsigned char      unused;
-        unsigned short     flags;
-        upf_t              uart_flags;   /* default uart flags */
-        unsigned int       clk_sel;
-        unsigned int       has_fracval;
-        unsigned long      ucon;         /* value of ucon for port */
-        unsigned long      ulcon;        /* value of ulcon for port */
-        unsigned long      ufcon;        /* value of ufcon for port */
-};
-/* s3c24xx_uart_devs
- *
- * this is exported from the core as we cannot use driver_register(),
- * or platform_add_device() before the console_initcall()
-*/
-extern struct platform_device *s3c24xx_uart_devs[4];
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARM_REGS_SERIAL_H */
diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h
index 959bcdb03a25..ab34dfadb7f9 100644
--- a/arch/arm/plat-samsung/include/plat/usb-phy.h
+++ b/arch/arm/plat-samsung/include/plat/usb-phy.h
@@ -11,10 +11,7 @@
 #ifndef __PLAT_SAMSUNG_USB_PHY_H
 #define __PLAT_SAMSUNG_USB_PHY_H __FILE__
-enum s5p_usb_phy_type {
+#include <linux/usb/samsung_usb_phy.h>
-        S5P_USB_PHY_DEVICE,
-        S5P_USB_PHY_HOST,
-};
 extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
 extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);