133 files changed, 2244 insertions, 642 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c1f1a7eee953..f219c30eb4e1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,12 +6,13 @@ config ARM
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_HAVE_CUSTOM_GPIO_H
        select ARCH_MIGHT_HAVE_PC_PARPORT
+        select ARCH_USE_BUILTIN_BSWAP
        select ARCH_USE_CMPXCHG_LOCKREF
        select ARCH_WANT_IPC_PARSE_VERSION
        select BUILDTIME_EXTABLE_SORT if MMU
        select CLONE_BACKWARDS
        select CPU_PM if (SUSPEND || CPU_IDLE)
-        select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
+        select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
        select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
        select GENERIC_CLOCKEVENTS_BROADCAST if SMP
        select GENERIC_IDLE_POLL_SETUP
@@ -35,6 +36,7 @@ config ARM
        select HAVE_DMA_ATTRS
        select HAVE_DMA_CONTIGUOUS if MMU
        select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
+        select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
        select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
        select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
        select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
@@ -1651,9 +1653,6 @@ config HZ
 config SCHED_HRTICK
        def_bool HIGH_RES_TIMERS
-config SCHED_HRTICK
-        def_bool HIGH_RES_TIMERS
 config THUMB2_KERNEL
        bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
        depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
@@ -1946,6 +1945,7 @@ config ZBOOT_ROM_BSS
 config ZBOOT_ROM
        bool "Compressed boot loader in ROM/flash"
        depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
+        depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
        help
          Say Y here if you intend to execute your compressed kernel image
          (zImage) directly from ROM or flash.  If unsure, say N.
@@ -1981,7 +1981,7 @@ endchoice
 config ARM_APPENDED_DTB
        bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
-        depends on OF && !ZBOOT_ROM
+        depends on OF
        help
          With this option, the boot code will look for a device tree binary
          (DTB) appended to zImage
@@ -2069,7 +2069,7 @@ endchoice
 config XIP_KERNEL
        bool "Kernel Execute-In-Place from ROM"
-        depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
+        depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM
@@ -2132,7 +2132,6 @@ config CRASH_DUMP
 config AUTO_ZRELADDR
        bool "Auto calculation of the decompressed kernel image address"
-        depends on !ZBOOT_ROM
        help
          ZRELADDR is the physical address where the decompressed kernel
          image will be placed. If AUTO_ZRELADDR is selected, the address
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5765abf5ce84..9afabbb5e798 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -2,6 +2,18 @@ menu "Kernel hacking"
 source "lib/Kconfig.debug"
+config ARM_PTDUMP
+        bool "Export kernel pagetable layout to userspace via debugfs"
+        depends on DEBUG_KERNEL
+        select DEBUG_FS
+        ---help---
+          Say Y here if you want to show the kernel pagetable layout in a
+          debugfs file. This information is only useful for kernel developers
+          who are working in architecture specific areas of the kernel.
+          It is probably not a good idea to enable this feature in a production
+          kernel.
+          If in doubt, say "N"
 config STRICT_DEVMEM
        bool "Filter access to /dev/mem"
        depends on MMU
@@ -94,6 +106,17 @@ choice
                depends on ARCH_BCM2835
                select DEBUG_UART_PL01X
+        config DEBUG_BCM_KONA_UART
+                bool "Kernel low-level debugging messages via BCM KONA UART"
+                depends on ARCH_BCM
+                select DEBUG_UART_8250
+                help
+                  Say Y here if you want kernel low-level debugging support
+                  on Broadcom SoC platforms.
+                  This low level debug works for Broadcom
+                  mobile SoCs in the Kona family of chips (e.g. bcm28155,
+                  bcm11351, etc...)
        config DEBUG_CLPS711X_UART1
                bool "Kernel low-level debugging messages via UART1"
                depends on ARCH_CLPS711X
@@ -988,6 +1011,7 @@ config DEBUG_UART_PHYS
        default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
        default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
        default 0x20201000 if DEBUG_BCM2835
+        default 0x3e000000 if DEBUG_BCM_KONA_UART
        default 0x4000e400 if DEBUG_LL_UART_EFM32
        default 0x40090000 if ARCH_LPC32XX
        default 0x40100000 if DEBUG_PXA_UART1
@@ -1049,6 +1073,7 @@ config DEBUG_UART_VIRT
        default 0xfe018000 if DEBUG_MMP_UART3
        default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
        default 0xfe230000 if DEBUG_PICOXCELL_UART
+        default 0xfe300000 if DEBUG_BCM_KONA_UART
        default 0xfe800000 if ARCH_IOP32X
        default 0xfeb00000 if DEBUG_HI3620_UART || DEBUG_HI3716_UART
        default 0xfeb24000 if DEBUG_RK3X_UART0
@@ -1091,7 +1116,8 @@ config DEBUG_UART_8250_WORD
        default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \
                ARCH_KEYSTONE || \
                DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
-                DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1
+                DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_DAVINCI_TNETV107X_UART1 || \
+                DEBUG_BCM_KONA_UART
 config DEBUG_UART_8250_FLOW_CONTROL
        bool "Enable flow control for 8250 UART"
@@ -1150,4 +1176,15 @@ config PID_IN_CONTEXTIDR
          additional instructions during context switch. Say Y here only if you
          are planning to use hardware trace tools with this kernel.
+config DEBUG_SET_MODULE_RONX
+        bool "Set loadable kernel module data as NX and text as RO"
+        depends on MODULES
+        ---help---
+          This option helps catch unintended modifications to loadable
+          kernel module's text and read-only data. It also prevents execution
+          of module data. Such protection may interfere with run-time code
+          patching and dynamic kernel tracing - and they might also protect
+          against certain classes of kernel exploits.
+          If in doubt, say "N".
 endmenu
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index e7190bb5998e..4bb86d9a749d 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -108,12 +108,12 @@ endif
 targets       := vmlinux vmlinux.lds \
                 piggy.$(suffix_y) piggy.$(suffix_y).o \
-                 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
+                 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S bswapsdi2.o \
-                 font.o font.c head.o misc.o $(OBJS)
+                 bswapsdi2.S font.o font.c head.o misc.o $(OBJS)
 # Make sure files are removed during clean
 extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern piggy.lz4 \
-                 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) \
+                 lib1funcs.S ashldi3.S bswapsdi2.S $(libfdt) $(libfdt_hdrs) \
                 hyp-stub.S
 ifeq ($(CONFIG_FUNCTION_TRACER),y)
@@ -156,6 +156,12 @@ ashldi3 = $(obj)/ashldi3.o
 $(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
        $(call cmd,shipped)
+# For __bswapsi2, __bswapdi2
+bswapsdi2 = $(obj)/bswapsdi2.o
+$(obj)/bswapsdi2.S: $(srctree)/arch/$(SRCARCH)/lib/bswapsdi2.S
+        $(call cmd,shipped)
 # We need to prevent any GOTOFF relocs being used with references
 # to symbols in the .bss section since we cannot relocate them
 # independently from the rest at run time.  This can be achieved by
@@ -177,7 +183,8 @@ if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \
 fi
 $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
-                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) FORCE
+                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) \
+                $(bswapsdi2) FORCE
        @$(check_for_multiple_zreladdr)
        $(call if_changed,ld)
        @$(check_for_bad_syms)
diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index b4f95c2bbf74..72a9b3fc4251 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -13,4 +13,83 @@
 / {
        model = "IGEP COM AM335x on AQUILA Expansion";
        compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
+        hdmi {
+                compatible = "ti,tilcdc,slave";
+                i2c = <&i2c0>;
+                pinctrl-names = "default", "off";
+                pinctrl-0 = <&nxp_hdmi_pins>;
+                pinctrl-1 = <&nxp_hdmi_off_pins>;
+                status = "okay";
+        };
+        leds_base {
+                pinctrl-names = "default";
+                pinctrl-0 = <&leds_base_pins>;
+                compatible = "gpio-leds";
+                led@0 {
+                        label = "base:red:user";
+                        gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;   /* gpio1_21 */
+                        default-state = "off";
+                };
+                led@1 {
+                        label = "base:green:user";
+                        gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;    /* gpio2_0 */
+                        default-state = "off";
+                };
+        };
+};
+&am33xx_pinmux {
+        nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x1b0 (PIN_OUTPUT | MUX_MODE3)  /* xdma_event_intr0.clkout1 */
+                        0xa0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0 */
+                        0xa4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1 */
+                        0xa8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2 */
+                        0xac (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3 */
+                        0xb0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4 */
+                        0xb4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5 */
+                        0xb8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6 */
+                        0xbc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7 */
+                        0xc0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8 */
+                        0xc4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9 */
+                        0xc8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10 */
+                        0xcc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11 */
+                        0xd0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12 */
+                        0xd4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13 */
+                        0xd8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14 */
+                        0xdc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15 */
+                        0xe0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync */
+                        0xe4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync */
+                        0xe8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk */
+                        0xec (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en */
+                >;
+        };
+        nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
+                pinctrl-single,pins = <
+                        0x1b0 (PIN_OUTPUT | MUX_MODE3)  /* xdma_event_intr0.clkout1 */
+                >;
+        };
+        leds_base_pins: pinmux_leds_base_pins {
+                pinctrl-single,pins = <
+                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
+                        0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_csn3.gpio2_0 */
+                >;
+        };
+};
+&lcdc {
+        status = "okay";
+};
+&i2c0 {
+        eeprom: eeprom@50 {
+                compatible = "at,24c256";
+                reg = <0x50>;
+        };
 };
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 619624479311..7063311a58d9 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -199,6 +199,35 @@
        pinctrl-0 = <&uart0_pins>;
 };
+&usb {
+        status = "okay";
+        control@44e10000 {
+                status = "okay";
+        };
+        usb-phy@47401300 {
+                status = "okay";
+        };
+        usb-phy@47401b00 {
+                status = "okay";
+        };
+        usb@47401000 {
+                status = "okay";
+        };
+        usb@47401800 {
+                status = "okay";
+                dr_mode = "host";
+        };
+        dma-controller@07402000  {
+                status = "okay";
+        };
+};
 #include "tps65910.dtsi"
 &tps {
diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts
index e99dfaf70052..03fcbf0a88a8 100644
--- a/arch/arm/boot/dts/am3517-evm.dts
+++ b/arch/arm/boot/dts/am3517-evm.dts
@@ -7,11 +7,11 @@
 */
 /dts-v1/;
-#include "omap34xx.dtsi"
+#include "am3517.dtsi"
 / {
-        model = "TI AM3517 EVM (AM3517/05)";
+        model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
-        compatible = "ti,am3517-evm", "ti,omap3";
+        compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
        memory {
                device_type = "memory";
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
new file mode 100644
index 000000000000..2fbe02faa8b1
--- /dev/null
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Device Tree Source for am3517 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#include "omap3.dtsi"
+/ {
+        aliases {
+                serial3 = &uart4;
+        };
+        ocp {
+                am35x_otg_hs: am35x_otg_hs@5c040000 {
+                        compatible = "ti,omap3-musb";
+                        ti,hwmods = "am35x_otg_hs";
+                        status = "disabled";
+                        reg = <0x5c040000 0x1000>;
+                        interrupts = <71>;
+                        interrupt-names = "mc";
+                };
+                davinci_emac: ethernet@0x5c000000 {
+                        compatible = "ti,am3517-emac";
+                        ti,hwmods = "davinci_emac";
+                        status = "disabled";
+                        reg = <0x5c000000 0x30000>;
+                        interrupts = <67 68 69 70>;
+                        ti,davinci-ctrl-reg-offset = <0x10000>;
+                        ti,davinci-ctrl-mod-reg-offset = <0>;
+                        ti,davinci-ctrl-ram-offset = <0x20000>;
+                        ti,davinci-ctrl-ram-size = <0x2000>;
+                        ti,davinci-rmii-en = /bits/ 8 <1>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                };
+                davinci_mdio: ethernet@0x5c030000 {
+                        compatible = "ti,davinci_mdio";
+                        ti,hwmods = "davinci_mdio";
+                        status = "disabled";
+                        reg = <0x5c030000 0x1000>;
+                        bus_freq = <1000000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+                uart4: serial@4809e000 {
+                        compatible = "ti,omap3-uart";
+                        ti,hwmods = "uart4";
+                        status = "disabled";
+                        reg = <0x4809e000 0x400>;
+                        interrupts = <84>;
+                        dmas = <&sdma 55 &sdma 54>;
+                        dma-names = "tx", "rx";
+                        clock-frequency = <48000000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe119..08a56bcfc724 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
                                        spi-max-frequency = <50000000>;
                                };
                        };
+                };
-                        pcie-controller {
+                pcie-controller {
+                        status = "okay";
+                        /*
+                         * The two PCIe units are accessible through
+                         * both standard PCIe slots and mini-PCIe
+                         * slots on the board.
+                         */
+                        pcie@1,0 {
+                                /* Port 0, Lane 0 */
+                                status = "okay";
+                        };
+                        pcie@2,0 {
+                                /* Port 1, Lane 0 */
                                status = "okay";
-                                /*
-                                 * The two PCIe units are accessible through
-                                 * both standard PCIe slots and mini-PCIe
-                                 * slots on the board.
-                                 */
-                                pcie@1,0 {
-                                        /* Port 0, Lane 0 */
-                                        status = "okay";
-                                };
-                                pcie@2,0 {
-                                        /* Port 1, Lane 0 */
-                                        status = "okay";
-                                };
                        };
                };
        };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 00d6a798c705..7f10f627ae5b 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -118,7 +118,7 @@
                        coherency-fabric@20200 {
                                compatible = "marvell,coherency-fabric";
-                                reg = <0x20200 0xb0>, <0x21810 0x1c>;
+                                reg = <0x20200 0xb0>, <0x21010 0x1c>;
                        };
                        serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 3f5e6121c730..98335fb34b7a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -47,7 +47,7 @@
                /*
                 * MV78230 has 2 PCIe units Gen2.0: One unit can be
                 * configured as x4 or quad x1 lanes. One unit is
-                 * x4/x1.
+                 * x1 only.
                 */
                pcie-controller {
                        compatible = "marvell,armada-xp-pcie";
@@ -62,10 +62,10 @@
                        ranges =
                               <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
-                                0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000   /* Port 2.0 registers */
                                0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000   /* Port 0.1 registers */
                                0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
                                0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
+                                0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
                                0x82000000 0x1 0       MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
                                0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
                                0x82000000 0x2 0       MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -74,8 +74,8 @@
                                0x81000000 0x3 0       MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
                                0x82000000 0x4 0       MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
                                0x81000000 0x4 0       MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
-                                0x82000000 0x9 0       MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
+                                0x82000000 0x5 0       MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x81000000 0x9 0       MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */>;
+                                0x81000000 0x5 0       MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */>;
                        pcie@1,0 {
                                device_type = "pci";
@@ -145,20 +145,20 @@
                                status = "disabled";
                        };
-                        pcie@9,0 {
+                        pcie@5,0 {
                                device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
-                                reg = <0x4800 0 0 0 0>;
+                                reg = <0x2800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
-                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                interrupt-map = <0 0 0 0 &mpic 62>;
-                                marvell,pcie-port = <2>;
+                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 26>;
+                                clocks = <&gateclk 9>;
                                status = "disabled";
                        };
                };
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 3e9fd1353f89..66609684d41b 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -48,7 +48,7 @@
                /*
                 * MV78260 has 3 PCIe units Gen2.0: Two units can be
                 * configured as x4 or quad x1 lanes. One unit is
-                 * x4/x1.
+                 * x4 only.
                 */
                pcie-controller {
                        compatible = "marvell,armada-xp-pcie";
@@ -68,7 +68,9 @@
                                0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
                                0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
                                0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
-                                0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000   /* Port 3.0 registers */
+                                0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000   /* Port 1.1 registers */
+                                0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000   /* Port 1.2 registers */
+                                0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000   /* Port 1.3 registers */
                                0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
                                0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
                                0x82000000 0x2 0     MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -77,10 +79,18 @@
                                0x81000000 0x3 0     MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
                                0x82000000 0x4 0     MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
                                0x81000000 0x4 0     MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
-                                0x82000000 0x9 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x81000000 0x9 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
+                                0x82000000 0x5 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x82000000 0xa 0     MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
+                                0x81000000 0x5 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
-                                0x81000000 0xa 0     MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO  */>;
+                                0x82000000 0x6 0     MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
+                                0x81000000 0x6 0     MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO  */
+                                0x82000000 0x7 0     MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
+                                0x81000000 0x7 0     MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO  */
+                                0x82000000 0x8 0     MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
+                                0x81000000 0x8 0     MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO  */
+                                0x82000000 0x9 0     MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
+                                0x81000000 0x9 0     MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */>;
                        pcie@1,0 {
                                device_type = "pci";
@@ -106,8 +116,8 @@
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
-                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 59>;
                                marvell,pcie-port = <0>;
@@ -150,37 +160,88 @@
                                status = "disabled";
                        };
-                        pcie@9,0 {
+                        pcie@5,0 {
                                device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
-                                reg = <0x4800 0 0 0 0>;
+                                reg = <0x2800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
-                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                interrupt-map = <0 0 0 0 &mpic 62>;
-                                marvell,pcie-port = <2>;
+                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 26>;
+                                clocks = <&gateclk 9>;
                                status = "disabled";
                        };
-                        pcie@10,0 {
+                        pcie@6,0 {
                                device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x82000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
-                                reg = <0x5000 0 0 0 0>;
+                                reg = <0x3000 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
-                                          0x81000000 0 0 0x81000000 0xa 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x6 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 103>;
+                                interrupt-map = <0 0 0 0 &mpic 63>;
-                                marvell,pcie-port = <3>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <1>;
+                                clocks = <&gateclk 10>;
+                                status = "disabled";
+                        };
+                        pcie@7,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
+                                reg = <0x3800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
+                                          0x81000000 0 0 0x81000000 0x7 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 64>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <2>;
+                                clocks = <&gateclk 11>;
+                                status = "disabled";
+                        };
+                        pcie@8,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
+                                reg = <0x4000 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
+                                          0x81000000 0 0 0x81000000 0x8 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 65>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <3>;
+                                clocks = <&gateclk 12>;
+                                status = "disabled";
+                        };
+                        pcie@9,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                reg = <0x4800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                marvell,pcie-port = <2>;
                                marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 27>;
+                                clocks = <&gateclk 26>;
                                status = "disabled";
                        };
                };
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 2347e9563cef..6801106fa1f8 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -11,6 +11,10 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 / {
+        aliases {
+                serial4 = &usart3;
+        };
        ahb {
                apb {
                        pinctrl@fffff400 {
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index 9c18adf788f7..f577b7df9a29 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -44,8 +44,8 @@
                gpmc,wr-access-ns = <186>;
                gpmc,cycle2cycle-samecsen;
                gpmc,cycle2cycle-diffcsen;
-                vmmc-supply = <&vddvario>;
+                vddvario-supply = <&vddvario>;
-                vmmc_aux-supply = <&vdd33a>;
+                vdd33a-supply = <&vdd33a>;
                reg-io-width = <4>;
                smsc,save-mac-address;
        };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 31a632f7effb..df33a50bc070 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -215,3 +215,10 @@
 &usbhsehci {
        phys = <0 &hsusb2_phy>;
 };
+&vaux2 {
+        regulator-name = "usb_1v8";
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index fa532aaacc68..3ba4a625ea5b 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -61,6 +61,14 @@
                vcc-supply = <&hsusb2_power>;
        };
+        sound {
+                compatible = "ti,omap-twl4030";
+                ti,model = "omap3beagle";
+                ti,mcbsp = <&mcbsp2>;
+                ti,codec = <&twl_audio>;
+        };
        gpio_keys {
                compatible = "gpio-keys";
@@ -120,6 +128,12 @@
                reg = <0x48>;
                interrupts = <7>; /* SYS_NIRQ cascaded to intc */
                interrupt-parent = <&intc>;
+                twl_audio: audio {
+                        compatible = "ti,twl4030-audio";
+                        codec {
+                        };
+                };
        };
 };
@@ -178,3 +192,10 @@
        mode = <3>;
        power = <50>;
 };
+&vaux2 {
+        regulator-name = "vdd_ehci";
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index ba1e58b7b7e3..165aaf7591ba 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEP Technology devices
+ * Common device tree for IGEP boards based on AM/DM37x
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -10,7 +10,7 @@
 */
 /dts-v1/;
-#include "omap34xx.dtsi"
+#include "omap36xx.dtsi"
 / {
        memory {
@@ -24,6 +24,25 @@
                ti,mcbsp = <&mcbsp2>;
                ti,codec = <&twl_audio>;
        };
+        vdd33: regulator-vdd33 {
+                compatible = "regulator-fixed";
+                regulator-name = "vdd33";
+                regulator-always-on;
+        };
+        lbee1usjyc_vmmc: lbee1usjyc_vmmc {
+                pinctrl-names = "default";
+                pinctrl-0 = <&lbee1usjyc_pins>;
+                compatible = "regulator-fixed";
+                regulator-name = "regulator-lbee1usjyc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;    /* gpio_138 WIFI_PDN */
+                startup-delay-us = <10000>;
+                enable-active-high;
+                vin-supply = <&vdd33>;
+        };
 };
 &omap3_pmx_core {
@@ -48,6 +67,15 @@
                >;
        };
+        /* WiFi/BT combo */
+        lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
+                pinctrl-single,pins = <
+                        0x136 (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat5.gpio_137 */
+                        0x138 (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat6.gpio_138 */
+                        0x13a (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat7.gpio_139 */
+                >;
+        };
        mcbsp2_pins: pinmux_mcbsp2_pins {
                pinctrl-single,pins = <
                        0x10c (PIN_INPUT | MUX_MODE0)           /* mcbsp2_fsx.mcbsp2_fsx */
@@ -65,10 +93,17 @@
                        0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
                        0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
                        0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
-                        0x120 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat4.sdmmc1_dat4 */
+                >;
-                        0x122 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat5.sdmmc1_dat5 */
+        };
-                        0x124 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat6.sdmmc1_dat6 */
-                        0x126 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat7.sdmmc1_dat7 */
+        mmc2_pins: pinmux_mmc2_pins {
+                pinctrl-single,pins = <
+                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
+                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
+                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0.sdmmc2_dat0 */
+                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1.sdmmc2_dat1 */
+                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2.sdmmc2_dat2 */
+                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3.sdmmc2_dat3 */
                >;
        };
@@ -78,10 +113,33 @@
                >;
        };
+        i2c1_pins: pinmux_i2c1_pins {
+                pinctrl-single,pins = <
+                        0x18a (PIN_INPUT | MUX_MODE0)   /* i2c1_scl.i2c1_scl */
+                        0x18c (PIN_INPUT | MUX_MODE0)   /* i2c1_sda.i2c1_sda */
+                >;
+        };
+        i2c2_pins: pinmux_i2c2_pins {
+                pinctrl-single,pins = <
+                        0x18e (PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
+                        0x190 (PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
+                >;
+        };
+        i2c3_pins: pinmux_i2c3_pins {
+                pinctrl-single,pins = <
+                        0x192 (PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
+                        0x194 (PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
+                >;
+        };
        leds_pins: pinmux_leds_pins { };
 };
 &i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
        clock-frequency = <2600000>;
        twl: twl@48 {
@@ -101,9 +159,16 @@
 #include "twl4030_omap3.dtsi"
 &i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2_pins>;
        clock-frequency = <400000>;
 };
+&i2c3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c3_pins>;
+};
 &mcbsp2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mcbsp2_pins>;
@@ -114,11 +179,15 @@
      pinctrl-0 = <&mmc1_pins>;
      vmmc-supply = <&vmmc1>;
      vmmc_aux-supply = <&vsim>;
-      bus-width = <8>;
+      bus-width = <4>;
 };
 &mmc2 {
-        status = "disabled";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins>;
+        vmmc-supply = <&lbee1usjyc_vmmc>;
+        bus-width = <4>;
+        non-removable;
 };
 &mmc3 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index d5cc79267250..1c7e74d2d2bc 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEPv2 board
+ * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -13,7 +13,7 @@
 #include "omap-gpmc-smsc911x.dtsi"
 / {
-        model = "IGEPv2";
+        model = "IGEPv2 (TI OMAP AM/DM37x)";
        compatible = "isee,omap3-igep0020", "ti,omap3";
        leds {
@@ -67,6 +67,8 @@
        pinctrl-names = "default";
        pinctrl-0 = <
                &hsusbb1_pins
+                &tfp410_pins
+                &dss_pins
        >;
        hsusbb1_pins: pinmux_hsusbb1_pins {
@@ -85,6 +87,45 @@
                        0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d7.hsusb1_data3 */
                >;
        };
+        tfp410_pins: tfp410_dvi_pins {
+                pinctrl-single,pins = <
+                        0x196 (PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
+                >;
+        };
+        dss_pins: pinmux_dss_dvi_pins {
+                pinctrl-single,pins = <
+                        0x0a4 (PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
+                        0x0a6 (PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
+                        0x0a8 (PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
+                        0x0aa (PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
+                        0x0ac (PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
+                        0x0ae (PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
+                        0x0b0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
+                        0x0b2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
+                        0x0b4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
+                        0x0b6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
+                        0x0b8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
+                        0x0ba (PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
+                        0x0bc (PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
+                        0x0be (PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
+                        0x0c0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
+                        0x0c2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
+                        0x0c4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
+                        0x0c6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
+                        0x0c8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
+                        0x0ca (PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
+                        0x0cc (PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
+                        0x0ce (PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
+                        0x0d0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
+                        0x0d2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
+                        0x0d4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
+                        0x0d6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
+                        0x0d8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
+                        0x0da (PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
+                >;
+        };
 };
 &leds_pins {
@@ -174,3 +215,8 @@
 &usbhsehci {
        phys = <&hsusb1_phy>;
 };
+&vpll2 {
+        /* Needed for DSS */
+        regulator-name = "vdds_dsi";
+};
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 525e6d9b0978..02a23f8a3384 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEP COM Module
+ * Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -12,7 +12,7 @@
 #include "omap3-igep.dtsi"
 / {
-        model = "IGEP COM Module";
+        model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
        compatible = "isee,omap3-igep0030", "ti,omap3";
        leds {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index c4f20bfe4cce..6fc85f963530 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -9,7 +9,7 @@
 /dts-v1/;
-#include "omap34xx.dtsi"
+#include "omap34xx-hs.dtsi"
 / {
        model = "Nokia N900";
@@ -125,6 +125,21 @@
                >;
        };
+        mmc2_pins: pinmux_mmc2_pins {
+                pinctrl-single,pins = <
+                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk */
+                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd */
+                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0 */
+                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1 */
+                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2 */
+                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3 */
+                        0x134 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat4 */
+                        0x136 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat5 */
+                        0x138 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat6 */
+                        0x13a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat7 */
+                >;
+        };
        display_pins: pinmux_display_pins {
                pinctrl-single,pins = <
                        0x0d4 (PIN_OUTPUT | MUX_MODE4)          /* RX51_LCD_RESET_GPIO */
@@ -358,8 +373,14 @@
        cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 };
+/* most boards use vaux3, only some old versions use vmmc2 instead */
 &mmc2 {
-        status = "disabled";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins>;
+        vmmc-supply = <&vaux3>;
+        vmmc_aux-supply = <&vsim>;
+        bus-width = <8>;
+        non-removable;
 };
 &mmc3 {
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 94eb77d3b9dd..5c26c184f2c1 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -8,7 +8,7 @@
 * published by the Free Software Foundation.
 */
-#include "omap36xx.dtsi"
+#include "omap36xx-hs.dtsi"
 / {
        cpus {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f3a0c26ed0c2..daabf99d402a 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -82,6 +82,13 @@
                ranges;
                ti,hwmods = "l3_main";
+                aes: aes@480c5000 {
+                        compatible = "ti,omap3-aes";
+                        ti,hwmods = "aes";
+                        reg = <0x480c5000 0x50>;
+                        interrupts = <0>;
+                };
                counter32k: counter@48320000 {
                        compatible = "ti,omap-counter32k";
                        reg = <0x48320000 0x20>;
@@ -260,6 +267,13 @@
                        ti,hwmods = "i2c3";
                };
+                mailbox: mailbox@48094000 {
+                        compatible = "ti,omap3-mailbox";
+                        ti,hwmods = "mailbox";
+                        reg = <0x48094000 0x200>;
+                        interrupts = <26>;
+                };
                mcspi1: spi@48098000 {
                        compatible = "ti,omap2-mcspi";
                        reg = <0x48098000 0x100>;
@@ -357,6 +371,13 @@
                        dma-names = "tx", "rx";
                };
+                mmu_isp: mmu@480bd400 {
+                        compatible = "ti,omap3-mmu-isp";
+                        ti,hwmods = "mmu_isp";
+                        reg = <0x480bd400 0x80>;
+                        interrupts = <8>;
+                };
                wdt2: wdt@48314000 {
                        compatible = "ti,omap3-wdt";
                        reg = <0x48314000 0x80>;
@@ -442,6 +463,27 @@
                        dma-names = "tx", "rx";
                };
+                sham: sham@480c3000 {
+                        compatible = "ti,omap3-sham";
+                        ti,hwmods = "sham";
+                        reg = <0x480c3000 0x64>;
+                        interrupts = <49>;
+                };
+                smartreflex_core: smartreflex@480cb000 {
+                        compatible = "ti,omap3-smartreflex-core";
+                        ti,hwmods = "smartreflex_core";
+                        reg = <0x480cb000 0x400>;
+                        interrupts = <19>;
+                };
+                smartreflex_mpu_iva: smartreflex@480c9000 {
+                        compatible = "ti,omap3-smartreflex-iva";
+                        ti,hwmods = "smartreflex_mpu_iva";
+                        reg = <0x480c9000 0x400>;
+                        interrupts = <18>;
+                };
                timer1: timer@48318000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap34xx-hs.dtsi b/arch/arm/boot/dts/omap34xx-hs.dtsi
new file mode 100644
index 000000000000..1ff626489546
--- /dev/null
+++ b/arch/arm/boot/dts/omap34xx-hs.dtsi
@@ -0,0 +1,16 @@
+/* Disabled modules for secure omaps */
+#include "omap34xx.dtsi"
+/* Secure omaps have some devices inaccessible depending on the firmware */
+&aes {
+        status = "disabled";
+};
+&sham {
+        status = "disabled";
+};
+&timer12 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap36xx-hs.dtsi b/arch/arm/boot/dts/omap36xx-hs.dtsi
new file mode 100644
index 000000000000..2c7febb0e016
--- /dev/null
+++ b/arch/arm/boot/dts/omap36xx-hs.dtsi
@@ -0,0 +1,16 @@
+/* Disabled modules for secure omaps */
+#include "omap36xx.dtsi"
+/* Secure omaps have some devices inaccessible depending on the firmware */
+&aes {
+        status = "disabled";
+};
+&sham {
+        status = "disabled";
+};
+&timer12 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 298e85020e1b..88c6a05cab41 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -246,15 +246,6 @@
                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_sda */
                >;
        };
-};
-&omap4_pmx_wkup {
-        led_wkgpio_pins: pinmux_leds_wkpins {
-                pinctrl-single,pins = <
-                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
-                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
-                >;
-        };
        /*
         * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
@@ -274,7 +265,7 @@
                pinctrl-single,pins = <
                        0x38 (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs2.gpio_52 */
                        0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_OUTPUT | MUX_MODE0)          /* sdmmc5_clk.sdmmc5_clk */
+                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
@@ -284,6 +275,15 @@
        };
 };
+&omap4_pmx_wkup {
+        led_wkgpio_pins: pinmux_leds_wkpins {
+                pinctrl-single,pins = <
+                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
+                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
+                >;
+        };
+};
 &i2c1 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c1_pins>;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5fc3f43c5a81..dbc81fb6ef03 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -300,12 +300,12 @@
        wl12xx_pins: pinmux_wl12xx_pins {
                pinctrl-single,pins = <
                        0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_OUTPUT | MUX_MODE3)          /* sdmmc5_clk.sdmmc5_clk */
+                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
-                        0x10a (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_cmd.sdmmc5_cmd */
+                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
-                        0x10c (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat0.sdmmc5_dat0 */
+                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
-                        0x10e (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat1.sdmmc5_dat1 */
+                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat2.sdmmc5_dat2 */
+                        0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat2.sdmmc5_dat2 */
-                        0x112 (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat3.sdmmc5_dat3 */
+                        0x112 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat3.sdmmc5_dat3 */
                >;
        };
 };
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ee845fad939b..9987dd0e9c59 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -87,9 +87,9 @@
                interrupts = <1 9 0xf04>;
        };
-        gpio0: gpio@ffc40000 {
+        gpio0: gpio@e6050000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc40000 0 0x2c>;
+                reg = <0 0xe6050000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 4 0x4>;
                #gpio-cells = <2>;
@@ -99,9 +99,9 @@
                interrupt-controller;
        };
-        gpio1: gpio@ffc41000 {
+        gpio1: gpio@e6051000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc41000 0 0x2c>;
+                reg = <0 0xe6051000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 5 0x4>;
                #gpio-cells = <2>;
@@ -111,9 +111,9 @@
                interrupt-controller;
        };
-        gpio2: gpio@ffc42000 {
+        gpio2: gpio@e6052000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc42000 0 0x2c>;
+                reg = <0 0xe6052000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 6 0x4>;
                #gpio-cells = <2>;
@@ -123,9 +123,9 @@
                interrupt-controller;
        };
-        gpio3: gpio@ffc43000 {
+        gpio3: gpio@e6053000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc43000 0 0x2c>;
+                reg = <0 0xe6053000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 7 0x4>;
                #gpio-cells = <2>;
@@ -135,9 +135,9 @@
                interrupt-controller;
        };
-        gpio4: gpio@ffc44000 {
+        gpio4: gpio@e6054000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc44000 0 0x2c>;
+                reg = <0 0xe6054000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 8 0x4>;
                #gpio-cells = <2>;
@@ -147,9 +147,9 @@
                interrupt-controller;
        };
-        gpio5: gpio@ffc45000 {
+        gpio5: gpio@e6055000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc45000 0 0x2c>;
+                reg = <0 0xe6055000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 9 0x4>;
                #gpio-cells = <2>;
@@ -241,7 +241,7 @@
        sdhi0: sdhi@ee100000 {
                compatible = "renesas,sdhi-r8a7790";
-                reg = <0 0xee100000 0 0x100>;
+                reg = <0 0xee100000 0 0x200>;
                interrupt-parent = <&gic>;
                interrupts = <0 165 4>;
                cap-sd-highspeed;
@@ -250,7 +250,7 @@
        sdhi1: sdhi@ee120000 {
                compatible = "renesas,sdhi-r8a7790";
-                reg = <0 0xee120000 0 0x100>;
+                reg = <0 0xee120000 0 0x200>;
                interrupt-parent = <&gic>;
                interrupts = <0 166 4>;
                cap-sd-highspeed;
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 6d09b8d42fdd..f936476c2753 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -245,14 +245,14 @@
                                        mpu_periph_clk: mpu_periph_clk {
                                                #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                clocks = <&mpuclk>;
                                                fixed-divider = <4>;
                                        };
                                        mpu_l2_ram_clk: mpu_l2_ram_clk {
                                                #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                clocks = <&mpuclk>;
                                                fixed-divider = <2>;
                                        };
@@ -266,8 +266,9 @@
                                        l3_main_clk: l3_main_clk {
                                                #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                clocks = <&mainclk>;
+                                                fixed-divider = <1>;
                                        };
                                        l3_mp_clk: l3_mp_clk {
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index c1751a64889a..7f5878c2784a 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -193,7 +193,10 @@
                pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun6i-a31-pinctrl";
                        reg = <0x01c20800 0x400>;
-                        interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>;
+                        interrupts = <0 11 4>,
+                                     <0 15 4>,
+                                     <0 16 4>,
+                                     <0 17 4>;
                        clocks = <&apb1_gates 5>;
                        gpio-controller;
                        interrupt-controller;
@@ -212,11 +215,11 @@
                timer@01c20c00 {
                        compatible = "allwinner,sun4i-timer";
                        reg = <0x01c20c00 0xa0>;
-                        interrupts = <0 18 1>,
+                        interrupts = <0 18 4>,
-                                     <0 19 1>,
+                                     <0 19 4>,
-                                     <0 20 1>,
+                                     <0 20 4>,
-                                     <0 21 1>,
+                                     <0 21 4>,
-                                     <0 22 1>;
+                                     <0 22 4>;
                        clocks = <&osc24M>;
                };
@@ -228,7 +231,7 @@
                uart0: serial@01c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;
-                        interrupts = <0 0 1>;
+                        interrupts = <0 0 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 16>;
@@ -238,7 +241,7 @@
                uart1: serial@01c28400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28400 0x400>;
-                        interrupts = <0 1 1>;
+                        interrupts = <0 1 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 17>;
@@ -248,7 +251,7 @@
                uart2: serial@01c28800 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28800 0x400>;
-                        interrupts = <0 2 1>;
+                        interrupts = <0 2 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 18>;
@@ -258,7 +261,7 @@
                uart3: serial@01c28c00 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28c00 0x400>;
-                        interrupts = <0 3 1>;
+                        interrupts = <0 3 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 19>;
@@ -268,7 +271,7 @@
                uart4: serial@01c29000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29000 0x400>;
-                        interrupts = <0 4 1>;
+                        interrupts = <0 4 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 20>;
@@ -278,7 +281,7 @@
                uart5: serial@01c29400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29400 0x400>;
-                        interrupts = <0 5 1>;
+                        interrupts = <0 5 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 21>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfedde74c..367611a0730b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -170,7 +170,7 @@
                emac: ethernet@01c0b000 {
                        compatible = "allwinner,sun4i-emac";
                        reg = <0x01c0b000 0x1000>;
-                        interrupts = <0 55 1>;
+                        interrupts = <0 55 4>;
                        clocks = <&ahb_gates 17>;
                        status = "disabled";
                };
@@ -186,7 +186,7 @@
                pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun7i-a20-pinctrl";
                        reg = <0x01c20800 0x400>;
-                        interrupts = <0 28 1>;
+                        interrupts = <0 28 4>;
                        clocks = <&apb0_gates 5>;
                        gpio-controller;
                        interrupt-controller;
@@ -251,12 +251,12 @@
                timer@01c20c00 {
                        compatible = "allwinner,sun4i-timer";
                        reg = <0x01c20c00 0x90>;
-                        interrupts = <0 22 1>,
+                        interrupts = <0 22 4>,
-                                     <0 23 1>,
+                                     <0 23 4>,
-                                     <0 24 1>,
+                                     <0 24 4>,
-                                     <0 25 1>,
+                                     <0 25 4>,
-                                     <0 67 1>,
+                                     <0 67 4>,
-                                     <0 68 1>;
+                                     <0 68 4>;
                        clocks = <&osc24M>;
                };
@@ -273,7 +273,7 @@
                uart0: serial@01c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;
-                        interrupts = <0 1 1>;
+                        interrupts = <0 1 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 16>;
@@ -283,7 +283,7 @@
                uart1: serial@01c28400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28400 0x400>;
-                        interrupts = <0 2 1>;
+                        interrupts = <0 2 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 17>;
@@ -293,7 +293,7 @@
                uart2: serial@01c28800 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28800 0x400>;
-                        interrupts = <0 3 1>;
+                        interrupts = <0 3 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 18>;
@@ -303,7 +303,7 @@
                uart3: serial@01c28c00 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28c00 0x400>;
-                        interrupts = <0 4 1>;
+                        interrupts = <0 4 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 19>;
@@ -313,7 +313,7 @@
                uart4: serial@01c29000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29000 0x400>;
-                        interrupts = <0 17 1>;
+                        interrupts = <0 17 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 20>;
@@ -323,7 +323,7 @@
                uart5: serial@01c29400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29400 0x400>;
-                        interrupts = <0 18 1>;
+                        interrupts = <0 18 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 21>;
@@ -333,7 +333,7 @@
                uart6: serial@01c29800 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29800 0x400>;
-                        interrupts = <0 19 1>;
+                        interrupts = <0 19 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 22>;
@@ -343,7 +343,7 @@
                uart7: serial@01c29c00 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29c00 0x400>;
-                        interrupts = <0 20 1>;
+                        interrupts = <0 20 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 23>;
@@ -353,7 +353,7 @@
                i2c0: i2c@01c2ac00 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2ac00 0x400>;
-                        interrupts = <0 7 1>;
+                        interrupts = <0 7 4>;
                        clocks = <&apb1_gates 0>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -362,7 +362,7 @@
                i2c1: i2c@01c2b000 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2b000 0x400>;
-                        interrupts = <0 8 1>;
+                        interrupts = <0 8 4>;
                        clocks = <&apb1_gates 1>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -371,7 +371,7 @@
                i2c2: i2c@01c2b400 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2b400 0x400>;
-                        interrupts = <0 9 1>;
+                        interrupts = <0 9 4>;
                        clocks = <&apb1_gates 2>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -380,7 +380,7 @@
                i2c3: i2c@01c2b800 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2b800 0x400>;
-                        interrupts = <0 88 1>;
+                        interrupts = <0 88 4>;
                        clocks = <&apb1_gates 3>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -389,7 +389,7 @@
                i2c4: i2c@01c2bc00 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2bc00 0x400>;
-                        interrupts = <0 89 1>;
+                        interrupts = <0 89 4>;
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
                        status = "disabled";
diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c
index 26020a03f659..1e361abc29eb 100644
--- a/arch/arm/common/mcpm_entry.c
+++ b/arch/arm/common/mcpm_entry.c
@@ -35,8 +35,7 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
        unsigned long *poke = &mcpm_entry_early_pokes[cluster][cpu][0];
        poke[0] = poke_phys_addr;
        poke[1] = poke_val;
-        __cpuc_flush_dcache_area((void *)poke, 8);
+        __sync_cache_range_w(poke, 2 * sizeof(*poke));
-        outer_clean_range(__pa(poke), __pa(poke + 2));
 }
 static const struct mcpm_platform_ops *platform_ops;
@@ -167,7 +166,7 @@ void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster)
        dmb();
        mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN;
        sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu);
-        dsb_sev();
+        sev();
 }
 /*
@@ -183,7 +182,7 @@ void __mcpm_outbound_leave_critical(unsigned int cluster, int state)
        dmb();
        mcpm_sync.clusters[cluster].cluster = state;
        sync_cache_w(&mcpm_sync.clusters[cluster].cluster);
-        dsb_sev();
+        sev();
 }
 /*
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 4a5903e04827..c1df4e9db140 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -69,6 +69,7 @@ CONFIG_KS8851=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
 CONFIG_MDIO_SUN4I=y
+CONFIG_TI_CPSW=y
 CONFIG_KEYBOARD_SPEAR=y
 CONFIG_SERIO_AMBAKMI=y
 CONFIG_SERIAL_8250=y
@@ -133,12 +134,14 @@ CONFIG_USB_GPIO_VBUS=y
 CONFIG_USB_ISP1301=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=16
 CONFIG_MMC_ARMMMCI=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_SDHCI_TEGRA=y
 CONFIG_MMC_SDHCI_SPEAR=y
+CONFIG_MMC_SDHCI_BCM_KONA=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_EDAC=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 98a50c309b90..bfa80a11e8c7 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -173,6 +173,7 @@ CONFIG_MFD_PALMAS=y
 CONFIG_MFD_TPS65217=y
 CONFIG_MFD_TPS65910=y
 CONFIG_TWL6040_CORE=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index d57a85badb5e..3e2259b60236 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -12,6 +12,9 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
@@ -58,4 +61,8 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_COMMON_CLK_DEBUG=y
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
 CONFIG_NLS=y
+CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index ac632cc38f24..c6ebc184bf68 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_CPU_IDLE=y
+CONFIG_ARM_U8500_CPUIDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_PM_RUNTIME=y
@@ -109,6 +110,8 @@ CONFIG_EXT2_FS_SECURITY=y
 CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/crypto/aesbs-core.S_shipped b/arch/arm/crypto/aesbs-core.S_shipped
index 64205d453260..71e5fc7cfb18 100644
--- a/arch/arm/crypto/aesbs-core.S_shipped
+++ b/arch/arm/crypto/aesbs-core.S_shipped
@@ -58,7 +58,7 @@
 # define VFP_ABI_FRAME  0
 # define BSAES_ASM_EXTENDED_KEY
 # define XTS_CHAIN_TWEAK
-# define __ARM_ARCH__ __LINUX_ARM_ARCH__
+# define __ARM_ARCH__   7
 #endif
 #ifdef __thumb__
diff --git a/arch/arm/crypto/bsaes-armv7.pl b/arch/arm/crypto/bsaes-armv7.pl
index f3d96d932573..be068db960ee 100644
--- a/arch/arm/crypto/bsaes-armv7.pl
+++ b/arch/arm/crypto/bsaes-armv7.pl
@@ -701,7 +701,7 @@ $code.=<<___;
 # define VFP_ABI_FRAME  0
 # define BSAES_ASM_EXTENDED_KEY
 # define XTS_CHAIN_TWEAK
-# define __ARM_ARCH__ __LINUX_ARM_ARCH__
+# define __ARM_ARCH__   7
 #endif
 #ifdef __thumb__
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index ee753f1749cd..e9a49fe0284e 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -481,4 +481,9 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)
        : : : "r0","r1","r2","r3","r4","r5","r6","r7", \
              "r9","r10","lr","memory" )
+int set_memory_ro(unsigned long addr, int numpages);
+int set_memory_rw(unsigned long addr, int numpages);
+int set_memory_x(unsigned long addr, int numpages);
+int set_memory_nx(unsigned long addr, int numpages);
 #endif
diff --git a/arch/arm/include/asm/checksum.h b/arch/arm/include/asm/checksum.h
index 6dcc16430868..523315115478 100644
--- a/arch/arm/include/asm/checksum.h
+++ b/arch/arm/include/asm/checksum.h
@@ -87,19 +87,33 @@ static inline __wsum
 csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
                   unsigned short proto, __wsum sum)
 {
-        __asm__(
+        u32 lenprot = len | proto << 16;
-        "adds   %0, %1, %2              @ csum_tcpudp_nofold    \n\
+        if (__builtin_constant_p(sum) && sum == 0) {
-        adcs    %0, %0, %3                                      \n"
+                __asm__(
+                "adds   %0, %1, %2      @ csum_tcpudp_nofold0   \n\t"
 #ifdef __ARMEB__
-        "adcs   %0, %0, %4                                      \n"
+                "adcs   %0, %0, %3                              \n\t"
 #else
-        "adcs   %0, %0, %4, lsl #8                              \n"
+                "adcs   %0, %0, %3, ror #8                      \n\t"
 #endif
-        "adcs   %0, %0, %5                                      \n\
+                "adc    %0, %0, #0"
-        adc     %0, %0, #0"
+                : "=&r" (sum)
-        : "=&r"(sum)
+                : "r" (daddr), "r" (saddr), "r" (lenprot)
-        : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto))
+                : "cc");
-        : "cc");
+        } else {
+                __asm__(
+                "adds   %0, %1, %2      @ csum_tcpudp_nofold    \n\t"
+                "adcs   %0, %0, %3                              \n\t"
+#ifdef __ARMEB__
+                "adcs   %0, %0, %4                              \n\t"
+#else
+                "adcs   %0, %0, %4, ror #8                      \n\t"
+#endif
+                "adc    %0, %0, #0"
+                : "=&r"(sum)
+                : "r" (sum), "r" (daddr), "r" (saddr), "r" (lenprot)
+                : "cc");
+        }
        return sum;
 }       
 /*
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 3b2c40b5bfa2..6795ff743b3d 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -131,6 +131,7 @@ struct l2x0_regs {
        unsigned long prefetch_ctrl;
        unsigned long pwr_ctrl;
        unsigned long ctrl;
+        unsigned long aux2_ctrl;
 };
 extern struct l2x0_regs l2x0_saved_regs;
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 3c597c222ef2..fbeb39c869e9 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -329,7 +329,7 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 */
 #define ioremap(cookie,size)            __arm_ioremap((cookie), (size), MT_DEVICE)
 #define ioremap_nocache(cookie,size)    __arm_ioremap((cookie), (size), MT_DEVICE)
-#define ioremap_cached(cookie,size)     __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
+#define ioremap_cache(cookie,size)      __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
 #define ioremap_wc(cookie,size)         __arm_ioremap((cookie), (size), MT_DEVICE_WC)
 #define iounmap                         __arm_iounmap
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 2fe141fcc8d6..f98c7f32c9c8 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -22,18 +22,21 @@ struct map_desc {
 };
 /* types 0-3 are defined in asm/io.h */
-#define MT_UNCACHED             4
+enum {
-#define MT_CACHECLEAN           5
+        MT_UNCACHED = 4,
-#define MT_MINICLEAN            6
+        MT_CACHECLEAN,
-#define MT_LOW_VECTORS          7
+        MT_MINICLEAN,
-#define MT_HIGH_VECTORS         8
+        MT_LOW_VECTORS,
-#define MT_MEMORY               9
+        MT_HIGH_VECTORS,
-#define MT_ROM                  10
+        MT_MEMORY_RWX,
-#define MT_MEMORY_NONCACHED     11
+        MT_MEMORY_RW,
-#define MT_MEMORY_DTCM          12
+        MT_ROM,
-#define MT_MEMORY_ITCM          13
+        MT_MEMORY_RWX_NONCACHED,
-#define MT_MEMORY_SO            14
+        MT_MEMORY_RW_DTCM,
-#define MT_MEMORY_DMA_READY     15
+        MT_MEMORY_RWX_ITCM,
+        MT_MEMORY_RW_SO,
+        MT_MEMORY_DMA_READY,
+};
 #ifdef CONFIG_MMU
 extern void iotable_init(struct map_desc *, int);
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 9ecccc865046..8756e4bcdba0 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -100,23 +100,19 @@
 #define TASK_UNMAPPED_BASE      UL(0x00000000)
 #endif
-#ifndef PHYS_OFFSET
-#define PHYS_OFFSET             UL(CONFIG_DRAM_BASE)
-#endif
 #ifndef END_MEM
 #define END_MEM                 (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
 #endif
 #ifndef PAGE_OFFSET
-#define PAGE_OFFSET             (PHYS_OFFSET)
+#define PAGE_OFFSET             PLAT_PHYS_OFFSET
 #endif
 /*
 * The module can be at any place in ram in nommu mode.
 */
 #define MODULES_END             (END_MEM)
-#define MODULES_VADDR           (PHYS_OFFSET)
+#define MODULES_VADDR           PAGE_OFFSET
 #define XIP_VIRT_ADDR(physaddr)  (physaddr)
@@ -157,6 +153,16 @@
 #endif
 #define ARCH_PGD_MASK           ((1 << ARCH_PGD_SHIFT) - 1)
+/*
+ * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical
+ * memory.  This is used for XIP and NoMMU kernels, or by kernels which
+ * have their own mach/memory.h.  Assembly code must always use
+ * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
+ */
+#ifndef PLAT_PHYS_OFFSET
+#define PLAT_PHYS_OFFSET        UL(CONFIG_PHYS_OFFSET)
+#endif
 #ifndef __ASSEMBLY__
 /*
@@ -239,6 +245,8 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
 #else
+#define PHYS_OFFSET     PLAT_PHYS_OFFSET
 static inline phys_addr_t __virt_to_phys(unsigned long x)
 {
        return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET;
@@ -251,17 +259,6 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
 #endif
 #endif
-#endif /* __ASSEMBLY__ */
-#ifndef PHYS_OFFSET
-#ifdef PLAT_PHYS_OFFSET
-#define PHYS_OFFSET     PLAT_PHYS_OFFSET
-#else
-#define PHYS_OFFSET     UL(CONFIG_PHYS_OFFSET)
-#endif
-#endif
-#ifndef __ASSEMBLY__
 /*
 * PFNs are used to describe any physical page; this means
@@ -350,7 +347,8 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
 #define ARCH_PFN_OFFSET         PHYS_PFN_OFFSET
 #define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-#define virt_addr_valid(kaddr)  ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
+#define virt_addr_valid(kaddr)  (((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) \
+                                        && pfn_valid(__pa(kaddr) >> PAGE_SHIFT) )
 #endif
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index a98a2e112fae..680a83e94467 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -57,12 +57,9 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                               enum pci_mmap_state mmap_state, int write_combine);
-/*
- * Dummy implementation; always return 0.
- */
 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 {
-        return 0;
+        return channel ? 15 : 14;
 }
 #endif /* __KERNEL__ */
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 86a659a19526..dfff709fda3c 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -160,6 +160,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
        return (pmd_t *)pud;
 }
+#define pmd_large(pmd)          (pmd_val(pmd) & 2)
 #define pmd_bad(pmd)            (pmd_val(pmd) & 2)
 #define copy_pmd(pmdpd,pmdps)           \
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index 4f9503908dca..03243f7eeddf 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -142,6 +142,7 @@
                                                 PMD_TYPE_TABLE)
 #define pmd_sect(pmd)           ((pmd_val(pmd) & PMD_TYPE_MASK) == \
                                                 PMD_TYPE_SECT)
+#define pmd_large(pmd)          pmd_sect(pmd)
 #define pud_clear(pudp)                 \
        do {                            \
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index be956dbf6bae..7d59b524f2af 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,7 +61,7 @@ extern void __pgd_error(const char *file, int line, pgd_t);
 * mapping to be mapped at.  This is particularly important for
 * non-high vector CPUs.
 */
-#define FIRST_USER_ADDRESS      PAGE_SIZE
+#define FIRST_USER_ADDRESS      (PAGE_SIZE * 2)
 /*
 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
@@ -254,6 +254,8 @@ PTE_BIT_FUNC(mkclean,   &= ~L_PTE_DIRTY);
 PTE_BIT_FUNC(mkdirty,   |= L_PTE_DIRTY);
 PTE_BIT_FUNC(mkold,     &= ~L_PTE_YOUNG);
 PTE_BIT_FUNC(mkyoung,   |= L_PTE_YOUNG);
+PTE_BIT_FUNC(mkexec,   &= ~L_PTE_XN);
+PTE_BIT_FUNC(mknexec,   |= L_PTE_XN);
 static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
diff --git a/arch/arm/include/asm/word-at-a-time.h b/arch/arm/include/asm/word-at-a-time.h
index 4d52f92967a6..a6d0a29861e7 100644
--- a/arch/arm/include/asm/word-at-a-time.h
+++ b/arch/arm/include/asm/word-at-a-time.h
@@ -48,10 +48,14 @@ static inline unsigned long find_zero(unsigned long mask)
        return ret;
 }
-#ifdef CONFIG_DCACHE_WORD_ACCESS
 #define zero_bytemask(mask) (mask)
+#else   /* __ARMEB__ */
+#include <asm-generic/word-at-a-time.h>
+#endif
+#ifdef CONFIG_DCACHE_WORD_ACCESS
 /*
 * Load an unaligned word from kernel space.
 *
@@ -73,7 +77,11 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
        "       bic     %2, %2, #0x3\n"
        "       ldr     %0, [%2]\n"
        "       lsl     %1, %1, #0x3\n"
+#ifndef __ARMEB__
        "       lsr     %0, %0, %1\n"
+#else
+        "       lsl     %0, %0, %1\n"
+#endif
        "       b       2b\n"
        "       .popsection\n"
        "       .pushsection __ex_table,\"a\"\n"
@@ -86,11 +94,5 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
        return ret;
 }
 #endif  /* DCACHE_WORD_ACCESS */
-#else   /* __ARMEB__ */
-#include <asm-generic/word-at-a-time.h>
-#endif
 #endif /* __ASM_ARM_WORD_AT_A_TIME_H */
diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h
index 75579a9d6f76..3759cacdd7f8 100644
--- a/arch/arm/include/asm/xen/page.h
+++ b/arch/arm/include/asm/xen/page.h
@@ -117,6 +117,6 @@ static inline bool set_phys_to_machine(unsigned long pfn, unsigned long mfn)
        return __set_phys_to_machine(pfn, mfn);
 }
-#define xen_remap(cookie, size) ioremap_cached((cookie), (size));
+#define xen_remap(cookie, size) ioremap_cache((cookie), (size));
 #endif /* _ASM_ARM_XEN_PAGE_H */
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 1f031ddd0667..85e664b6a5f1 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -35,6 +35,8 @@ extern void __ucmpdi2(void);
 extern void __udivsi3(void);
 extern void __umodsi3(void);
 extern void __do_div64(void);
+extern void __bswapsi2(void);
+extern void __bswapdi2(void);
 extern void __aeabi_idiv(void);
 extern void __aeabi_idivmod(void);
@@ -114,6 +116,8 @@ EXPORT_SYMBOL(__ucmpdi2);
 EXPORT_SYMBOL(__udivsi3);
 EXPORT_SYMBOL(__umodsi3);
 EXPORT_SYMBOL(__do_div64);
+EXPORT_SYMBOL(__bswapsi2);
+EXPORT_SYMBOL(__bswapdi2);
 #ifdef CONFIG_AEABI
 EXPORT_SYMBOL(__aeabi_idiv);
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 739c3dfc1da2..34d5fd585bbb 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -171,7 +171,7 @@ void __init arm_dt_init_cpu_maps(void)
 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 {
-        return (phys_id & MPIDR_HWID_BITMASK) == cpu_logical_map(cpu);
+        return phys_id == cpu_logical_map(cpu);
 }
 static const void * __init arch_get_next_mach(const char *const **match)
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index 52b26432c9a9..2260f1855820 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -14,8 +14,6 @@
 #include <asm/thread_notify.h>
 #include <asm/v7m.h>
-#include <mach/entry-macro.S>
 #include "entry-header.S"
 #ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 8ff0ecdc637f..131a6ab5f355 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -385,7 +385,6 @@ out:
        return ret;
 out_unmap:
-        amba_set_drvdata(dev, NULL);
        iounmap(t->etb_regs);
 out_release:
@@ -398,8 +397,6 @@ static int etb_remove(struct amba_device *dev)
 {
        struct tracectx *t = amba_get_drvdata(dev);
-        amba_set_drvdata(dev, NULL);
        iounmap(t->etb_regs);
        t->etb_regs = NULL;
@@ -588,7 +585,6 @@ out:
        return ret;
 out_unmap:
-        amba_set_drvdata(dev, NULL);
        iounmap(t->etm_regs);
 out_release:
@@ -601,8 +597,6 @@ static int etm_remove(struct amba_device *dev)
 {
        struct tracectx *t = amba_get_drvdata(dev);
-        amba_set_drvdata(dev, NULL);
        iounmap(t->etm_regs);
        t->etm_regs = NULL;
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 14235ba64a90..716249cc2ee1 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -68,7 +68,7 @@ ENTRY(stext)
 #ifdef CONFIG_ARM_MPU
        /* Calculate the size of a region covering just the kernel */
-        ldr     r5, =PHYS_OFFSET                @ Region start: PHYS_OFFSET
+        ldr     r5, =PLAT_PHYS_OFFSET           @ Region start: PHYS_OFFSET
        ldr     r6, =(_end)                     @ Cover whole kernel
        sub     r6, r6, r5                      @ Minimum size of region to map
        clz     r6, r6                          @ Region size must be 2^N...
@@ -213,7 +213,7 @@ ENTRY(__setup_mpu)
        set_region_nr r0, #MPU_RAM_REGION
        isb
        /* Full access from PL0, PL1, shared for CONFIG_SMP, cacheable */
-        ldr     r0, =PHYS_OFFSET                @ RAM starts at PHYS_OFFSET
+        ldr     r0, =PLAT_PHYS_OFFSET           @ RAM starts at PHYS_OFFSET
        ldr     r5,=(MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL)
        setup_region r0, r5, r6, MPU_DATA_SIDE  @ PHYS_OFFSET, shared, enabled
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 11d59b32fb8d..32f317e5828a 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -110,7 +110,7 @@ ENTRY(stext)
        sub     r4, r3, r4                      @ (PHYS_OFFSET - PAGE_OFFSET)
        add     r8, r8, r4                      @ PHYS_OFFSET
 #else
-        ldr     r8, =PHYS_OFFSET                @ always constant in this case
+        ldr     r8, =PLAT_PHYS_OFFSET           @ always constant in this case
 #endif
        /*
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 57221e349a7c..f0d180d8b29f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -14,11 +14,12 @@
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
+#include <asm/fncpy.h>
 #include <asm/mach-types.h>
 #include <asm/smp_plat.h>
 #include <asm/system_misc.h>
-extern const unsigned char relocate_new_kernel[];
+extern void relocate_new_kernel(void);
 extern const unsigned int relocate_new_kernel_size;
 extern unsigned long kexec_start_address;
@@ -142,6 +143,8 @@ void machine_kexec(struct kimage *image)
 {
        unsigned long page_list;
        unsigned long reboot_code_buffer_phys;
+        unsigned long reboot_entry = (unsigned long)relocate_new_kernel;
+        unsigned long reboot_entry_phys;
        void *reboot_code_buffer;
        /*
@@ -168,16 +171,16 @@ void machine_kexec(struct kimage *image)
        /* copy our kernel relocation code to the control code page */
-        memcpy(reboot_code_buffer,
+        reboot_entry = fncpy(reboot_code_buffer,
-               relocate_new_kernel, relocate_new_kernel_size);
+                             reboot_entry,
+                             relocate_new_kernel_size);
+        reboot_entry_phys = (unsigned long)reboot_entry +
+                (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer);
-        flush_icache_range((unsigned long) reboot_code_buffer,
-                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
        printk(KERN_INFO "Bye!\n");
        if (kexec_reinit)
                kexec_reinit();
-        soft_restart(reboot_code_buffer_phys);
+        soft_restart(reboot_entry_phys);
 }
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index d85055cd24ba..20d553c9f5e2 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -254,7 +254,7 @@ static int probe_current_pmu(struct arm_pmu *pmu)
 static int cpu_pmu_device_probe(struct platform_device *pdev)
 {
        const struct of_device_id *of_id;
-        int (*init_fn)(struct arm_pmu *);
+        const int (*init_fn)(struct arm_pmu *);
        struct device_node *node = pdev->dev.of_node;
        struct arm_pmu *pmu;
        int ret = -ENODEV;
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 94f6b05f9e24..92f7b15dd221 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -404,6 +404,7 @@ EXPORT_SYMBOL(dump_fpu);
 unsigned long get_wchan(struct task_struct *p)
 {
        struct stackframe frame;
+        unsigned long stack_page;
        int count = 0;
        if (!p || p == current || p->state == TASK_RUNNING)
                return 0;
@@ -412,9 +413,11 @@ unsigned long get_wchan(struct task_struct *p)
        frame.sp = thread_saved_sp(p);
        frame.lr = 0;                   /* recovered from the stack */
        frame.pc = thread_saved_pc(p);
+        stack_page = (unsigned long)task_stack_page(p);
        do {
-                int ret = unwind_frame(&frame);
+                if (frame.sp < stack_page ||
-                if (ret < 0)
+                    frame.sp >= stack_page + THREAD_SIZE ||
+                    unwind_frame(&frame) < 0)
                        return 0;
                if (!in_sched_functions(frame.pc))
                        return frame.pc;
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index d0cdedf4864d..95858966d84e 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -2,10 +2,12 @@
 * relocate_kernel.S - put the kernel image in place to boot
 */
+#include <linux/linkage.h>
 #include <asm/kexec.h>
-        .globl relocate_new_kernel
+        .align  3       /* not needed for this code, but keeps fncpy() happy */
-relocate_new_kernel:
+ENTRY(relocate_new_kernel)
        ldr     r0,kexec_indirection_page
        ldr     r1,kexec_start_address
@@ -79,6 +81,8 @@ kexec_mach_type:
 kexec_boot_atags:
        .long   0x0
+ENDPROC(relocate_new_kernel)
 relocate_new_kernel_end:
        .globl relocate_new_kernel_size
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6a1b8a81b1ae..061cea820e3f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -334,7 +334,7 @@ static void __init cacheid_init(void)
                cacheid = CACHEID_VIVT;
        }
-        printk("CPU: %s data cache, %s instruction cache\n",
+        pr_info("CPU: %s data cache, %s instruction cache\n",
                cache_is_vivt() ? "VIVT" :
                cache_is_vipt_aliasing() ? "VIPT aliasing" :
                cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
@@ -416,7 +416,7 @@ void notrace cpu_init(void)
        struct stack *stk = &stacks[cpu];
        if (cpu >= NR_CPUS) {
-                printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
+                pr_crit("CPU%u: bad primary CPU number\n", cpu);
                BUG();
        }
@@ -484,7 +484,7 @@ void __init smp_setup_processor_id(void)
         */
        set_my_cpu_offset(0);
-        printk(KERN_INFO "Booting Linux on physical CPU 0x%x\n", mpidr);
+        pr_info("Booting Linux on physical CPU 0x%x\n", mpidr);
 }
 struct mpidr_hash mpidr_hash;
@@ -564,8 +564,8 @@ static void __init setup_processor(void)
         */
        list = lookup_processor_type(read_cpuid_id());
        if (!list) {
-                printk("CPU configuration botched (ID %08x), unable "
+                pr_err("CPU configuration botched (ID %08x), unable to continue.\n",
-                       "to continue.\n", read_cpuid_id());
+                       read_cpuid_id());
                while (1);
        }
@@ -585,9 +585,9 @@ static void __init setup_processor(void)
        cpu_cache = *list->cache;
 #endif
-        printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
+        pr_info("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
-               cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
+                cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
-               proc_arch[cpu_architecture()], cr_alignment);
+                proc_arch[cpu_architecture()], cr_alignment);
        snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
                 list->arch_name, ENDIANNESS);
@@ -629,8 +629,8 @@ int __init arm_add_memory(u64 start, u64 size)
        u64 aligned_start;
        if (meminfo.nr_banks >= NR_BANKS) {
-                printk(KERN_CRIT "NR_BANKS too low, "
+                pr_crit("NR_BANKS too low, ignoring memory at 0x%08llx\n",
-                        "ignoring memory at 0x%08llx\n", (long long)start);
+                        (long long)start);
                return -EINVAL;
        }
@@ -643,14 +643,14 @@ int __init arm_add_memory(u64 start, u64 size)
 #ifndef CONFIG_ARCH_PHYS_ADDR_T_64BIT
        if (aligned_start > ULONG_MAX) {
-                printk(KERN_CRIT "Ignoring memory at 0x%08llx outside "
+                pr_crit("Ignoring memory at 0x%08llx outside 32-bit physical address space\n",
-                       "32-bit physical address space\n", (long long)start);
+                        (long long)start);
                return -EINVAL;
        }
        if (aligned_start + size > ULONG_MAX) {
-                printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
+                pr_crit("Truncating memory at 0x%08llx to fit in 32-bit physical address space\n",
-                        "32-bit physical address space\n", (long long)start);
+                        (long long)start);
                /*
                 * To ensure bank->start + bank->size is representable in
                 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
@@ -660,6 +660,20 @@ int __init arm_add_memory(u64 start, u64 size)
        }
 #endif
+        if (aligned_start < PHYS_OFFSET) {
+                if (aligned_start + size <= PHYS_OFFSET) {
+                        pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n",
+                                aligned_start, aligned_start + size);
+                        return -EINVAL;
+                }
+                pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n",
+                        aligned_start, (u64)PHYS_OFFSET);
+                size -= PHYS_OFFSET - aligned_start;
+                aligned_start = PHYS_OFFSET;
+        }
        bank->start = aligned_start;
        bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
@@ -819,16 +833,15 @@ static void __init reserve_crashkernel(void)
        ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
        if (ret < 0) {
-                printk(KERN_WARNING "crashkernel reservation failed - "
+                pr_warn("crashkernel reservation failed - memory is in use (0x%lx)\n",
-                       "memory is in use (0x%lx)\n", (unsigned long)crash_base);
+                        (unsigned long)crash_base);
                return;
        }
-        printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
+        pr_info("Reserving %ldMB of memory at %ldMB for crashkernel (System RAM: %ldMB)\n",
-               "for crashkernel (System RAM: %ldMB)\n",
+                (unsigned long)(crash_size >> 20),
-               (unsigned long)(crash_size >> 20),
+                (unsigned long)(crash_base >> 20),
-               (unsigned long)(crash_base >> 20),
+                (unsigned long)(total_mem >> 20));
-               (unsigned long)(total_mem >> 20));
        crashk_res.start = crash_base;
        crashk_res.end = crash_base + crash_size - 1;
@@ -873,8 +886,6 @@ void __init setup_arch(char **cmdline_p)
        machine_desc = mdesc;
        machine_name = mdesc->name;
-        setup_dma_zone(mdesc);
        if (mdesc->reboot_mode != REBOOT_HARD)
                reboot_mode = mdesc->reboot_mode;
@@ -892,6 +903,7 @@ void __init setup_arch(char **cmdline_p)
        sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
        early_paging_init(mdesc, lookup_processor_type(read_cpuid_id()));
+        setup_dma_zone(mdesc);
        sanity_check_meminfo();
        arm_memblock_init(&meminfo, mdesc);
diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S
index 3c5d0f2170fd..b84d0cb13682 100644
--- a/arch/arm/kernel/sigreturn_codes.S
+++ b/arch/arm/kernel/sigreturn_codes.S
@@ -30,6 +30,27 @@
 * snippets.
 */
+/*
+ * In CPU_THUMBONLY case kernel arm opcodes are not allowed.
+ * Note in this case codes skips those instructions but it uses .org
+ * directive to keep correct layout of sigreturn_codes array.
+ */
+#ifndef CONFIG_CPU_THUMBONLY
+#define ARM_OK(code...) code
+#else
+#define ARM_OK(code...)
+#endif
+        .macro arm_slot n
+        .org    sigreturn_codes + 12 * (\n)
+ARM_OK( .arm    )
+        .endm
+        .macro thumb_slot n
+        .org    sigreturn_codes + 12 * (\n) + 8
+        .thumb
+        .endm
 #if __LINUX_ARM_ARCH__ <= 4
        /*
         * Note we manually set minimally required arch that supports
@@ -45,26 +66,27 @@
        .global sigreturn_codes
        .type   sigreturn_codes, #object
-        .arm
+        .align
 sigreturn_codes:
        /* ARM sigreturn syscall code snippet */
-        mov     r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
+        arm_slot 0
-        swi     #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)
+ARM_OK( mov     r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)       )
+ARM_OK( swi     #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)      )
        /* Thumb sigreturn syscall code snippet */
-        .thumb
+        thumb_slot 0
        movs    r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
        swi     #0
        /* ARM sigreturn_rt syscall code snippet */
-        .arm
+        arm_slot 1
-        mov     r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
+ARM_OK( mov     r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)    )
-        swi     #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)
+ARM_OK( swi     #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)   )
        /* Thumb sigreturn_rt syscall code snippet */
-        .thumb
+        thumb_slot 1
        movs    r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
        swi     #0
@@ -74,7 +96,7 @@ sigreturn_codes:
         * it is thumb case or not, so we need additional
         * word after real last entry.
         */
-        .arm
+        arm_slot 2
        .space  4
        .size   sigreturn_codes, . - sigreturn_codes
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index dc894ab3622b..b7b4c86e338b 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -105,8 +105,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
        secondary_data.pgdir = get_arch_pgd(idmap_pgd);
        secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
 #endif
-        __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
+        sync_cache_w(&secondary_data);
-        outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
        /*
         * Now bring the CPU into our world.
@@ -294,6 +293,9 @@ void __ref cpu_die(void)
        if (smp_ops.cpu_die)
                smp_ops.cpu_die(cpu);
+        pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
+                cpu);
        /*
         * Do not return to the idle loop - jump back to the secondary
         * cpu initialisation.  There's some initialisation which needs
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 00f79e59985b..af4e8c8a5422 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame)
        high = ALIGN(low, THREAD_SIZE);
        /* check current frame pointer is within bounds */
-        if (fp < (low + 12) || fp + 4 >= high)
+        if (fp < low + 12 || fp > high - 4)
                return -EINVAL;
        /* restore the registers from the stack frame */
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index f50f19e5c138..7a3be1d4d0b1 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -52,7 +52,7 @@ static struct map_desc dtcm_iomap[] __initdata = {
                .virtual        = DTCM_OFFSET,
                .pfn            = __phys_to_pfn(DTCM_OFFSET),
                .length         = 0,
-                .type           = MT_MEMORY_DTCM
+                .type           = MT_MEMORY_RW_DTCM
        }
 };
@@ -61,7 +61,7 @@ static struct map_desc itcm_iomap[] __initdata = {
                .virtual        = ITCM_OFFSET,
                .pfn            = __phys_to_pfn(ITCM_OFFSET),
                .length         = 0,
-                .type           = MT_MEMORY_ITCM
+                .type           = MT_MEMORY_RWX_ITCM,
        }
 };
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 85a87370f144..0bc94b1fd1ae 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -68,16 +68,16 @@ struct cpu_efficiency {
 * Processors that are not defined in the table,
 * use the default SCHED_POWER_SCALE value for cpu_scale.
 */
-struct cpu_efficiency table_efficiency[] = {
+static const struct cpu_efficiency table_efficiency[] = {
        {"arm,cortex-a15", 3891},
        {"arm,cortex-a7",  2048},
        {NULL, },
 };
-unsigned long *__cpu_capacity;
+static unsigned long *__cpu_capacity;
 #define cpu_capacity(cpu)       __cpu_capacity[cpu]
-unsigned long middle_capacity = 1;
+static unsigned long middle_capacity = 1;
 /*
 * Iterate all CPUs' descriptor in DT and compute the efficiency
@@ -89,7 +89,7 @@ unsigned long middle_capacity = 1;
 */
 static void __init parse_dt_topology(void)
 {
-        struct cpu_efficiency *cpu_eff;
+        const struct cpu_efficiency *cpu_eff;
        struct device_node *cn = NULL;
        unsigned long min_capacity = (unsigned long)(-1);
        unsigned long max_capacity = 0;
@@ -158,7 +158,7 @@ static void __init parse_dt_topology(void)
 * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the
 * function returns directly for SMP system.
 */
-void update_cpu_power(unsigned int cpu)
+static void update_cpu_power(unsigned int cpu)
 {
        if (!cpu_capacity(cpu))
                return;
@@ -185,7 +185,7 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
        return &cpu_topology[cpu].core_sibling;
 }
-void update_siblings_masks(unsigned int cpuid)
+static void update_siblings_masks(unsigned int cpuid)
 {
        struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
        int cpu;
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index dbf0923e8d76..172ee18ff124 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -36,7 +36,13 @@
 #include <asm/system_misc.h>
 #include <asm/opcodes.h>
-static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
+static const char *handler[]= {
+        "prefetch abort",
+        "data abort",
+        "address exception",
+        "interrupt",
+        "undefined instruction",
+};
 void *vectors_page;
@@ -56,7 +62,7 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long);
 void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
 {
 #ifdef CONFIG_KALLSYMS
-        printk("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
+        printk("[<%08lx>] (%ps) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
 #else
        printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
 #endif
@@ -425,9 +431,10 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
                        instr2 = __mem_to_opcode_thumb16(instr2);
                        instr = __opcode_thumb32_compose(instr, instr2);
                }
-        } else if (get_user(instr, (u32 __user *)pc)) {
+        } else {
+                if (get_user(instr, (u32 __user *)pc))
+                        goto die_sig;
                instr = __mem_to_opcode_arm(instr);
-                goto die_sig;
        }
        if (call_undef_hook(regs, instr) == 0)
@@ -509,9 +516,10 @@ static inline int
 __do_cache_op(unsigned long start, unsigned long end)
 {
        int ret;
-        unsigned long chunk = PAGE_SIZE;
        do {
+                unsigned long chunk = min(PAGE_SIZE, end - start);
                if (signal_pending(current)) {
                        struct thread_info *ti = current_thread_info();
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 47d7338561de..0573faab96ad 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -13,7 +13,7 @@ lib-y		:= backtrace.o changebit.o csumipv6.o csumpartial.o   \
                   ashldi3.o ashrdi3.o lshrdi3.o muldi3.o             \
                   ucmpdi2.o lib1funcs.o div64.o                      \
                   io-readsb.o io-writesb.o io-readsl.o io-writesl.o  \
-                   call_with_stack.o
+                   call_with_stack.o bswapsdi2.o
 mmu-y   := clear_user.o copy_page.o getuser.o putuser.o
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index cd07b5814c23..4102be617fce 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -80,14 +80,14 @@ for_each_frame:	tst	frame, mask		@ Check for address exceptions
                ldr     r1, [sv_pc, #-4]        @ if stmfd sp!, {args} exists,
                ldr     r3, .Ldsi+4
-                teq     r3, r1, lsr #10
+                teq     r3, r1, lsr #11
                ldreq   r0, [frame, #-8]        @ get sp
                subeq   r0, r0, #4              @ point at the last arg
                bleq    .Ldumpstm               @ dump saved registers
 1004:           ldr     r1, [sv_pc, #0]         @ if stmfd sp!, {..., fp, ip, lr, pc}
                ldr     r3, .Ldsi               @ instruction exists,
-                teq     r3, r1, lsr #10
+                teq     r3, r1, lsr #11
                subeq   r0, frame, #16
                bleq    .Ldumpstm               @ dump saved registers
@@ -128,11 +128,11 @@ ENDPROC(c_backtrace)
                beq     2f
                add     r7, r7, #1
                teq     r7, #6
-                moveq   r7, #1
+                moveq   r7, #0
-                moveq   r1, #'\n'
+                adr     r3, .Lcr
-                movne   r1, #' '
+                addne   r3, r3, #1              @ skip newline
-                ldr     r3, [stack], #-4
+                ldr     r2, [stack], #-4
-                mov     r2, reg
+                mov     r1, reg
                adr     r0, .Lfp
                bl      printk
 2:              subs    reg, reg, #1
@@ -142,11 +142,11 @@ ENDPROC(c_backtrace)
                blne    printk
                ldmfd   sp!, {instr, reg, stack, r7, pc}
-.Lfp:           .asciz  "%cr%d:%08x"
+.Lfp:           .asciz  " r%d:%08x%s"
 .Lcr:           .asciz  "\n"
 .Lbad:          .asciz  "Backtrace aborted due to bad frame pointer <%p>\n"
                .align
-.Ldsi:          .word   0xe92dd800 >> 10        @ stmfd sp!, {... fp, ip, lr, pc}
+.Ldsi:          .word   0xe92dd800 >> 11        @ stmfd sp!, {... fp, ip, lr, pc}
-                .word   0xe92d0000 >> 10        @ stmfd sp!, {}
+                .word   0xe92d0000 >> 11        @ stmfd sp!, {}
 #endif
diff --git a/arch/arm/lib/bswapsdi2.S b/arch/arm/lib/bswapsdi2.S
new file mode 100644
index 000000000000..9fcdd154eff9
--- /dev/null
+++ b/arch/arm/lib/bswapsdi2.S
@@ -0,0 +1,36 @@
+#include <linux/linkage.h>
+#if __LINUX_ARM_ARCH__ >= 6
+ENTRY(__bswapsi2)
+        rev r0, r0
+        bx lr
+ENDPROC(__bswapsi2)
+ENTRY(__bswapdi2)
+        rev r3, r0
+        rev r0, r1
+        mov r1, r3
+        bx lr
+ENDPROC(__bswapdi2)
+#else
+ENTRY(__bswapsi2)
+        eor r3, r0, r0, ror #16
+        mov r3, r3, lsr #8
+        bic r3, r3, #0xff00
+        eor r0, r3, r0, ror #8
+        mov pc, lr
+ENDPROC(__bswapsi2)
+ENTRY(__bswapdi2)
+        mov ip, r1
+        eor r3, ip, ip, ror #16
+        eor r1, r0, r0, ror #16
+        mov r1, r1, lsr #8
+        mov r3, r3, lsr #8
+        bic r3, r3, #0xff00
+        bic r1, r1, #0xff00
+        eor r1, r1, r0, ror #8
+        eor r0, r3, ip, ror #8
+        mov pc, lr
+ENDPROC(__bswapdi2)
+#endif
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 36b668d8e121..bc1033b897b4 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -40,6 +40,7 @@ ENTRY(__loop_const_udelay)			@ 0 <= r0 <= 0x7fffff06
 /*
 * loops = r0 * HZ * loops_per_jiffy / 1000000
 */
+                .align 3
 @ Delay routine
 ENTRY(__loop_delay)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index f607deb40f4d..bc7b363a3083 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
 static struct clock_event_device clkevt = {
        .name           = "at91_tick",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
        .rating         = 150,
        .set_next_event = clkevt32k_next_event,
        .set_mode       = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
        at91_st_write(AT91_ST_RTMR, 1);
        /* Setup timer clockevent, with minimum of two ticks (important!!) */
-        clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
-        clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
-        clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
        clkevt.cpumask = cpumask_of(0);
-        clockevents_register_device(&clkevt);
+        clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
+                                        2, AT91_ST_ALMV);
        /* register clocksource */
        clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3ed190ce062b..c5101dcb4fb0 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -16,7 +16,11 @@
 #include <mach/at91_ramc.h>
 #include <mach/at91rm9200_sdramc.h>
+#ifdef CONFIG_PM
 extern void at91_pm_set_standby(void (*at91_standby)(void));
+#else
+static inline void at91_pm_set_standby(void (*at91_standby)(void)) { }
+#endif
 /*
 * The AT91RM9200 goes into self-refresh mode with this command, and will
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3ea86428ee09..a28873fe3049 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
        .name           = "twi0_clk",
        .pid            = SAMA5D3_ID_TWI0,
        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk twi1_clk = {
        .name           = "twi1_clk",
        .pid            = SAMA5D3_ID_TWI1,
        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk twi2_clk = {
        .name           = "twi2_clk",
        .pid            = SAMA5D3_ID_TWI2,
        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk mmc0_clk = {
        .name           = "mci0_clk",
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 094b3459c288..2742e00ec5d6 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -81,7 +81,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
        desc->pfn = __phys_to_pfn(base);
        desc->length = length;
-        desc->type = MT_MEMORY_NONCACHED;
+        desc->type = MT_MEMORY_RWX_NONCACHED;
        pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n",
                base, length, desc->virtual);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index c46eccbbd512..78829c513fdc 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -487,7 +487,7 @@ int __init da8xx_register_emac(void)
 static struct resource da830_mcasp1_resources[] = {
        {
-                .name   = "mcasp1",
+                .name   = "mpu",
                .start  = DAVINCI_DA830_MCASP1_REG_BASE,
                .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
                .flags  = IORESOURCE_MEM,
@@ -515,7 +515,7 @@ static struct platform_device da830_mcasp1_device = {
 static struct resource da850_mcasp_resources[] = {
        {
-                .name   = "mcasp",
+                .name   = "mpu",
                .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
                .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
                .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index ef9ff1fb6f52..6117fc644188 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -641,6 +641,7 @@ static struct platform_device dm355_edma_device = {
 static struct resource dm355_asp1_resources[] = {
        {
+                .name   = "mpu",
                .start  = DAVINCI_ASP1_BASE,
                .end    = DAVINCI_ASP1_BASE + SZ_8K - 1,
                .flags  = IORESOURCE_MEM,
@@ -906,7 +907,7 @@ static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
 int __init dm355_gpio_register(void)
 {
        return davinci_gpio_register(dm355_gpio_resources,
-                                     sizeof(dm355_gpio_resources),
+                                     ARRAY_SIZE(dm355_gpio_resources),
                                     &dm355_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1511a0680f9a..d7c6f85d3fc9 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -720,7 +720,7 @@ static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
 int __init dm365_gpio_register(void)
 {
        return davinci_gpio_register(dm365_gpio_resources,
-                                     sizeof(dm365_gpio_resources),
+                                     ARRAY_SIZE(dm365_gpio_resources),
                                     &dm365_gpio_platform_data);
 }
@@ -942,6 +942,7 @@ static struct platform_device dm365_edma_device = {
 static struct resource dm365_asp_resources[] = {
        {
+                .name   = "mpu",
                .start  = DAVINCI_DM365_ASP0_BASE,
                .end    = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1,
                .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 143a3217e8ef..3ce47997bb46 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -572,6 +572,7 @@ static struct platform_device dm644x_edma_device = {
 /* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */
 static struct resource dm644x_asp_resources[] = {
        {
+                .name   = "mpu",
                .start  = DAVINCI_ASP0_BASE,
                .end    = DAVINCI_ASP0_BASE + SZ_8K - 1,
                .flags  = IORESOURCE_MEM,
@@ -792,7 +793,7 @@ static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
 int __init dm644x_gpio_register(void)
 {
        return davinci_gpio_register(dm644_gpio_resources,
-                                     sizeof(dm644_gpio_resources),
+                                     ARRAY_SIZE(dm644_gpio_resources),
                                     &dm644_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 2a73f299c1d0..0e81fea65e7f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -621,7 +621,7 @@ static struct platform_device dm646x_edma_device = {
 static struct resource dm646x_mcasp0_resources[] = {
        {
-                .name   = "mcasp0",
+                .name   = "mpu",
                .start  = DAVINCI_DM646X_MCASP0_REG_BASE,
                .end    = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
                .flags  = IORESOURCE_MEM,
@@ -641,7 +641,7 @@ static struct resource dm646x_mcasp0_resources[] = {
 static struct resource dm646x_mcasp1_resources[] = {
        {
-                .name   = "mcasp1",
+                .name   = "mpu",
                .start  = DAVINCI_DM646X_MCASP1_REG_BASE,
                .end    = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
                .flags  = IORESOURCE_MEM,
@@ -769,7 +769,7 @@ static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
 int __init dm646x_gpio_register(void)
 {
        return davinci_gpio_register(dm646x_gpio_resources,
-                                     sizeof(dm646x_gpio_resources),
+                                     ARRAY_SIZE(dm646x_gpio_resources),
                                     &dm646x_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 2739ca2c1334..9e8220e38398 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
+#include <video/vga.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
@@ -142,11 +143,6 @@ static struct map_desc fb_common_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(DC21285_ARMCSR_BASE),
                .length         = ARMCSR_SIZE,
                .type           = MT_DEVICE,
-        }, {
-                .virtual        = XBUS_BASE,
-                .pfn            = __phys_to_pfn(0x40000000),
-                .length         = XBUS_SIZE,
-                .type           = MT_DEVICE,
        }
 };
@@ -196,6 +192,8 @@ void __init footbridge_map_io(void)
                iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
                pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
        }
+        vga_base = PCIMEM_BASE;
 }
 void footbridge_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index 56607b3a773e..b911e5587ecf 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -10,3 +10,5 @@ extern void footbridge_init_irq(void);
 extern void isa_init_irq(unsigned int irq);
 extern void footbridge_restart(enum reboot_mode, const char *);
+extern void footbridge_sched_clock(void);
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 9ee78f7b4990..3971104d32d4 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -9,6 +9,7 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/sched_clock.h>
 #include <asm/irq.h>
@@ -46,6 +47,16 @@ static struct clocksource cksrc_dc21285 = {
        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
+static int ckevt_dc21285_set_next_event(unsigned long delta,
+        struct clock_event_device *c)
+{
+        *CSR_TIMER1_CLR = 0;
+        *CSR_TIMER1_LOAD = delta;
+        *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16;
+        return 0;
+}
 static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
        struct clock_event_device *c)
 {
@@ -58,7 +69,9 @@ static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
                                   TIMER_CNTL_DIV16;
                break;
-        default:
+        case CLOCK_EVT_MODE_ONESHOT:
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
                *CSR_TIMER1_CNTL = 0;
                break;
        }
@@ -66,9 +79,11 @@ static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
 static struct clock_event_device ckevt_dc21285 = {
        .name           = "dc21285_timer1",
-        .features       = CLOCK_EVT_FEAT_PERIODIC,
+        .features       = CLOCK_EVT_FEAT_PERIODIC |
+                          CLOCK_EVT_FEAT_ONESHOT,
        .rating         = 200,
        .irq            = IRQ_TIMER1,
+        .set_next_event = ckevt_dc21285_set_next_event,
        .set_mode       = ckevt_dc21285_set_mode,
 };
@@ -78,6 +93,10 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id)
        *CSR_TIMER1_CLR = 0;
+        /* Stop the timer if in one-shot mode */
+        if (ce->mode == CLOCK_EVT_MODE_ONESHOT)
+                *CSR_TIMER1_CNTL = 0;
        ce->event_handler(ce);
        return IRQ_HANDLED;
@@ -96,11 +115,28 @@ static struct irqaction footbridge_timer_irq = {
 void __init footbridge_timer_init(void)
 {
        struct clock_event_device *ce = &ckevt_dc21285;
+        unsigned rate = DIV_ROUND_CLOSEST(mem_fclk_21285, 16);
-        clocksource_register_hz(&cksrc_dc21285, (mem_fclk_21285 + 8) / 16);
+        clocksource_register_hz(&cksrc_dc21285, rate);
        setup_irq(ce->irq, &footbridge_timer_irq);
        ce->cpumask = cpumask_of(smp_processor_id());
-        clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
+        clockevents_config_and_register(ce, rate, 0x4, 0xffffff);
+}
+static u32 notrace footbridge_read_sched_clock(void)
+{
+        return ~*CSR_TIMER3_VALUE;
+}
+void __init footbridge_sched_clock(void)
+{
+        unsigned rate = DIV_ROUND_CLOSEST(mem_fclk_21285, 16);
+        *CSR_TIMER3_LOAD = 0;
+        *CSR_TIMER3_CLR = 0;
+        *CSR_TIMER3_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16;
+        setup_sched_clock(footbridge_read_sched_clock, 24, rate);
 }
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3490a24f969e..7c2fdae9a38b 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,7 +18,6 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
-#include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
@@ -291,7 +290,6 @@ void __init dc21285_preinit(void)
        int cfn_mode;
        pcibios_min_mem = 0x81000000;
-        vga_base = PCIMEM_BASE;
        mem_size = (unsigned int)high_memory - PAGE_OFFSET;
        for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b08243500e2e..aee8300f3490 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -4,6 +4,7 @@
 * EBSA285 machine fixup
 */
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/spinlock.h>
 #include <linux/slab.h>
 #include <linux/leds.h>
@@ -17,6 +18,11 @@
 /* LEDs */
 #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
+#define XBUS_AMBER_L    BIT(0)
+#define XBUS_GREEN_L    BIT(1)
+#define XBUS_RED_L      BIT(2)
+#define XBUS_TOGGLE     BIT(7)
 struct ebsa285_led {
        struct led_classdev     cdev;
        u8                      mask;
@@ -30,21 +36,25 @@ static const struct {
        const char *name;
        const char *trigger;
 } ebsa285_leds[] = {
-        { "ebsa285:amber", "heartbeat", },
+        { "ebsa285:amber", "cpu0", },
-        { "ebsa285:green", "cpu0", },
+        { "ebsa285:green", "heartbeat", },
        { "ebsa285:red",},
 };
+static unsigned char hw_led_state;
+static void __iomem *xbus;
 static void ebsa285_led_set(struct led_classdev *cdev,
                enum led_brightness b)
 {
        struct ebsa285_led *led = container_of(cdev,
                        struct ebsa285_led, cdev);
-        if (b != LED_OFF)
+        if (b == LED_OFF)
-                *XBUS_LEDS |= led->mask;
+                hw_led_state |= led->mask;
        else
-                *XBUS_LEDS &= ~led->mask;
+                hw_led_state &= ~led->mask;
+        writeb(hw_led_state, xbus);
 }
 static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
@@ -52,18 +62,23 @@ static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
        struct ebsa285_led *led = container_of(cdev,
                        struct ebsa285_led, cdev);
-        return (*XBUS_LEDS & led->mask) ? LED_FULL : LED_OFF;
+        return hw_led_state & led->mask ? LED_OFF : LED_FULL;
 }
 static int __init ebsa285_leds_init(void)
 {
        int i;
-        if (machine_is_ebsa285())
+        if (!machine_is_ebsa285())
                return -ENODEV;
-        /* 3 LEDS All ON */
+        xbus = ioremap(XBUS_CS2, SZ_4K);
-        *XBUS_LEDS |= XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
+        if (!xbus)
+                return -ENOMEM;
+        /* 3 LEDS all off */
+        hw_led_state = XBUS_AMBER_L | XBUS_GREEN_L | XBUS_RED_L;
+        writeb(hw_led_state, xbus);
        for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) {
                struct ebsa285_led *led;
@@ -100,6 +115,7 @@ MACHINE_START(EBSA285, "EBSA285")
        .video_start    = 0x000a0000,
        .video_end      = 0x000bffff,
        .map_io         = footbridge_map_io,
+        .init_early     = footbridge_sched_clock,
        .init_irq       = footbridge_init_irq,
        .init_time      = footbridge_timer_init,
        .restart        = footbridge_restart,
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index e3d6ccac2162..02f6d7a706b1 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -51,11 +51,7 @@
 #define PCIMEM_SIZE             0x01000000
 #define PCIMEM_BASE             MMU_IO(0xf0000000, 0x80000000)
-#define XBUS_LEDS               ((volatile unsigned char *)(XBUS_BASE + 0x12000))
+#define XBUS_CS2                0x40012000
-#define XBUS_LED_AMBER          (1 << 0)
-#define XBUS_LED_GREEN          (1 << 1)
-#define XBUS_LED_RED            (1 << 2)
-#define XBUS_LED_TOGGLE         (1 << 8)
 #define XBUS_SWITCH             ((volatile unsigned char *)(XBUS_BASE + 0x12000))
 #define XBUS_SWITCH_SWITCH      ((*XBUS_SWITCH) & 15)
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b3d7e5634b83..c7de89b263dd 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -17,12 +17,15 @@
 #include <linux/clkdev.h>
 #include <linux/clocksource.h>
 #include <linux/dma-mapping.h>
+#include <linux/input.h>
 #include <linux/io.h>
 #include <linux/irqchip.h>
+#include <linux/mailbox.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
+#include <linux/reboot.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
@@ -50,6 +53,7 @@ static void __init highbank_scu_map_io(void)
 static void highbank_l2x0_disable(void)
 {
+        outer_flush_all();
        /* Disable PL310 L2 Cache controller */
        highbank_smc1(0x102, 0x0);
 }
@@ -130,6 +134,24 @@ static struct platform_device highbank_cpuidle_device = {
        .name = "cpuidle-calxeda",
 };
+static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
+{
+        u32 key = *(u32 *)data;
+        if (event != 0x1000)
+                return 0;
+        if (key == KEY_POWER)
+                orderly_poweroff(false);
+        else if (key == 0xffff)
+                ctrl_alt_del();
+        return 0;
+}
+static struct notifier_block hb_keys_nb = {
+        .notifier_call = hb_keys_notifier,
+};
 static void __init highbank_init(void)
 {
        struct device_node *np;
@@ -145,6 +167,8 @@ static void __init highbank_init(void)
        bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
        bus_register_notifier(&amba_bustype, &highbank_amba_nb);
+        pl320_ipc_register_notifier(&hb_keys_nb);
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
        if (psci_ops.cpu_suspend)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 7a6e6f710068..fae0578fec7e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -3,7 +3,6 @@ config ARCH_MXC
        select ARCH_REQUIRE_GPIOLIB
        select ARM_CPU_SUSPEND if PM
        select ARM_PATCH_PHYS_VIRT
-        select AUTO_ZRELADDR if !ZBOOT_ROM
        select CLKSRC_MMIO
        select COMMON_CLK
        select GENERIC_ALLOCATOR
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 19f1652e94cf..8d972ff18c56 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -131,6 +131,24 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
        .dt_compat      = omap3_gp_boards_compat,
        .restart        = omap3xxx_restart,
 MACHINE_END
+static const char *am3517_boards_compat[] __initdata = {
+        "ti,am3517",
+        NULL,
+};
+DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = am35xx_init_early,
+        .init_irq       = omap_intc_of_init,
+        .handle_irq     = omap3_intc_handle_irq,
+        .init_machine   = omap_generic_init,
+        .init_late      = omap3_init_late,
+        .init_time      = omap3_gptimer_timer_init,
+        .dt_compat      = am3517_boards_compat,
+        .restart        = omap3xxx_restart,
+MACHINE_END
 #endif
 #ifdef CONFIG_SOC_AM33XX
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 4ec8d82b0492..44a59c3abfb0 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -242,12 +242,18 @@ static void __init ldp_display_init(void)
 static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
 {
+        int res;
        /* LCD enable GPIO */
        ldp_lcd_pdata.enable_gpio = gpio + 7;
        /* Backlight enable GPIO */
        ldp_lcd_pdata.backlight_gpio = gpio + 15;
+        res = platform_device_register(&ldp_lcd_device);
+        if (res)
+                pr_err("Unable to register LCD: %d\n", res);
        return 0;
 }
@@ -346,7 +352,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
 static struct platform_device *ldp_devices[] __initdata = {
        &ldp_gpio_keys_device,
-        &ldp_lcd_device,
 };
 #ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 58347bb874a0..4cf165502b35 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -101,13 +101,51 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = {
        { "dss_hdmi", "omapdss_hdmi", -1 },
 };
+static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
+{
+        u32 enable_mask, enable_shift;
+        u32 pipd_mask, pipd_shift;
+        u32 reg;
+        if (dsi_id == 0) {
+                enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
+                enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
+                pipd_mask = OMAP4_DSI1_PIPD_MASK;
+                pipd_shift = OMAP4_DSI1_PIPD_SHIFT;
+        } else if (dsi_id == 1) {
+                enable_mask = OMAP4_DSI2_LANEENABLE_MASK;
+                enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
+                pipd_mask = OMAP4_DSI2_PIPD_MASK;
+                pipd_shift = OMAP4_DSI2_PIPD_SHIFT;
+        } else {
+                return -ENODEV;
+        }
+        reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
+        reg &= ~enable_mask;
+        reg &= ~pipd_mask;
+        reg |= (lanes << enable_shift) & enable_mask;
+        reg |= (lanes << pipd_shift) & pipd_mask;
+        omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
+        return 0;
+}
 static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
 {
+        if (cpu_is_omap44xx())
+                return omap4_dsi_mux_pads(dsi_id, lane_mask);
        return 0;
 }
 static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
 {
+        if (cpu_is_omap44xx())
+                omap4_dsi_mux_pads(dsi_id, 0);
 }
 static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 365bfd3d9c68..dadccc91488c 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -223,7 +223,7 @@ void __init omap_4430sdp_display_init_of(void)
 static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
        .name                   = "dvi",
        .source                 = "tfp410.0",
-        .i2c_bus_num            = 3,
+        .i2c_bus_num            = 2,
 };
 static struct platform_device omap3_igep2_dvi_connector_device = {
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index cd22262a2cc0..07b68d5a7940 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -244,7 +244,7 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
                .virtual        = OMAP4_SRAM_VA,
                .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
                .length         = PAGE_SIZE,
-                .type           = MT_MEMORY_SO,
+                .type           = MT_MEMORY_RW_SO,
        },
 #endif
@@ -282,7 +282,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
                .virtual        = OMAP4_SRAM_VA,
                .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
                .length         = PAGE_SIZE,
-                .type           = MT_MEMORY_SO,
+                .type           = MT_MEMORY_RW_SO,
        },
 #endif
 };
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index b39efd46abf9..dd893ec4c8f2 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -87,7 +87,7 @@ void __init omap_barriers_init(void)
        dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
        dram_io_desc[0].pfn = __phys_to_pfn(paddr);
        dram_io_desc[0].length = size;
-        dram_io_desc[0].type = MT_MEMORY_SO;
+        dram_io_desc[0].type = MT_MEMORY_RW_SO;
        iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
        dram_sync = (void __iomem *) dram_io_desc[0].virtual;
        sram_sync = (void __iomem *) OMAP4_SRAM_VA;
@@ -162,6 +162,7 @@ void __iomem *omap4_get_l2cache_base(void)
 static void omap4_l2x0_disable(void)
 {
+        outer_flush_all();
        /* Disable PL310 L2 Cache controller */
        omap_smc1(0x102, 0x0);
 }
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 53f0735817bb..e0a398cf28d8 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -183,6 +183,10 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
 odbfd_exit1:
        kfree(hwmods);
 odbfd_exit:
+        /* if data/we are at fault.. load up a fail handler */
+        if (ret)
+                pdev->dev.pm_domain = &omap_device_fail_pm_domain;
        return ret;
 }
@@ -604,6 +608,19 @@ static int _od_runtime_resume(struct device *dev)
        return pm_generic_runtime_resume(dev);
 }
+static int _od_fail_runtime_suspend(struct device *dev)
+{
+        dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
+        return -ENODEV;
+}
+static int _od_fail_runtime_resume(struct device *dev)
+{
+        dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
+        return -ENODEV;
+}
 #endif
 #ifdef CONFIG_SUSPEND
@@ -657,6 +674,13 @@ static int _od_resume_noirq(struct device *dev)
 #define _od_resume_noirq NULL
 #endif
+struct dev_pm_domain omap_device_fail_pm_domain = {
+        .ops = {
+                SET_RUNTIME_PM_OPS(_od_fail_runtime_suspend,
+                                   _od_fail_runtime_resume, NULL)
+        }
+};
 struct dev_pm_domain omap_device_pm_domain = {
        .ops = {
                SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 17ca1aec2710..78c02b355179 100644
--- a/arch/arm/mach-omap2/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -29,6 +29,7 @@
 #include "omap_hwmod.h"
 extern struct dev_pm_domain omap_device_pm_domain;
+extern struct dev_pm_domain omap_device_fail_pm_domain;
 /* omap_device._state values */
 #define OMAP_DEVICE_STATE_UNKNOWN       0
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e3f0ecaf87dd..8a1b5e0bad40 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -399,7 +399,7 @@ static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
 }
 /**
- * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
 * @oh: struct omap_hwmod *
 * @v: pointer to register contents to modify
 *
@@ -427,6 +427,36 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
 }
 /**
+ * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
+ * @oh: struct omap_hwmod *
+ * @v: pointer to register contents to modify
+ *
+ * Clear the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
+{
+        u32 softrst_mask;
+        if (!oh->class->sysc ||
+            !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
+                return -EINVAL;
+        if (!oh->class->sysc->sysc_fields) {
+                WARN(1,
+                     "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
+                     oh->name);
+                return -EINVAL;
+        }
+        softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
+        *v &= ~softrst_mask;
+        return 0;
+}
+/**
 * _wait_softreset_complete - wait for an OCP softreset to complete
 * @oh: struct omap_hwmod * to wait on
 *
@@ -785,6 +815,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
                        pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
                                   oh->name, os->clk);
                        ret = -EINVAL;
+                        continue;
                }
                os->_clk = c;
                /*
@@ -821,6 +852,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
                        pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
                                   oh->name, oc->clk);
                        ret = -EINVAL;
+                        continue;
                }
                oc->_clk = c;
                /*
@@ -1911,6 +1943,12 @@ static int _ocp_softreset(struct omap_hwmod *oh)
        ret = _set_softreset(oh, &v);
        if (ret)
                goto dis_opt_clks;
+        _write_sysconfig(v, oh);
+        ret = _clear_softreset(oh, &v);
+        if (ret)
+                goto dis_opt_clks;
        _write_sysconfig(v, oh);
        if (oh->class->sysc->srst_udelay)
@@ -2326,38 +2364,80 @@ static int _shutdown(struct omap_hwmod *oh)
        return 0;
 }
+static int of_dev_find_hwmod(struct device_node *np,
+                             struct omap_hwmod *oh)
+{
+        int count, i, res;
+        const char *p;
+        count = of_property_count_strings(np, "ti,hwmods");
+        if (count < 1)
+                return -ENODEV;
+        for (i = 0; i < count; i++) {
+                res = of_property_read_string_index(np, "ti,hwmods",
+                                                    i, &p);
+                if (res)
+                        continue;
+                if (!strcmp(p, oh->name)) {
+                        pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
+                                 np->name, i, oh->name);
+                        return i;
+                }
+        }
+        return -ENODEV;
+}
 /**
 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
 * @np: struct device_node *
 * @oh: struct omap_hwmod *
+ * @index: index of the entry found
+ * @found: struct device_node * found or NULL
 *
 * Parse the dt blob and find out needed hwmod. Recursive function is
 * implemented to take care hierarchical dt blob parsing.
- * Return: The device node on success or NULL on failure.
+ * Return: Returns 0 on success, -ENODEV when not found.
 */
-static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
+static int of_dev_hwmod_lookup(struct device_node *np,
-                                                struct omap_hwmod *oh)
+                               struct omap_hwmod *oh,
+                               int *index,
+                               struct device_node **found)
 {
-        struct device_node *np0 = NULL, *np1 = NULL;
+        struct device_node *np0 = NULL;
-        const char *p;
+        int res;
+        res = of_dev_find_hwmod(np, oh);
+        if (res >= 0) {
+                *found = np;
+                *index = res;
+                return 0;
+        }
        for_each_child_of_node(np, np0) {
-                if (of_find_property(np0, "ti,hwmods", NULL)) {
+                struct device_node *fc;
-                        p = of_get_property(np0, "ti,hwmods", NULL);
+                int i;
-                        if (!strcmp(p, oh->name))
-                                return np0;
+                res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
-                        np1 = of_dev_hwmod_lookup(np0, oh);
+                if (res == 0) {
-                        if (np1)
+                        *found = fc;
-                                return np1;
+                        *index = i;
+                        return 0;
                }
        }
-        return NULL;
+        *found = NULL;
+        *index = 0;
+        return -ENODEV;
 }
 /**
 * _init_mpu_rt_base - populate the virtual address for a hwmod
 * @oh: struct omap_hwmod * to locate the virtual address
 * @data: (unused, caller should pass NULL)
+ * @index: index of the reg entry iospace in device tree
 * @np: struct device_node * of the IP block's device node in the DT data
 *
 * Cache the virtual address used by the MPU to access this IP block's
@@ -2368,7 +2448,7 @@ static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
 * -ENXIO on absent or invalid register target address space.
 */
 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
-                                    struct device_node *np)
+                                    int index, struct device_node *np)
 {
        struct omap_hwmod_addr_space *mem;
        void __iomem *va_start = NULL;
@@ -2390,13 +2470,17 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
                if (!np)
                        return -ENXIO;
-                va_start = of_iomap(np, oh->mpu_rt_idx);
+                va_start = of_iomap(np, index + oh->mpu_rt_idx);
        } else {
                va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
        }
        if (!va_start) {
-                pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+                if (mem)
+                        pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+                else
+                        pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
+                               oh->name, index, np->full_name);
                return -ENXIO;
        }
@@ -2422,17 +2506,29 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
 */
 static int __init _init(struct omap_hwmod *oh, void *data)
 {
-        int r;
+        int r, index;
        struct device_node *np = NULL;
        if (oh->_state != _HWMOD_STATE_REGISTERED)
                return 0;
-        if (of_have_populated_dt())
+        if (of_have_populated_dt()) {
-                np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh);
+                struct device_node *bus;
+                bus = of_find_node_by_name(NULL, "ocp");
+                if (!bus)
+                        return -ENODEV;
+                r = of_dev_hwmod_lookup(bus, oh, &index, &np);
+                if (r)
+                        pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
+                else if (np && index)
+                        pr_warn("omap_hwmod: %s using broken dt data from %s\n",
+                                oh->name, np->name);
+        }
        if (oh->class->sysc) {
-                r = _init_mpu_rt_base(oh, NULL, np);
+                r = _init_mpu_rt_base(oh, NULL, index, np);
                if (r < 0) {
                        WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
                             oh->name);
@@ -3169,6 +3265,11 @@ int omap_hwmod_softreset(struct omap_hwmod *oh)
                goto error;
        _write_sysconfig(v, oh);
+        ret = _clear_softreset(oh, &v);
+        if (ret)
+                goto error;
+        _write_sysconfig(v, oh);
 error:
        return ret;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 56cebb05509e..d23c77fadb31 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -796,7 +796,7 @@ struct omap_hwmod omap2xxx_counter_32k_hwmod = {
 /* gpmc */
 static struct omap_hwmod_irq_info omap2xxx_gpmc_irqs[] = {
-        { .irq = 20 },
+        { .irq = 20 + OMAP_INTC_START, },
        { .irq = -1 }
 };
@@ -841,7 +841,7 @@ static struct omap_hwmod_class omap2_rng_hwmod_class = {
 };
 static struct omap_hwmod_irq_info omap2_rng_mpu_irqs[] = {
-        { .irq = 52 },
+        { .irq = 52 + OMAP_INTC_START, },
        { .irq = -1 }
 };
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 9e56fabd7fa3..4c3b1e6df508 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1943,7 +1943,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
        .syss_offs      = 0x0014,
        .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
                           SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
        .sysc_fields    = &omap_hwmod_sysc_type1,
@@ -2021,15 +2022,7 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
         * hence HWMOD_SWSUP_MSTANDBY
         */
-        /*
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
 };
 /*
@@ -2172,7 +2165,7 @@ static struct omap_hwmod_class omap3xxx_gpmc_hwmod_class = {
 };
 static struct omap_hwmod_irq_info omap3xxx_gpmc_irqs[] = {
-        { .irq = 20 },
+        { .irq = 20 + OMAP_INTC_START, },
        { .irq = -1 }
 };
@@ -3006,7 +2999,7 @@ static struct omap_mmu_dev_attr mmu_isp_dev_attr = {
 static struct omap_hwmod omap3xxx_mmu_isp_hwmod;
 static struct omap_hwmod_irq_info omap3xxx_mmu_isp_irqs[] = {
-        { .irq = 24 },
+        { .irq = 24 + OMAP_INTC_START, },
        { .irq = -1 }
 };
@@ -3048,7 +3041,7 @@ static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
 static struct omap_hwmod omap3xxx_mmu_iva_hwmod;
 static struct omap_hwmod_irq_info omap3xxx_mmu_iva_irqs[] = {
-        { .irq = 28 },
+        { .irq = 28 + OMAP_INTC_START, },
        { .irq = -1 }
 };
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1e5b12cb8246..3318cae96e7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2937,7 +2937,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
        .sysc_offs      = 0x0010,
        .syss_offs      = 0x0014,
        .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_SOFTRESET),
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                           SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -3001,15 +3001,7 @@ static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
         * hence HWMOD_SWSUP_MSTANDBY
         */
-        /*
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
 };
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 9e08d6994a0b..e297d6231c3a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1544,7 +1544,8 @@ static struct omap_hwmod_class_sysconfig omap54xx_usb_host_hs_sysc = {
        .rev_offs       = 0x0000,
        .sysc_offs      = 0x0010,
        .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
-                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                           SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -1598,15 +1599,7 @@ static struct omap_hwmod omap54xx_usb_host_hs_hwmod = {
         * hence HWMOD_SWSUP_MSTANDBY
         */
-        /*
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
        .main_clk       = "l3init_60m_fclk",
        .prcm = {
                .omap4 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index db32d5380b11..18f333c440db 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1637,7 +1637,7 @@ static struct omap_hwmod dra7xx_uart1_hwmod = {
        .class          = &dra7xx_uart_hwmod_class,
        .clkdm_name     = "l4per_clkdm",
        .main_clk       = "uart1_gfclk_mux",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = HWMOD_SWSUP_SIDLE_ACT | DEBUG_OMAP2UART1_FLAGS,
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = DRA7XX_CM_L4PER_UART1_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 10c71450cf63..39f020c982e8 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -139,6 +139,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
 static struct pdata_init pdata_quirks[] __initdata = {
 #ifdef CONFIG_ARCH_OMAP3
+        { "nokia,omap3-n900", hsmmc2_internal_input_clk, },
        { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
        { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
        { "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e233dfcbc186..93a2a6e4260f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -128,7 +128,8 @@ skip_voltdm:
        for (i = 0; i < pwrdm->banks; i++)
                pwrdm->ret_mem_off_counter[i] = 0;
-        arch_pwrdm->pwrdm_wait_transition(pwrdm);
+        if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
+                arch_pwrdm->pwrdm_wait_transition(pwrdm);
        pwrdm->state = pwrdm_read_pwrst(pwrdm);
        pwrdm->state_counter[pwrdm->state] = 1;
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h
index 2a086e8373eb..958cd6af9384 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -10,6 +10,8 @@
 * published by the Free Software Foundation.
 */
+#include <mach/irqs.h>
 #define LUBBOCK_ETH_PHYS        PXA_CS3_PHYS
 #define LUBBOCK_FPGA_PHYS       PXA_CS2_PHYS
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 0d5dd646f61f..263b15249b5b 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -13,6 +13,7 @@
 #include <mach/regs-ost.h>
 #include <mach/reset.h>
+#include <mach/smemc.h>
 unsigned int reset_status;
 EXPORT_SYMBOL(reset_status);
@@ -81,6 +82,12 @@ static void do_hw_reset(void)
        writel_relaxed(OSSR_M3, OSSR);
        /* ... in 100 ms */
        writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
+        /*
+         * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
+         * we put SDRAM into self-refresh to prevent that
+         */
+        while (1)
+                writel_relaxed(MDREFR_SLFRSH, MDREFR);
 }
 void pxa_restart(enum reboot_mode mode, const char *cmd)
@@ -104,4 +111,3 @@ void pxa_restart(enum reboot_mode mode, const char *cmd)
                break;
        }
 }
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0206b915a6f6..ef5557b807ed 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -425,57 +425,57 @@ static struct platform_device tosa_power_device = {
 * Tosa Keyboard
 */
 static const uint32_t tosakbd_keymap[] = {
-        KEY(0, 2, KEY_W),
+        KEY(0, 1, KEY_W),
-        KEY(0, 6, KEY_K),
+        KEY(0, 5, KEY_K),
-        KEY(0, 7, KEY_BACKSPACE),
+        KEY(0, 6, KEY_BACKSPACE),
-        KEY(0, 8, KEY_P),
+        KEY(0, 7, KEY_P),
-        KEY(1, 1, KEY_Q),
+        KEY(1, 0, KEY_Q),
-        KEY(1, 2, KEY_E),
+        KEY(1, 1, KEY_E),
-        KEY(1, 3, KEY_T),
+        KEY(1, 2, KEY_T),
-        KEY(1, 4, KEY_Y),
+        KEY(1, 3, KEY_Y),
-        KEY(1, 6, KEY_O),
+        KEY(1, 5, KEY_O),
-        KEY(1, 7, KEY_I),
+        KEY(1, 6, KEY_I),
-        KEY(1, 8, KEY_COMMA),
+        KEY(1, 7, KEY_COMMA),
-        KEY(2, 1, KEY_A),
+        KEY(2, 0, KEY_A),
-        KEY(2, 2, KEY_D),
+        KEY(2, 1, KEY_D),
-        KEY(2, 3, KEY_G),
+        KEY(2, 2, KEY_G),
-        KEY(2, 4, KEY_U),
+        KEY(2, 3, KEY_U),
-        KEY(2, 6, KEY_L),
+        KEY(2, 5, KEY_L),
-        KEY(2, 7, KEY_ENTER),
+        KEY(2, 6, KEY_ENTER),
-        KEY(2, 8, KEY_DOT),
+        KEY(2, 7, KEY_DOT),
-        KEY(3, 1, KEY_Z),
+        KEY(3, 0, KEY_Z),
-        KEY(3, 2, KEY_C),
+        KEY(3, 1, KEY_C),
-        KEY(3, 3, KEY_V),
+        KEY(3, 2, KEY_V),
-        KEY(3, 4, KEY_J),
+        KEY(3, 3, KEY_J),
-        KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
+        KEY(3, 4, TOSA_KEY_ADDRESSBOOK),
-        KEY(3, 6, TOSA_KEY_CANCEL),
+        KEY(3, 5, TOSA_KEY_CANCEL),
-        KEY(3, 7, TOSA_KEY_CENTER),
+        KEY(3, 6, TOSA_KEY_CENTER),
-        KEY(3, 8, TOSA_KEY_OK),
+        KEY(3, 7, TOSA_KEY_OK),
-        KEY(3, 9, KEY_LEFTSHIFT),
+        KEY(3, 8, KEY_LEFTSHIFT),
-        KEY(4, 1, KEY_S),
+        KEY(4, 0, KEY_S),
-        KEY(4, 2, KEY_R),
+        KEY(4, 1, KEY_R),
-        KEY(4, 3, KEY_B),
+        KEY(4, 2, KEY_B),
-        KEY(4, 4, KEY_N),
+        KEY(4, 3, KEY_N),
-        KEY(4, 5, TOSA_KEY_CALENDAR),
+        KEY(4, 4, TOSA_KEY_CALENDAR),
-        KEY(4, 6, TOSA_KEY_HOMEPAGE),
+        KEY(4, 5, TOSA_KEY_HOMEPAGE),
-        KEY(4, 7, KEY_LEFTCTRL),
+        KEY(4, 6, KEY_LEFTCTRL),
-        KEY(4, 8, TOSA_KEY_LIGHT),
+        KEY(4, 7, TOSA_KEY_LIGHT),
-        KEY(4, 10, KEY_RIGHTSHIFT),
+        KEY(4, 9, KEY_RIGHTSHIFT),
-        KEY(5, 1, KEY_TAB),
+        KEY(5, 0, KEY_TAB),
-        KEY(5, 2, KEY_SLASH),
+        KEY(5, 1, KEY_SLASH),
-        KEY(5, 3, KEY_H),
+        KEY(5, 2, KEY_H),
-        KEY(5, 4, KEY_M),
+        KEY(5, 3, KEY_M),
-        KEY(5, 5, TOSA_KEY_MENU),
+        KEY(5, 4, TOSA_KEY_MENU),
-        KEY(5, 7, KEY_UP),
+        KEY(5, 6, KEY_UP),
-        KEY(5, 11, TOSA_KEY_FN),
+        KEY(5, 10, TOSA_KEY_FN),
-        KEY(6, 1, KEY_X),
+        KEY(6, 0, KEY_X),
-        KEY(6, 2, KEY_F),
+        KEY(6, 1, KEY_F),
-        KEY(6, 3, KEY_SPACE),
+        KEY(6, 2, KEY_SPACE),
-        KEY(6, 4, KEY_APOSTROPHE),
+        KEY(6, 3, KEY_APOSTROPHE),
-        KEY(6, 5, TOSA_KEY_MAIL),
+        KEY(6, 4, TOSA_KEY_MAIL),
-        KEY(6, 6, KEY_LEFT),
+        KEY(6, 5, KEY_LEFT),
-        KEY(6, 7, KEY_DOWN),
+        KEY(6, 6, KEY_DOWN),
-        KEY(6, 8, KEY_RIGHT),
+        KEY(6, 7, KEY_RIGHT),
 };
 static struct matrix_keymap_data tosakbd_keymap_data = {
diff --git a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c b/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
index 7eb9a10fc1af..2fddf38192df 100644
--- a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
+++ b/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
@@ -8,8 +8,6 @@
 * published by the Free Software Foundation.
 */
-#include <linux/clk-provider.h>
-#include <linux/irqchip.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -48,15 +46,9 @@ static void __init s3c64xx_dt_map_io(void)
                panic("SoC is not S3C64xx!");
 }
-static void __init s3c64xx_dt_init_irq(void)
-{
-        of_clk_init(NULL);
-        samsung_wdt_reset_of_init();
-        irqchip_init();
-};
 static void __init s3c64xx_dt_init_machine(void)
 {
+        samsung_wdt_reset_of_init();
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
@@ -79,7 +71,6 @@ DT_MACHINE_START(S3C6400_DT, "Samsung S3C64xx (Flattened Device Tree)")
        /* Maintainer: Tomasz Figa <tomasz.figa@gmail.com> */
        .dt_compat      = s3c64xx_dt_compat,
        .map_io         = s3c64xx_dt_map_io,
-        .init_irq       = s3c64xx_dt_init_irq,
        .init_machine   = s3c64xx_dt_init_machine,
        .restart        = s3c64xx_dt_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index c9808c684152..8443a27bca2f 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -75,12 +75,143 @@ void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
 EXPORT_SYMBOL(ASSABET_BCR_frob);
+/*
+ * The codec reset goes to three devices, so we need to release
+ * the rest when any one of these requests it.  However, that
+ * causes the ADV7171 to consume around 100mA - more than half
+ * the LCD-blanked power.
+ *
+ * With the ADV7171, LCD and backlight enabled, we go over
+ * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
+ * is connected, the Assabet crashes.
+ */
+#define RST_UCB1X00 (1 << 0)
+#define RST_UDA1341 (1 << 1)
+#define RST_ADV7171 (1 << 2)
+#define SDA GPIO_GPIO(15)
+#define SCK GPIO_GPIO(18)
+#define MOD GPIO_GPIO(17)
+static void adv7171_start(void)
+{
+        GPSR = SCK;
+        udelay(1);
+        GPSR = SDA;
+        udelay(2);
+        GPCR = SDA;
+}
+static void adv7171_stop(void)
+{
+        GPSR = SCK;
+        udelay(2);
+        GPSR = SDA;
+        udelay(1);
+}
+static void adv7171_send(unsigned byte)
+{
+        unsigned i;
+        for (i = 0; i < 8; i++, byte <<= 1) {
+                GPCR = SCK;
+                udelay(1);
+                if (byte & 0x80)
+                        GPSR = SDA;
+                else
+                        GPCR = SDA;
+                udelay(1);
+                GPSR = SCK;
+                udelay(1);
+        }
+        GPCR = SCK;
+        udelay(1);
+        GPSR = SDA;
+        udelay(1);
+        GPDR &= ~SDA;
+        GPSR = SCK;
+        udelay(1);
+        if (GPLR & SDA)
+                printk(KERN_WARNING "No ACK from ADV7171\n");
+        udelay(1);
+        GPCR = SCK | SDA;
+        udelay(1);
+        GPDR |= SDA;
+        udelay(1);
+}
+static void adv7171_write(unsigned reg, unsigned val)
+{
+        unsigned gpdr = GPDR;
+        unsigned gplr = GPLR;
+        ASSABET_BCR = BCR_value | ASSABET_BCR_AUDIO_ON;
+        udelay(100);
+        GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
+        GPDR = (GPDR | SCK | MOD) & ~SDA;
+        udelay(10);
+        if (!(GPLR & SDA))
+                printk(KERN_WARNING "Something dragging SDA down?\n");
+        GPDR |= SDA;
+        adv7171_start();
+        adv7171_send(0x54);
+        adv7171_send(reg);
+        adv7171_send(val);
+        adv7171_stop();
+        /* Restore GPIO state for L3 bus */
+        GPSR = gplr & (SDA | SCK | MOD);
+        GPCR = (~gplr) & (SDA | SCK | MOD);
+        GPDR = gpdr;
+}
+static void adv7171_sleep(void)
+{
+        /* Put the ADV7171 into sleep mode */
+        adv7171_write(0x04, 0x40);
+}
+static unsigned codec_nreset;
+static void assabet_codec_reset(unsigned mask, int set)
+{
+        unsigned long flags;
+        bool old;
+        local_irq_save(flags);
+        old = !codec_nreset;
+        if (set)
+                codec_nreset &= ~mask;
+        else
+                codec_nreset |= mask;
+        if (old != !codec_nreset) {
+                if (codec_nreset) {
+                        ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
+                        adv7171_sleep();
+                } else {
+                        ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
+                }
+        }
+        local_irq_restore(flags);
+}
 static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
 {
-        if (state == UCB_RST_PROBE)
+        int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
-                ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
+                state == UCB_RST_PROBE_FAIL;
+        assabet_codec_reset(RST_UCB1X00, set);
 }
+void assabet_uda1341_reset(int set)
+{
+        assabet_codec_reset(RST_UDA1341, set);
+}
+EXPORT_SYMBOL(assabet_uda1341_reset);
 /*
 * Assabet flash support code.
@@ -155,12 +286,9 @@ static int assabet_irda_set_power(struct device *dev, unsigned int state)
                0
        };
-        if (state < 4) {
+        if (state < 4)
-                state = bcr_state[state];
+                ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
-                ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
+                                 bcr_state[state]);
-                                           ASSABET_BCR_IRDA_MD0));
-                ASSABET_BCR_set(state);
-        }
        return 0;
 }
@@ -180,6 +308,7 @@ static struct irda_platform_data assabet_irda_data = {
 static struct ucb1x00_plat_data assabet_ucb1x00_data = {
        .reset          = assabet_ucb1x00_reset,
        .gpio_base      = -1,
+        .can_wakeup     = 1,
 };
 static struct mcp_plat_data assabet_mcp_data = {
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 7fb96ebdc0fb..831a15824ec8 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -27,6 +27,8 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/timer.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
 #include <linux/gpio.h>
 #include <linux/pda_power.h>
@@ -242,10 +244,43 @@ struct platform_device collie_locomo_device = {
        .resource       = locomo_resources,
 };
+static struct gpio_keys_button collie_gpio_keys[] = {
+        {
+                .type   = EV_PWR,
+                .code   = KEY_RESERVED,
+                .gpio   = COLLIE_GPIO_ON_KEY,
+                .desc   = "On key",
+                .wakeup = 1,
+                .active_low = 1,
+        },
+        {
+                .type   = EV_PWR,
+                .code   = KEY_WAKEUP,
+                .gpio   = COLLIE_GPIO_WAKEUP,
+                .desc   = "Sync",
+                .wakeup = 1,
+                .active_low = 1,
+        },
+};
+static struct gpio_keys_platform_data collie_gpio_keys_data = {
+        .buttons        = collie_gpio_keys,
+        .nbuttons       = ARRAY_SIZE(collie_gpio_keys),
+};
+static struct platform_device collie_gpio_keys_device = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &collie_gpio_keys_data,
+        },
+};
 static struct platform_device *devices[] __initdata = {
        &collie_locomo_device,
        &colliescoop_device,
        &collie_power_device,
+        &collie_gpio_keys_device,
 };
 static struct mtd_partition collie_partitions[] = {
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index b8f2b151539b..daa27c474c13 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -28,15 +28,35 @@
 /*
 * helper for sa1100fb
 */
+static struct gpio h3100_lcd_gpio[] = {
+        { H3100_GPIO_LCD_3V_ON, GPIOF_OUT_INIT_LOW, "LCD 3V" },
+        { H3XXX_EGPIO_LCD_ON, GPIOF_OUT_INIT_LOW, "LCD ON" },
+};
+static bool h3100_lcd_request(void)
+{
+        static bool h3100_lcd_ok;
+        int rc;
+        if (h3100_lcd_ok)
+                return true;
+        rc = gpio_request_array(h3100_lcd_gpio, ARRAY_SIZE(h3100_lcd_gpio));
+        if (rc)
+                pr_err("%s: can't request GPIOs\n", __func__);
+        else
+                h3100_lcd_ok = true;
+        return h3100_lcd_ok;
+}
 static void h3100_lcd_power(int enable)
 {
-        if (!gpio_request(H3XXX_EGPIO_LCD_ON, "LCD ON")) {
+        if (!h3100_lcd_request())
-                gpio_set_value(H3100_GPIO_LCD_3V_ON, enable);
+                return;
-                gpio_direction_output(H3XXX_EGPIO_LCD_ON, enable);
-                gpio_free(H3XXX_EGPIO_LCD_ON);
+        gpio_set_value(H3100_GPIO_LCD_3V_ON, enable);
-        } else {
+        gpio_set_value(H3XXX_EGPIO_LCD_ON, enable);
-                pr_err("%s: can't request H3XXX_EGPIO_LCD_ON\n", __func__);
-        }
 }
 static struct sa1100fb_mach_info h3100_lcd_info = {
@@ -69,6 +89,11 @@ static void __init h3100_map_io(void)
 /*
 * This turns the IRDA power on or off on the Compaq H3100
 */
+static struct gpio h3100_irda_gpio[] = {
+        { H3100_GPIO_IR_ON,     GPIOF_OUT_INIT_LOW, "IrDA power" },
+        { H3100_GPIO_IR_FSEL,   GPIOF_OUT_INIT_LOW, "IrDA fsel" },
+};
 static int h3100_irda_set_power(struct device *dev, unsigned int state)
 {
        gpio_set_value(H3100_GPIO_IR_ON, state);
@@ -80,18 +105,27 @@ static void h3100_irda_set_speed(struct device *dev, unsigned int speed)
        gpio_set_value(H3100_GPIO_IR_FSEL, !(speed < 4000000));
 }
+static int h3100_irda_startup(struct device *dev)
+{
+        return gpio_request_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
+}
+static void h3100_irda_shutdown(struct device *dev)
+{
+        return gpio_free_array(h3100_irda_gpio, sizeof(h3100_irda_gpio));
+}
 static struct irda_platform_data h3100_irda_data = {
        .set_power      = h3100_irda_set_power,
        .set_speed      = h3100_irda_set_speed,
+        .startup        = h3100_irda_startup,
+        .shutdown       = h3100_irda_shutdown,
 };
 static struct gpio_default_state h3100_default_gpio[] = {
-        { H3100_GPIO_IR_ON,     GPIO_MODE_OUT0, "IrDA power" },
-        { H3100_GPIO_IR_FSEL,   GPIO_MODE_OUT0, "IrDA fsel" },
        { H3XXX_GPIO_COM_DCD,   GPIO_MODE_IN,   "COM DCD" },
        { H3XXX_GPIO_COM_CTS,   GPIO_MODE_IN,   "COM CTS" },
        { H3XXX_GPIO_COM_RTS,   GPIO_MODE_OUT0, "COM RTS" },
-        { H3100_GPIO_LCD_3V_ON, GPIO_MODE_OUT0, "LCD 3v" },
 };
 static void __init h3100_mach_init(void)
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index b8dc5bd22623..a663e7230141 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -28,35 +28,39 @@
 /*
 * helper for sa1100fb
 */
+static struct gpio h3600_lcd_gpio[] = {
+        { H3XXX_EGPIO_LCD_ON,   GPIOF_OUT_INIT_LOW,     "LCD power" },
+        { H3600_EGPIO_LCD_PCI,  GPIOF_OUT_INIT_LOW,     "LCD control" },
+        { H3600_EGPIO_LCD_5V_ON, GPIOF_OUT_INIT_LOW,    "LCD 5v" },
+        { H3600_EGPIO_LVDD_ON,  GPIOF_OUT_INIT_LOW,     "LCD 9v/-6.5v" },
+};
+static bool h3600_lcd_request(void)
+{
+        static bool h3600_lcd_ok;
+        int rc;
+        if (h3600_lcd_ok)
+                return true;
+        rc = gpio_request_array(h3600_lcd_gpio, ARRAY_SIZE(h3600_lcd_gpio));
+        if (rc)
+                pr_err("%s: can't request GPIOs\n", __func__);
+        else
+                h3600_lcd_ok = true;
+        return h3600_lcd_ok;
+}
 static void h3600_lcd_power(int enable)
 {
-        if (gpio_request(H3XXX_EGPIO_LCD_ON, "LCD power")) {
+        if (!h3600_lcd_request())
-                pr_err("%s: can't request H3XXX_EGPIO_LCD_ON\n", __func__);
+                return;
-                goto err1;
-        }
-        if (gpio_request(H3600_EGPIO_LCD_PCI, "LCD control")) {
-                pr_err("%s: can't request H3XXX_EGPIO_LCD_PCI\n", __func__);
-                goto err2;
-        }
-        if (gpio_request(H3600_EGPIO_LCD_5V_ON, "LCD 5v")) {
-                pr_err("%s: can't request H3XXX_EGPIO_LCD_5V_ON\n", __func__);
-                goto err3;
-        }
-        if (gpio_request(H3600_EGPIO_LVDD_ON, "LCD 9v/-6.5v")) {
-                pr_err("%s: can't request H3600_EGPIO_LVDD_ON\n", __func__);
-                goto err4;
-        }
        gpio_direction_output(H3XXX_EGPIO_LCD_ON, enable);
        gpio_direction_output(H3600_EGPIO_LCD_PCI, enable);
        gpio_direction_output(H3600_EGPIO_LCD_5V_ON, enable);
        gpio_direction_output(H3600_EGPIO_LVDD_ON, enable);
-        gpio_free(H3600_EGPIO_LVDD_ON);
-err4:   gpio_free(H3600_EGPIO_LCD_5V_ON);
-err3:   gpio_free(H3600_EGPIO_LCD_PCI);
-err2:   gpio_free(H3XXX_EGPIO_LCD_ON);
-err1:   return;
 }
 static const struct sa1100fb_rgb h3600_rgb_16 = {
@@ -93,6 +97,11 @@ static void __init h3600_map_io(void)
 /*
 * This turns the IRDA power on or off on the Compaq H3600
 */
+static struct gpio h3600_irda_gpio[] = {
+        { H3600_EGPIO_IR_ON,    GPIOF_OUT_INIT_LOW, "IrDA power" },
+        { H3600_EGPIO_IR_FSEL,  GPIOF_OUT_INIT_LOW, "IrDA fsel" },
+};
 static int h3600_irda_set_power(struct device *dev, unsigned int state)
 {
        gpio_set_value(H3600_EGPIO_IR_ON, state);
@@ -106,29 +115,12 @@ static void h3600_irda_set_speed(struct device *dev, unsigned int speed)
 static int h3600_irda_startup(struct device *dev)
 {
-        int err = gpio_request(H3600_EGPIO_IR_ON, "IrDA power");
+        return gpio_request_array(h3600_irda_gpio, sizeof(h3600_irda_gpio));
-        if (err)
-                goto err1;
-        err = gpio_direction_output(H3600_EGPIO_IR_ON, 0);
-        if (err)
-                goto err2;
-        err = gpio_request(H3600_EGPIO_IR_FSEL, "IrDA fsel");
-        if (err)
-                goto err2;
-        err = gpio_direction_output(H3600_EGPIO_IR_FSEL, 0);
-        if (err)
-                goto err3;
-        return 0;
-err3:   gpio_free(H3600_EGPIO_IR_FSEL);
-err2:   gpio_free(H3600_EGPIO_IR_ON);
-err1:   return err;
 }
 static void h3600_irda_shutdown(struct device *dev)
 {
-        gpio_free(H3600_EGPIO_IR_ON);
+        return gpio_free_array(h3600_irda_gpio, sizeof(h3600_irda_gpio));
-        gpio_free(H3600_EGPIO_IR_FSEL);
 }
 static struct irda_platform_data h3600_irda_data = {
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h
index 307391488c22..c23fcdb047a5 100644
--- a/arch/arm/mach-sa1100/include/mach/assabet.h
+++ b/arch/arm/mach-sa1100/include/mach/assabet.h
@@ -39,8 +39,8 @@ extern unsigned long SCR_value;
 #define ASSABET_BCR_CF_PWR      (1<<0)  /* Compact Flash Power (1 = 3.3v, 0 = off) */
 #define ASSABET_BCR_CF_RST      (1<<1)  /* Compact Flash Reset (1 = power up reset) */
-#define ASSABET_BCR_GFX_RST     (1<<1)  /* Graphics Accelerator Reset (0 = hold reset) */
+#define ASSABET_BCR_NGFX_RST    (1<<1)  /* Graphics Accelerator Reset (0 = hold reset) */
-#define ASSABET_BCR_CODEC_RST   (1<<2)  /* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */
+#define ASSABET_BCR_NCODEC_RST  (1<<2)  /* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */
 #define ASSABET_BCR_IRDA_FSEL   (1<<3)  /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */
 #define ASSABET_BCR_IRDA_MD0    (1<<4)  /* Range/Power select */
 #define ASSABET_BCR_IRDA_MD1    (1<<5)  /* Range/Power select */
@@ -69,6 +69,8 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 #define ASSABET_BCR_frob(x,y)   do { } while (0)
 #endif
+extern void assabet_uda1341_reset(int set);
 #define ASSABET_BCR_set(x)      ASSABET_BCR_frob((x), (x))
 #define ASSABET_BCR_clear(x)    ASSABET_BCR_frob((x), 0)
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 958e3cbf0ac2..c18689123023 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -614,6 +614,11 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
        REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
 };
+/* Fixed 3.3V regulator used by LCD backlight */
+static struct regulator_consumer_supply fixed5v0_power_consumers[] = {
+        REGULATOR_SUPPLY("power", "pwm-backlight.0"),
+};
 /* Fixed 3.3V regulator to be used by SDHI0 */
 static struct regulator_consumer_supply vcc_sdhi0_consumers[] = {
        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
@@ -1196,6 +1201,8 @@ static void __init eva_init(void)
        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+        regulator_register_always_on(3, "fixed-5.0V", fixed5v0_power_consumers,
+                                     ARRAY_SIZE(fixed5v0_power_consumers), 5000000);
        pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
        pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 38611526fe9a..3c4995aebd22 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -679,7 +679,7 @@ static void __init bockw_init(void)
                        .id             = i,
                        .data           = &rsnd_card_info[i],
                        .size_data      = sizeof(struct asoc_simple_card_info),
-                        .dma_mask       = ~0,
+                        .dma_mask       = DMA_BIT_MASK(32),
                };
                platform_device_register_full(&cardinfo);
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index a8d3ce646fb9..e0406fd37390 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -245,7 +245,9 @@ static void __init lager_init(void)
 {
        lager_add_standard_devices();
-        phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
+        if (IS_ENABLED(CONFIG_PHYLIB))
+                phy_register_fixup_for_id("r8a7790-ether-ff:01",
+                                          lager_ksz8041_fixup);
 }
 static const char * const lager_boards_compat_dt[] __initconst = {
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 037100a1563a..aee77f06f887 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -10,6 +10,7 @@ config ARCH_SOCFPGA
        select GENERIC_CLOCKEVENTS
        select GPIO_PL061 if GPIOLIB
        select HAVE_ARM_SCU
+        select HAVE_ARM_TWD if SMP
        select HAVE_SMP
        select MFD_SYSCON
        select SPARSE_IRQ
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 9a4e910c3796..3a9c1f1c219d 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -198,10 +198,12 @@ void __init tegra_init_fuse(void)
        switch (tegra_chip_id) {
        case TEGRA20:
                tegra20_fuse_init_randomness();
+                break;
        case TEGRA30:
        case TEGRA114:
        default:
                tegra30_fuse_init_randomness();
+                break;
        }
        pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 2e85c1e72535..12c7e5c03ea4 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -140,6 +140,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        /* Requires call-back bindings. */
        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
        /* Requires DMA bindings. */
+        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
                       "ux500-msp-i2s.0", &msp0_platform_data),
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index bdb356498a74..b1dd8584bed4 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -43,7 +43,7 @@ extern void ux500_timer_init(void);
        .virtual        = IO_ADDRESS(x),        \
        .pfn            = __phys_to_pfn(x),     \
        .length         = sz,                   \
-        .type           = MT_MEMORY,            \
+        .type           = MT_MEMORY_RWX,                \
 }
 extern struct smp_operations ux500_smp_ops;
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index ecfe6e53f6e0..7f39ce2f841f 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -12,6 +12,7 @@ ifneq ($(CONFIG_MMU),y)
 obj-y                           += nommu.o
 endif
+obj-$(CONFIG_ARM_PTDUMP)        += dump.o
 obj-$(CONFIG_MODULES)           += proc-syms.o
 obj-$(CONFIG_ALIGNMENT_TRAP)    += alignment.o
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 447da6ffadd5..7abde2ce8973 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -25,6 +25,7 @@
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
+#include "cache-tauros3.h"
 #include "cache-aurora-l2.h"
 #define CACHE_LINE_SIZE         32
@@ -767,6 +768,14 @@ static void aurora_save(void)
        l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
 }
+static void __init tauros3_save(void)
+{
+        l2x0_saved_regs.aux2_ctrl =
+                readl_relaxed(l2x0_base + TAUROS3_AUX2_CTRL);
+        l2x0_saved_regs.prefetch_ctrl =
+                readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
+}
 static void l2x0_resume(void)
 {
        if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
@@ -821,6 +830,18 @@ static void aurora_resume(void)
        }
 }
+static void tauros3_resume(void)
+{
+        if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+                writel_relaxed(l2x0_saved_regs.aux2_ctrl,
+                               l2x0_base + TAUROS3_AUX2_CTRL);
+                writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
+                               l2x0_base + L2X0_PREFETCH_CTRL);
+        }
+        l2x0_resume();
+}
 static void __init aurora_broadcast_l2_commands(void)
 {
        __u32 u;
@@ -906,6 +927,15 @@ static const struct l2x0_of_data aurora_no_outer_data = {
        },
 };
+static const struct l2x0_of_data tauros3_data = {
+        .setup = NULL,
+        .save  = tauros3_save,
+        /* Tauros3 broadcasts L1 cache operations to L2 */
+        .outer_cache = {
+                .resume      = tauros3_resume,
+        },
+};
 static const struct l2x0_of_data bcm_l2x0_data = {
        .setup = pl310_of_setup,
        .save  = pl310_save,
@@ -922,17 +952,19 @@ static const struct l2x0_of_data bcm_l2x0_data = {
 };
 static const struct of_device_id l2x0_ids[] __initconst = {
-        { .compatible = "arm,pl310-cache", .data = (void *)&pl310_data },
-        { .compatible = "arm,l220-cache", .data = (void *)&l2x0_data },
        { .compatible = "arm,l210-cache", .data = (void *)&l2x0_data },
-        { .compatible = "marvell,aurora-system-cache",
+        { .compatible = "arm,l220-cache", .data = (void *)&l2x0_data },
-          .data = (void *)&aurora_no_outer_data},
+        { .compatible = "arm,pl310-cache", .data = (void *)&pl310_data },
-        { .compatible = "marvell,aurora-outer-cache",
-          .data = (void *)&aurora_with_outer_data},
-        { .compatible = "brcm,bcm11351-a2-pl310-cache",
-          .data = (void *)&bcm_l2x0_data},
        { .compatible = "bcm,bcm11351-a2-pl310-cache", /* deprecated name */
          .data = (void *)&bcm_l2x0_data},
+        { .compatible = "brcm,bcm11351-a2-pl310-cache",
+          .data = (void *)&bcm_l2x0_data},
+        { .compatible = "marvell,aurora-outer-cache",
+          .data = (void *)&aurora_with_outer_data},
+        { .compatible = "marvell,aurora-system-cache",
+          .data = (void *)&aurora_no_outer_data},
+        { .compatible = "marvell,tauros3-cache",
+          .data = (void *)&tauros3_data },
        {}
 };
diff --git a/arch/arm/mm/cache-tauros3.h b/arch/arm/mm/cache-tauros3.h
new file mode 100644
index 000000000000..02c0a97cbc02
--- /dev/null
+++ b/arch/arm/mm/cache-tauros3.h
@@ -0,0 +1,41 @@
+/*
+ * Marvell Tauros3 cache controller includes
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_ARM_HARDWARE_TAUROS3_H
+#define __ASM_ARM_HARDWARE_TAUROS3_H
+/*
+ * Marvell Tauros3 L2CC is compatible with PL310 r0p0
+ * but with PREFETCH_CTRL (r2p0) and an additional event counter.
+ * Also, there is AUX2_CTRL for some Marvell specific control.
+ */
+#define TAUROS3_EVENT_CNT2_CFG          0x224
+#define TAUROS3_EVENT_CNT2_VAL          0x228
+#define TAUROS3_INV_ALL                 0x780
+#define TAUROS3_CLEAN_ALL               0x784
+#define TAUROS3_AUX2_CTRL               0x820
+/* Registers shifts and masks */
+#define TAUROS3_AUX2_CTRL_LINEFILL_BURST8_EN    (1 << 2)
+#endif
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index b5c467a65c27..778bcf88ee79 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -146,18 +146,18 @@ flush_levels:
        ldr     r7, =0x7fff
        ands    r7, r7, r1, lsr #13             @ extract max number of the index size
 loop1:
-        mov     r9, r4                          @ create working copy of max way size
+        mov     r9, r7                          @ create working copy of max index
 loop2:
- ARM(   orr     r11, r10, r9, lsl r5    )       @ factor way and cache number into r11
+ ARM(   orr     r11, r10, r4, lsl r5    )       @ factor way and cache number into r11
- THUMB( lsl     r6, r9, r5              )
+ THUMB( lsl     r6, r4, r5              )
 THUMB( orr     r11, r10, r6            )       @ factor way and cache number into r11
- ARM(   orr     r11, r11, r7, lsl r2    )       @ factor index number into r11
+ ARM(   orr     r11, r11, r9, lsl r2    )       @ factor index number into r11
- THUMB( lsl     r6, r7, r2              )
+ THUMB( lsl     r6, r9, r2              )
 THUMB( orr     r11, r11, r6            )       @ factor index number into r11
        mcr     p15, 0, r11, c7, c14, 2         @ clean & invalidate by set/way
-        subs    r9, r9, #1                      @ decrement the way
+        subs    r9, r9, #1                      @ decrement the index
        bge     loop2
-        subs    r7, r7, #1                      @ decrement the index
+        subs    r4, r4, #1                      @ decrement the way
        bge     loop1
 skip:
        add     r10, r10, #2                    @ increment cache number
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 84e6f772e204..6eb97b3a7481 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -36,8 +36,8 @@
 * The context ID is used by debuggers and trace logic, and
 * should be unique within all running processes.
 *
- * In big endian operation, the two 32 bit words are swapped if accesed by
+ * In big endian operation, the two 32 bit words are swapped if accessed
- * non 64-bit operations.
+ * by non-64-bit operations.
 */
 #define ASID_FIRST_VERSION      (1ULL << ASID_BITS)
 #define NUM_USER_ASIDS          ASID_FIRST_VERSION
@@ -78,20 +78,21 @@ void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm,
 #endif
 #ifdef CONFIG_ARM_LPAE
-static void cpu_set_reserved_ttbr0(void)
+/*
-{
+ * With LPAE, the ASID and page tables are updated atomicly, so there is
-        /*
+ * no need for a reserved set of tables (the active ASID tracking prevents
-         * Set TTBR0 to swapper_pg_dir which contains only global entries. The
+ * any issues across a rollover).
-         * ASID is set to 0.
+ */
-         */
+#define cpu_set_reserved_ttbr0()
-        cpu_set_ttbr(0, __pa(swapper_pg_dir));
-        isb();
-}
 #else
 static void cpu_set_reserved_ttbr0(void)
 {
        u32 ttb;
-        /* Copy TTBR1 into TTBR0 */
+        /*
+         * Copy TTBR1 into TTBR0.
+         * This points at swapper_pg_dir, which contains only global
+         * entries so any speculative walks are perfectly safe.
+         */
        asm volatile(
        "       mrc     p15, 0, %0, c2, c0, 1           @ read TTBR1\n"
        "       mcr     p15, 0, %0, c2, c0, 0           @ set TTBR0\n"
@@ -179,6 +180,7 @@ static int is_reserved_asid(u64 asid)
 static u64 new_context(struct mm_struct *mm, unsigned int cpu)
 {
+        static u32 cur_idx = 1;
        u64 asid = atomic64_read(&mm->context.id);
        u64 generation = atomic64_read(&asid_generation);
@@ -193,10 +195,13 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
                 * Allocate a free ASID. If we can't find one, take a
                 * note of the currently active ASIDs and mark the TLBs
                 * as requiring flushes. We always count from ASID #1,
-                 * as we reserve ASID #0 to switch via TTBR0 and indicate
+                 * as we reserve ASID #0 to switch via TTBR0 and to
-                 * rollover events.
+                 * avoid speculative page table walks from hitting in
+                 * any partial walk caches, which could be populated
+                 * from overlapping level-1 descriptors used to map both
+                 * the module area and the userspace stack.
                 */
-                asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, 1);
+                asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, cur_idx);
                if (asid == NUM_USER_ASIDS) {
                        generation = atomic64_add_return(ASID_FIRST_VERSION,
                                                         &asid_generation);
@@ -204,6 +209,7 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
                        asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, 1);
                }
                __set_bit(asid, asid_map);
+                cur_idx = asid;
                asid |= generation;
                cpumask_clear(mm_cpumask(mm));
        }
@@ -221,8 +227,9 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
                __check_vmalloc_seq(mm);
        /*
-         * Required during context switch to avoid speculative page table
+         * We cannot update the pgd and the ASID atomicly with classic
-         * walking with the wrong TTBR.
+         * MMU, so switch exclusively to global mappings to avoid
+         * speculative page table walking with the wrong TTBR.
         */
        cpu_set_reserved_ttbr0();
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 79f8b39801a8..1a77450e728a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -9,6 +9,7 @@
 *
 *  DMA uncached mapping support.
 */
+#include <linux/bootmem.h>
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/gfp.h>
@@ -157,6 +158,44 @@ struct dma_map_ops arm_coherent_dma_ops = {
 };
 EXPORT_SYMBOL(arm_coherent_dma_ops);
+static int __dma_supported(struct device *dev, u64 mask, bool warn)
+{
+        unsigned long max_dma_pfn;
+        /*
+         * If the mask allows for more memory than we can address,
+         * and we actually have that much memory, then we must
+         * indicate that DMA to this device is not supported.
+         */
+        if (sizeof(mask) != sizeof(dma_addr_t) &&
+            mask > (dma_addr_t)~0 &&
+            dma_to_pfn(dev, ~0) < max_pfn) {
+                if (warn) {
+                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
+                                 mask);
+                        dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
+                }
+                return 0;
+        }
+        max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
+        /*
+         * Translate the device's DMA mask to a PFN limit.  This
+         * PFN number includes the page which we can DMA to.
+         */
+        if (dma_to_pfn(dev, mask) < max_dma_pfn) {
+                if (warn)
+                        dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
+                                 mask,
+                                 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
+                                 max_dma_pfn + 1);
+                return 0;
+        }
+        return 1;
+}
 static u64 get_coherent_dma_mask(struct device *dev)
 {
        u64 mask = (u64)DMA_BIT_MASK(32);
@@ -173,32 +212,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
                        return 0;
                }
-                /*
+                if (!__dma_supported(dev, mask, true))
-                 * If the mask allows for more memory than we can address,
-                 * and we actually have that much memory, then fail the
-                 * allocation.
-                 */
-                if (sizeof(mask) != sizeof(dma_addr_t) &&
-                    mask > (dma_addr_t)~0 &&
-                    dma_to_pfn(dev, ~0) > arm_dma_pfn_limit) {
-                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
-                                 mask);
-                        dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
-                        return 0;
-                }
-                /*
-                 * Now check that the mask, when translated to a PFN,
-                 * fits within the allowable addresses which we can
-                 * allocate.
-                 */
-                if (dma_to_pfn(dev, mask) < arm_dma_pfn_limit) {
-                        dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
-                                 mask,
-                                 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
-                                 arm_dma_pfn_limit + 1);
                        return 0;
-                }
        }
        return mask;
@@ -361,7 +376,7 @@ void __init init_dma_coherent_pool_size(unsigned long size)
 static int __init atomic_pool_init(void)
 {
        struct dma_pool *pool = &atomic_pool;
-        pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
+        pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
        gfp_t gfp = GFP_KERNEL | GFP_DMA;
        unsigned long nr_pages = pool->size >> PAGE_SHIFT;
        unsigned long *bitmap;
@@ -609,7 +624,7 @@ static void __free_from_contiguous(struct device *dev, struct page *page,
        if (PageHighMem(page))
                __dma_free_remap(cpu_addr, size);
        else
-                __dma_remap(page, size, pgprot_kernel);
+                __dma_remap(page, size, PAGE_KERNEL);
        dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
 }
@@ -1027,28 +1042,7 @@ void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 */
 int dma_supported(struct device *dev, u64 mask)
 {
-        unsigned long limit;
+        return __dma_supported(dev, mask, false);
-        /*
-         * If the mask allows for more memory than we can address,
-         * and we actually have that much memory, then we must
-         * indicate that DMA to this device is not supported.
-         */
-        if (sizeof(mask) != sizeof(dma_addr_t) &&
-            mask > (dma_addr_t)~0 &&
-            dma_to_pfn(dev, ~0) > arm_dma_pfn_limit)
-                return 0;
-        /*
-         * Translate the device's DMA mask to a PFN limit.  This
-         * PFN number includes the page which we can DMA to.
-         */
-        limit = dma_to_pfn(dev, mask);
-        if (limit < arm_dma_pfn_limit)
-                return 0;
-        return 1;
 }
 EXPORT_SYMBOL(dma_supported);
@@ -1357,7 +1351,7 @@ static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
            dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
 {
-        pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
+        pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
        struct page **pages;
        void *addr = NULL;
diff --git a/arch/arm/mm/dump.c b/arch/arm/mm/dump.c
new file mode 100644
index 000000000000..2b3a56414271
--- /dev/null
+++ b/arch/arm/mm/dump.c
@@ -0,0 +1,345 @@
+/*
+ * Debug helper to dump the current kernel pagetables of the system
+ * so that we can see what the various memory ranges are set to.
+ *
+ * Derived from x86 implementation:
+ * (C) Copyright 2008 Intel Corporation
+ *
+ * Author: Arjan van de Ven <arjan@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#include <linux/debugfs.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/seq_file.h>
+#include <asm/fixmap.h>
+#include <asm/pgtable.h>
+struct addr_marker {
+        unsigned long start_address;
+        const char *name;
+};
+static struct addr_marker address_markers[] = {
+        { MODULES_VADDR,        "Modules" },
+        { PAGE_OFFSET,          "Kernel Mapping" },
+        { 0,                    "vmalloc() Area" },
+        { VMALLOC_END,          "vmalloc() End" },
+        { FIXADDR_START,        "Fixmap Area" },
+        { CONFIG_VECTORS_BASE,  "Vectors" },
+        { CONFIG_VECTORS_BASE + PAGE_SIZE * 2, "Vectors End" },
+        { -1,                   NULL },
+};
+struct pg_state {
+        struct seq_file *seq;
+        const struct addr_marker *marker;
+        unsigned long start_address;
+        unsigned level;
+        u64 current_prot;
+};
+struct prot_bits {
+        u64             mask;
+        u64             val;
+        const char      *set;
+        const char      *clear;
+};
+static const struct prot_bits pte_bits[] = {
+        {
+                .mask   = L_PTE_USER,
+                .val    = L_PTE_USER,
+                .set    = "USR",
+                .clear  = "   ",
+        }, {
+                .mask   = L_PTE_RDONLY,
+                .val    = L_PTE_RDONLY,
+                .set    = "ro",
+                .clear  = "RW",
+        }, {
+                .mask   = L_PTE_XN,
+                .val    = L_PTE_XN,
+                .set    = "NX",
+                .clear  = "x ",
+        }, {
+                .mask   = L_PTE_SHARED,
+                .val    = L_PTE_SHARED,
+                .set    = "SHD",
+                .clear  = "   ",
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_UNCACHED,
+                .set    = "SO/UNCACHED",
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_BUFFERABLE,
+                .set    = "MEM/BUFFERABLE/WC",
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_WRITETHROUGH,
+                .set    = "MEM/CACHED/WT",
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_WRITEBACK,
+                .set    = "MEM/CACHED/WBRA",
+#ifndef CONFIG_ARM_LPAE
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_MINICACHE,
+                .set    = "MEM/MINICACHE",
+#endif
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_WRITEALLOC,
+                .set    = "MEM/CACHED/WBWA",
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_DEV_SHARED,
+                .set    = "DEV/SHARED",
+#ifndef CONFIG_ARM_LPAE
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_DEV_NONSHARED,
+                .set    = "DEV/NONSHARED",
+#endif
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_DEV_WC,
+                .set    = "DEV/WC",
+        }, {
+                .mask   = L_PTE_MT_MASK,
+                .val    = L_PTE_MT_DEV_CACHED,
+                .set    = "DEV/CACHED",
+        },
+};
+static const struct prot_bits section_bits[] = {
+#ifndef CONFIG_ARM_LPAE
+        /* These are approximate */
+        {
+                .mask   = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+                .val    = 0,
+                .set    = "    ro",
+        }, {
+                .mask   = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+                .val    = PMD_SECT_AP_WRITE,
+                .set    = "    RW",
+        }, {
+                .mask   = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+                .val    = PMD_SECT_AP_READ,
+                .set    = "USR ro",
+        }, {
+                .mask   = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+                .val    = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+                .set    = "USR RW",
+#else
+        {
+                .mask   = PMD_SECT_USER,
+                .val    = PMD_SECT_USER,
+                .set    = "USR",
+        }, {
+                .mask   = PMD_SECT_RDONLY,
+                .val    = PMD_SECT_RDONLY,
+                .set    = "ro",
+                .clear  = "RW",
+#endif
+        }, {
+                .mask   = PMD_SECT_XN,
+                .val    = PMD_SECT_XN,
+                .set    = "NX",
+                .clear  = "x ",
+        }, {
+                .mask   = PMD_SECT_S,
+                .val    = PMD_SECT_S,
+                .set    = "SHD",
+                .clear  = "   ",
+        },
+};
+struct pg_level {
+        const struct prot_bits *bits;
+        size_t num;
+        u64 mask;
+};
+static struct pg_level pg_level[] = {
+        {
+        }, { /* pgd */
+        }, { /* pud */
+        }, { /* pmd */
+                .bits   = section_bits,
+                .num    = ARRAY_SIZE(section_bits),
+        }, { /* pte */
+                .bits   = pte_bits,
+                .num    = ARRAY_SIZE(pte_bits),
+        },
+};
+static void dump_prot(struct pg_state *st, const struct prot_bits *bits, size_t num)
+{
+        unsigned i;
+        for (i = 0; i < num; i++, bits++) {
+                const char *s;
+                if ((st->current_prot & bits->mask) == bits->val)
+                        s = bits->set;
+                else
+                        s = bits->clear;
+                if (s)
+                        seq_printf(st->seq, " %s", s);
+        }
+}
+static void note_page(struct pg_state *st, unsigned long addr, unsigned level, u64 val)
+{
+        static const char units[] = "KMGTPE";
+        u64 prot = val & pg_level[level].mask;
+        if (addr < USER_PGTABLES_CEILING)
+                return;
+        if (!st->level) {
+                st->level = level;
+                st->current_prot = prot;
+                seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
+        } else if (prot != st->current_prot || level != st->level ||
+                   addr >= st->marker[1].start_address) {
+                const char *unit = units;
+                unsigned long delta;
+                if (st->current_prot) {
+                        seq_printf(st->seq, "0x%08lx-0x%08lx   ",
+                                   st->start_address, addr);
+                        delta = (addr - st->start_address) >> 10;
+                        while (!(delta & 1023) && unit[1]) {
+                                delta >>= 10;
+                                unit++;
+                        }
+                        seq_printf(st->seq, "%9lu%c", delta, *unit);
+                        if (pg_level[st->level].bits)
+                                dump_prot(st, pg_level[st->level].bits, pg_level[st->level].num);
+                        seq_printf(st->seq, "\n");
+                }
+                if (addr >= st->marker[1].start_address) {
+                        st->marker++;
+                        seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
+                }
+                st->start_address = addr;
+                st->current_prot = prot;
+                st->level = level;
+        }
+}
+static void walk_pte(struct pg_state *st, pmd_t *pmd, unsigned long start)
+{
+        pte_t *pte = pte_offset_kernel(pmd, 0);
+        unsigned long addr;
+        unsigned i;
+        for (i = 0; i < PTRS_PER_PTE; i++, pte++) {
+                addr = start + i * PAGE_SIZE;
+                note_page(st, addr, 4, pte_val(*pte));
+        }
+}
+static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start)
+{
+        pmd_t *pmd = pmd_offset(pud, 0);
+        unsigned long addr;
+        unsigned i;
+        for (i = 0; i < PTRS_PER_PMD; i++, pmd++) {
+                addr = start + i * PMD_SIZE;
+                if (pmd_none(*pmd) || pmd_large(*pmd) || !pmd_present(*pmd))
+                        note_page(st, addr, 3, pmd_val(*pmd));
+                else
+                        walk_pte(st, pmd, addr);
+        }
+}
+static void walk_pud(struct pg_state *st, pgd_t *pgd, unsigned long start)
+{
+        pud_t *pud = pud_offset(pgd, 0);
+        unsigned long addr;
+        unsigned i;
+        for (i = 0; i < PTRS_PER_PUD; i++, pud++) {
+                addr = start + i * PUD_SIZE;
+                if (!pud_none(*pud)) {
+                        walk_pmd(st, pud, addr);
+                } else {
+                        note_page(st, addr, 2, pud_val(*pud));
+                }
+        }
+}
+static void walk_pgd(struct seq_file *m)
+{
+        pgd_t *pgd = swapper_pg_dir;
+        struct pg_state st;
+        unsigned long addr;
+        unsigned i, pgdoff = USER_PGTABLES_CEILING / PGDIR_SIZE;
+        memset(&st, 0, sizeof(st));
+        st.seq = m;
+        st.marker = address_markers;
+        pgd += pgdoff;
+        for (i = pgdoff; i < PTRS_PER_PGD; i++, pgd++) {
+                addr = i * PGDIR_SIZE;
+                if (!pgd_none(*pgd)) {
+                        walk_pud(&st, pgd, addr);
+                } else {
+                        note_page(&st, addr, 1, pgd_val(*pgd));
+                }
+        }
+        note_page(&st, 0, 0, 0);
+}
+static int ptdump_show(struct seq_file *m, void *v)
+{
+        walk_pgd(m);
+        return 0;
+}
+static int ptdump_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, ptdump_show, NULL);
+}
+static const struct file_operations ptdump_fops = {
+        .open           = ptdump_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+static int ptdump_init(void)
+{
+        struct dentry *pe;
+        unsigned i, j;
+        for (i = 0; i < ARRAY_SIZE(pg_level); i++)
+                if (pg_level[i].bits)
+                        for (j = 0; j < pg_level[i].num; j++)
+                                pg_level[i].mask |= pg_level[i].bits[j].mask;
+        address_markers[2].start_address = VMALLOC_START;
+        pe = debugfs_create_file("kernel_page_tables", 0400, NULL, NULL,
+                                 &ptdump_fops);
+        return pe ? 0 : -ENOMEM;
+}
+__initcall(ptdump_init);
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 6d5ba9afb16a..3387e60e4ea3 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -175,16 +175,16 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page)
                unsigned long i;
                if (cache_is_vipt_nonaliasing()) {
                        for (i = 0; i < (1 << compound_order(page)); i++) {
-                                void *addr = kmap_atomic(page);
+                                void *addr = kmap_atomic(page + i);
                                __cpuc_flush_dcache_area(addr, PAGE_SIZE);
                                kunmap_atomic(addr);
                        }
                } else {
                        for (i = 0; i < (1 << compound_order(page)); i++) {
-                                void *addr = kmap_high_get(page);
+                                void *addr = kmap_high_get(page + i);
                                if (addr) {
                                        __cpuc_flush_dcache_area(addr, PAGE_SIZE);
-                                        kunmap_high(page);
+                                        kunmap_high(page + i);
                                }
                        }
                }
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index f123d6eb074b..f9c32ba73544 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -392,9 +392,9 @@ __arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached)
        unsigned int mtype;
        if (cached)
-                mtype = MT_MEMORY;
+                mtype = MT_MEMORY_RWX;
        else
-                mtype = MT_MEMORY_NONCACHED;
+                mtype = MT_MEMORY_RWX_NONCACHED;
        return __arm_ioremap_caller(phys_addr, size, mtype,
                        __builtin_return_address(0));
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index d27158c38eb0..5e85ed371364 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -146,7 +146,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
        info.flags = VM_UNMAPPED_AREA_TOPDOWN;
        info.length = len;
-        info.low_limit = PAGE_SIZE;
+        info.low_limit = FIRST_USER_ADDRESS;
        info.high_limit = mm->mmap_base;
        info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
        info.align_offset = pgoff << PAGE_SHIFT;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 580ef2de82d7..4f08c133cc25 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -22,6 +22,7 @@
 #include <asm/cputype.h>
 #include <asm/sections.h>
 #include <asm/cachetype.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/smp_plat.h>
 #include <asm/tlb.h>
@@ -287,36 +288,43 @@ static struct mem_type mem_types[] = {
                .prot_l1   = PMD_TYPE_TABLE,
                .domain    = DOMAIN_USER,
        },
-        [MT_MEMORY] = {
+        [MT_MEMORY_RWX] = {
                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY,
                .prot_l1   = PMD_TYPE_TABLE,
                .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
                .domain    = DOMAIN_KERNEL,
        },
+        [MT_MEMORY_RW] = {
+                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+                             L_PTE_XN,
+                .prot_l1   = PMD_TYPE_TABLE,
+                .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
+                .domain    = DOMAIN_KERNEL,
+        },
        [MT_ROM] = {
                .prot_sect = PMD_TYPE_SECT,
                .domain    = DOMAIN_KERNEL,
        },
-        [MT_MEMORY_NONCACHED] = {
+        [MT_MEMORY_RWX_NONCACHED] = {
                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
                                L_PTE_MT_BUFFERABLE,
                .prot_l1   = PMD_TYPE_TABLE,
                .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
                .domain    = DOMAIN_KERNEL,
        },
-        [MT_MEMORY_DTCM] = {
+        [MT_MEMORY_RW_DTCM] = {
                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
                                L_PTE_XN,
                .prot_l1   = PMD_TYPE_TABLE,
                .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
                .domain    = DOMAIN_KERNEL,
        },
-        [MT_MEMORY_ITCM] = {
+        [MT_MEMORY_RWX_ITCM] = {
                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY,
                .prot_l1   = PMD_TYPE_TABLE,
                .domain    = DOMAIN_KERNEL,
        },
-        [MT_MEMORY_SO] = {
+        [MT_MEMORY_RW_SO] = {
                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
                                L_PTE_MT_UNCACHED | L_PTE_XN,
                .prot_l1   = PMD_TYPE_TABLE,
@@ -325,7 +333,8 @@ static struct mem_type mem_types[] = {
                .domain    = DOMAIN_KERNEL,
        },
        [MT_MEMORY_DMA_READY] = {
-                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY,
+                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+                                L_PTE_XN,
                .prot_l1   = PMD_TYPE_TABLE,
                .domain    = DOMAIN_KERNEL,
        },
@@ -337,6 +346,44 @@ const struct mem_type *get_mem_type(unsigned int type)
 }
 EXPORT_SYMBOL(get_mem_type);
+#define PTE_SET_FN(_name, pteop) \
+static int pte_set_##_name(pte_t *ptep, pgtable_t token, unsigned long addr, \
+                        void *data) \
+{ \
+        pte_t pte = pteop(*ptep); \
+\
+        set_pte_ext(ptep, pte, 0); \
+        return 0; \
+} \
+#define SET_MEMORY_FN(_name, callback) \
+int set_memory_##_name(unsigned long addr, int numpages) \
+{ \
+        unsigned long start = addr; \
+        unsigned long size = PAGE_SIZE*numpages; \
+        unsigned end = start + size; \
+\
+        if (start < MODULES_VADDR || start >= MODULES_END) \
+                return -EINVAL;\
+\
+        if (end < MODULES_VADDR || end >= MODULES_END) \
+                return -EINVAL; \
+\
+        apply_to_page_range(&init_mm, start, size, callback, NULL); \
+        flush_tlb_kernel_range(start, end); \
+        return 0;\
+}
+PTE_SET_FN(ro, pte_wrprotect)
+PTE_SET_FN(rw, pte_mkwrite)
+PTE_SET_FN(x, pte_mkexec)
+PTE_SET_FN(nx, pte_mknexec)
+SET_MEMORY_FN(ro, pte_set_ro)
+SET_MEMORY_FN(rw, pte_set_rw)
+SET_MEMORY_FN(x, pte_set_x)
+SET_MEMORY_FN(nx, pte_set_nx)
 /*
 * Adjust the PMD section entries according to the CPU in use.
 */
@@ -410,6 +457,9 @@ static void __init build_mem_type_table(void)
                        mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN;
                        mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN;
                        mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN;
+                        /* Also setup NX memory mapping */
+                        mem_types[MT_MEMORY_RW].prot_sect |= PMD_SECT_XN;
                }
                if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
                        /*
@@ -487,11 +537,13 @@ static void __init build_mem_type_table(void)
                        mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
                        mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
                        mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
-                        mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
+                        mem_types[MT_MEMORY_RWX].prot_sect |= PMD_SECT_S;
-                        mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
+                        mem_types[MT_MEMORY_RWX].prot_pte |= L_PTE_SHARED;
+                        mem_types[MT_MEMORY_RW].prot_sect |= PMD_SECT_S;
+                        mem_types[MT_MEMORY_RW].prot_pte |= L_PTE_SHARED;
                        mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
-                        mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+                        mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= PMD_SECT_S;
-                        mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
+                        mem_types[MT_MEMORY_RWX_NONCACHED].prot_pte |= L_PTE_SHARED;
                }
        }
@@ -502,15 +554,15 @@ static void __init build_mem_type_table(void)
        if (cpu_arch >= CPU_ARCH_ARMv6) {
                if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
                        /* Non-cacheable Normal is XCB = 001 */
-                        mem_types[MT_MEMORY_NONCACHED].prot_sect |=
+                        mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |=
                                PMD_SECT_BUFFERED;
                } else {
                        /* For both ARMv6 and non-TEX-remapping ARMv7 */
-                        mem_types[MT_MEMORY_NONCACHED].prot_sect |=
+                        mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |=
                                PMD_SECT_TEX(1);
                }
        } else {
-                mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE;
+                mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE;
        }
 #ifdef CONFIG_ARM_LPAE
@@ -543,10 +595,12 @@ static void __init build_mem_type_table(void)
        mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
        mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
-        mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
+        mem_types[MT_MEMORY_RWX].prot_sect |= ecc_mask | cp->pmd;
-        mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
+        mem_types[MT_MEMORY_RWX].prot_pte |= kern_pgprot;
+        mem_types[MT_MEMORY_RW].prot_sect |= ecc_mask | cp->pmd;
+        mem_types[MT_MEMORY_RW].prot_pte |= kern_pgprot;
        mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;
-        mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;
+        mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= ecc_mask;
        mem_types[MT_ROM].prot_sect |= cp->pmd;
        switch (cp->pmd) {
@@ -1296,6 +1350,8 @@ static void __init kmap_init(void)
 static void __init map_lowmem(void)
 {
        struct memblock_region *reg;
+        unsigned long kernel_x_start = round_down(__pa(_stext), SECTION_SIZE);
+        unsigned long kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE);
        /* Map all the lowmem memory banks. */
        for_each_memblock(memory, reg) {
@@ -1308,12 +1364,40 @@ static void __init map_lowmem(void)
                if (start >= end)
                        break;
-                map.pfn = __phys_to_pfn(start);
+                if (end < kernel_x_start || start >= kernel_x_end) {
-                map.virtual = __phys_to_virt(start);
+                        map.pfn = __phys_to_pfn(start);
-                map.length = end - start;
+                        map.virtual = __phys_to_virt(start);
-                map.type = MT_MEMORY;
+                        map.length = end - start;
+                        map.type = MT_MEMORY_RWX;
-                create_mapping(&map);
+                        create_mapping(&map);
+                } else {
+                        /* This better cover the entire kernel */
+                        if (start < kernel_x_start) {
+                                map.pfn = __phys_to_pfn(start);
+                                map.virtual = __phys_to_virt(start);
+                                map.length = kernel_x_start - start;
+                                map.type = MT_MEMORY_RW;
+                                create_mapping(&map);
+                        }
+                        map.pfn = __phys_to_pfn(kernel_x_start);
+                        map.virtual = __phys_to_virt(kernel_x_start);
+                        map.length = kernel_x_end - kernel_x_start;
+                        map.type = MT_MEMORY_RWX;
+                        create_mapping(&map);
+                        if (kernel_x_end < end) {
+                                map.pfn = __phys_to_pfn(kernel_x_end);
+                                map.virtual = __phys_to_virt(kernel_x_end);
+                                map.length = end - kernel_x_end;
+                                map.type = MT_MEMORY_RW;
+                                create_mapping(&map);
+                        }
+                }
        }
 }
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 0acb089d0f70..249379535be2 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -23,7 +23,7 @@
 #define __pgd_alloc()   kmalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL)
 #define __pgd_free(pgd) kfree(pgd)
 #else
-#define __pgd_alloc()   (pgd_t *)__get_free_pages(GFP_KERNEL, 2)
+#define __pgd_alloc()   (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_REPEAT, 2)
 #define __pgd_free(pgd) free_pages((unsigned long)pgd, 2)
 #endif
@@ -87,7 +87,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
                init_pud = pud_offset(init_pgd, 0);
                init_pmd = pmd_offset(init_pud, 0);
                init_pte = pte_offset_map(init_pmd, 0);
-                set_pte_ext(new_pte, *init_pte, 0);
+                set_pte_ext(new_pte + 0, init_pte[0], 0);
+                set_pte_ext(new_pte + 1, init_pte[1], 0);
                pte_unmap(init_pte);
                pte_unmap(new_pte);
        }
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index fb92abb91628..2861b155485a 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -336,8 +336,11 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
        if (timer->posted)
                return;
-        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
+        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {
+                timer->posted = OMAP_TIMER_NONPOSTED;
+                __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);
                return;
+        }
        __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
                              OMAP_TIMER_CTRL_POSTED, 0);
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 83e4f959ee47..85501238b425 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -96,7 +96,7 @@ static int remap_pte_fn(pte_t *ptep, pgtable_t token, unsigned long addr,
        struct remap_data *info = data;
        struct page *page = info->pages[info->index++];
        unsigned long pfn = page_to_pfn(page);
-        pte_t pte = pfn_pte(pfn, info->prot);
+        pte_t pte = pte_mkspecial(pfn_pte(pfn, info->prot));
        if (map_foreign_page(pfn, info->fgmfn, info->domid))
                return -EFAULT;
@@ -224,10 +224,10 @@ static int __init xen_guest_init(void)
        }
        if (of_address_to_resource(node, GRANT_TABLE_PHYSADDR, &res))
                return 0;
-        xen_hvm_resume_frames = res.start >> PAGE_SHIFT;
+        xen_hvm_resume_frames = res.start;
        xen_events_irq = irq_of_parse_and_map(node, 0);
        pr_info("Xen %s support found, events_irq=%d gnttab_frame_pfn=%lx\n",
-                        version, xen_events_irq, xen_hvm_resume_frames);
+                        version, xen_events_irq, (xen_hvm_resume_frames >> PAGE_SHIFT));
        xen_domain_type = XEN_HVM_DOMAIN;
        xen_setup_features();
diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
index 23732cdff551..b31ee1b275b0 100644
--- a/arch/arm/xen/p2m.c
+++ b/arch/arm/xen/p2m.c
@@ -25,8 +25,9 @@ struct xen_p2m_entry {
        struct rb_node rbnode_phys;
 };
-rwlock_t p2m_lock;
+static rwlock_t p2m_lock;
 struct rb_root phys_to_mach = RB_ROOT;
+EXPORT_SYMBOL_GPL(phys_to_mach);
 static struct rb_root mach_to_phys = RB_ROOT;
 static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
@@ -200,7 +201,7 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
 }
 EXPORT_SYMBOL_GPL(__set_phys_to_machine);
-int p2m_init(void)
+static int p2m_init(void)
 {
        rwlock_init(&p2m_lock);
        return 0;