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-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/debug.S4
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi4
-rw-r--r--arch/arm/boot/dts/at91-sama5d27_som1.dtsi4
-rw-r--r--arch/arm/boot/dts/at91-sama5d2_xplained.dts16
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-zero-w.dts9
-rw-r--r--arch/arm/boot/dts/bcm2837-rpi-3-b.dts5
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi7
-rw-r--r--arch/arm/boot/dts/gemini.dtsi3
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi8
-rw-r--r--arch/arm/boot/dts/moxart.dtsi3
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi1
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi16
-rw-r--r--arch/arm/kernel/debug.S8
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c4
-rw-r--r--arch/arm/mach-ux500/pm.c4
-rw-r--r--arch/arm/mm/nommu.c5
17 files changed, 72 insertions, 31 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 47d3a1ab08d2..817e5cfef83a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -131,7 +131,7 @@ endif
131KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm 131KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
132KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float 132KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
133 133
134CHECKFLAGS += -D__arm__ 134CHECKFLAGS += -D__arm__ -m32
135 135
136#Default value 136#Default value
137head-y := arch/arm/kernel/head$(MMUEXT).o 137head-y := arch/arm/kernel/head$(MMUEXT).o
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 5392ee63338f..8f6e37177de1 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -23,7 +23,11 @@ ENTRY(putc)
23 strb r0, [r1] 23 strb r0, [r1]
24 mov r0, #0x03 @ SYS_WRITEC 24 mov r0, #0x03 @ SYS_WRITEC
25 ARM( svc #0x123456 ) 25 ARM( svc #0x123456 )
26#ifdef CONFIG_CPU_V7M
27 THUMB( bkpt #0xab )
28#else
26 THUMB( svc #0xab ) 29 THUMB( svc #0xab )
30#endif
27 mov pc, lr 31 mov pc, lr
28 .align 2 32 .align 2
291: .word _GLOBAL_OFFSET_TABLE_ - . 331: .word _GLOBAL_OFFSET_TABLE_ - .
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 7ff0811e61db..4960722aab32 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -178,7 +178,7 @@
178 }; 178 };
179 179
180 i2c0: i2c@11000 { 180 i2c0: i2c@11000 {
181 compatible = "marvell,mv64xxx-i2c"; 181 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
182 reg = <0x11000 0x20>; 182 reg = <0x11000 0x20>;
183 #address-cells = <1>; 183 #address-cells = <1>;
184 #size-cells = <0>; 184 #size-cells = <0>;
@@ -189,7 +189,7 @@
189 }; 189 };
190 190
191 i2c1: i2c@11100 { 191 i2c1: i2c@11100 {
192 compatible = "marvell,mv64xxx-i2c"; 192 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
193 reg = <0x11100 0x20>; 193 reg = <0x11100 0x20>;
194 #address-cells = <1>; 194 #address-cells = <1>;
195 #size-cells = <0>; 195 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
index 63a5af898165..cf0087b4c9e1 100644
--- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
+++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
@@ -67,8 +67,8 @@
67 pinctrl-0 = <&pinctrl_macb0_default>; 67 pinctrl-0 = <&pinctrl_macb0_default>;
68 phy-mode = "rmii"; 68 phy-mode = "rmii";
69 69
70 ethernet-phy@1 { 70 ethernet-phy@0 {
71 reg = <0x1>; 71 reg = <0x0>;
72 interrupt-parent = <&pioA>; 72 interrupt-parent = <&pioA>;
73 interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>; 73 interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
74 pinctrl-names = "default"; 74 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index c7e9ccf2bc87..cbc26001247b 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -309,7 +309,7 @@
309 vddana-supply = <&vdd_3v3_lp_reg>; 309 vddana-supply = <&vdd_3v3_lp_reg>;
310 vref-supply = <&vdd_3v3_lp_reg>; 310 vref-supply = <&vdd_3v3_lp_reg>;
311 pinctrl-names = "default"; 311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_adc_default>; 312 pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>;
313 status = "okay"; 313 status = "okay";
314 }; 314 };
315 315
@@ -340,6 +340,20 @@
340 bias-disable; 340 bias-disable;
341 }; 341 };
342 342
343 /*
344 * The ADTRG pin can work on any edge type.
345 * In here it's being pulled up, so need to
346 * connect it to ground to get an edge e.g.
347 * Trigger can be configured on falling, rise
348 * or any edge, and the pull-up can be changed
349 * to pull-down or left floating according to
350 * needs.
351 */
352 pinctrl_adtrg_default: adtrg_default {
353 pinmux = <PIN_PD31__ADTRG>;
354 bias-pull-up;
355 };
356
343 pinctrl_charger_chglev: charger_chglev { 357 pinctrl_charger_chglev: charger_chglev {
344 pinmux = <PIN_PA12__GPIO>; 358 pinmux = <PIN_PA12__GPIO>;
345 bias-disable; 359 bias-disable;
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
index 82651c3eb682..b8565fc33eea 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
@@ -18,12 +18,9 @@
18 compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; 18 compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
19 model = "Raspberry Pi Zero W"; 19 model = "Raspberry Pi Zero W";
20 20
21 /* Needed by firmware to properly init UARTs */ 21 chosen {
22 aliases { 22 /* 8250 auxiliary UART instead of pl011 */
23 uart0 = "/soc/serial@7e201000"; 23 stdout-path = "serial1:115200n8";
24 uart1 = "/soc/serial@7e215040";
25 serial0 = "/soc/serial@7e201000";
26 serial1 = "/soc/serial@7e215040";
27 }; 24 };
28 25
29 leds { 26 leds {
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
index 20725ca487f3..c71a0d73d2a2 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -8,6 +8,11 @@
8 compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; 8 compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
9 model = "Raspberry Pi 3 Model B"; 9 model = "Raspberry Pi 3 Model B";
10 10
11 chosen {
12 /* 8250 auxiliary UART instead of pl011 */
13 stdout-path = "serial1:115200n8";
14 };
15
11 memory { 16 memory {
12 reg = <0 0x40000000>; 17 reg = <0 0x40000000>;
13 }; 18 };
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 431dcfc900c0..013431e3d7c3 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -20,8 +20,13 @@
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 22
23 aliases {
24 serial0 = &uart0;
25 serial1 = &uart1;
26 };
27
23 chosen { 28 chosen {
24 bootargs = "earlyprintk console=ttyAMA0"; 29 stdout-path = "serial0:115200n8";
25 }; 30 };
26 31
27 thermal-zones { 32 thermal-zones {
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
index c68e8d430234..f0d178c77153 100644
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -145,11 +145,12 @@
145 }; 145 };
146 146
147 watchdog@41000000 { 147 watchdog@41000000 {
148 compatible = "cortina,gemini-watchdog"; 148 compatible = "cortina,gemini-watchdog", "faraday,ftwdt010";
149 reg = <0x41000000 0x1000>; 149 reg = <0x41000000 0x1000>;
150 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; 150 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
151 resets = <&syscon GEMINI_RESET_WDOG>; 151 resets = <&syscon GEMINI_RESET_WDOG>;
152 clocks = <&syscon GEMINI_CLK_APB>; 152 clocks = <&syscon GEMINI_CLK_APB>;
153 clock-names = "PCLK";
153 }; 154 };
154 155
155 uart0: serial@42000000 { 156 uart0: serial@42000000 {
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index f46814a7ea44..4d308d17f040 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -144,10 +144,10 @@
144 interrupt-names = "msi"; 144 interrupt-names = "msi";
145 #interrupt-cells = <1>; 145 #interrupt-cells = <1>;
146 interrupt-map-mask = <0 0 0 0x7>; 146 interrupt-map-mask = <0 0 0 0x7>;
147 interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 147 interrupt-map = <0 0 0 1 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
148 <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 148 <0 0 0 2 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 149 <0 0 0 3 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 150 <0 0 0 4 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
151 clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, 151 clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
152 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, 152 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
153 <&clks IMX7D_PCIE_PHY_ROOT_CLK>; 153 <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
diff --git a/arch/arm/boot/dts/moxart.dtsi b/arch/arm/boot/dts/moxart.dtsi
index 1f4c795d3f72..da7b3237bfe9 100644
--- a/arch/arm/boot/dts/moxart.dtsi
+++ b/arch/arm/boot/dts/moxart.dtsi
@@ -87,9 +87,10 @@
87 }; 87 };
88 88
89 watchdog: watchdog@98500000 { 89 watchdog: watchdog@98500000 {
90 compatible = "moxa,moxart-watchdog"; 90 compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
91 reg = <0x98500000 0x10>; 91 reg = <0x98500000 0x10>;
92 clocks = <&clk_apb>; 92 clocks = <&clk_apb>;
93 clock-names = "PCLK";
93 }; 94 };
94 95
95 sdhci: sdhci@98e00000 { 96 sdhci: sdhci@98e00000 {
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 38d2216c7ead..b1a26b42d190 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1430,6 +1430,7 @@
1430 atmel,min-sample-rate-hz = <200000>; 1430 atmel,min-sample-rate-hz = <200000>;
1431 atmel,max-sample-rate-hz = <20000000>; 1431 atmel,max-sample-rate-hz = <20000000>;
1432 atmel,startup-time-ms = <4>; 1432 atmel,startup-time-ms = <4>;
1433 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
1433 status = "disabled"; 1434 status = "disabled";
1434 }; 1435 };
1435 1436
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index b147cb0dc14b..eef072a21acc 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -311,8 +311,8 @@
311 #size-cells = <0>; 311 #size-cells = <0>;
312 reg = <0>; 312 reg = <0>;
313 313
314 tcon1_in_drc1: endpoint@0 { 314 tcon1_in_drc1: endpoint@1 {
315 reg = <0>; 315 reg = <1>;
316 remote-endpoint = <&drc1_out_tcon1>; 316 remote-endpoint = <&drc1_out_tcon1>;
317 }; 317 };
318 }; 318 };
@@ -1012,8 +1012,8 @@
1012 #size-cells = <0>; 1012 #size-cells = <0>;
1013 reg = <1>; 1013 reg = <1>;
1014 1014
1015 be1_out_drc1: endpoint@0 { 1015 be1_out_drc1: endpoint@1 {
1016 reg = <0>; 1016 reg = <1>;
1017 remote-endpoint = <&drc1_in_be1>; 1017 remote-endpoint = <&drc1_in_be1>;
1018 }; 1018 };
1019 }; 1019 };
@@ -1042,8 +1042,8 @@
1042 #size-cells = <0>; 1042 #size-cells = <0>;
1043 reg = <0>; 1043 reg = <0>;
1044 1044
1045 drc1_in_be1: endpoint@0 { 1045 drc1_in_be1: endpoint@1 {
1046 reg = <0>; 1046 reg = <1>;
1047 remote-endpoint = <&be1_out_drc1>; 1047 remote-endpoint = <&be1_out_drc1>;
1048 }; 1048 };
1049 }; 1049 };
@@ -1053,8 +1053,8 @@
1053 #size-cells = <0>; 1053 #size-cells = <0>;
1054 reg = <1>; 1054 reg = <1>;
1055 1055
1056 drc1_out_tcon1: endpoint@0 { 1056 drc1_out_tcon1: endpoint@1 {
1057 reg = <0>; 1057 reg = <1>;
1058 remote-endpoint = <&tcon1_in_drc1>; 1058 remote-endpoint = <&tcon1_in_drc1>;
1059 }; 1059 };
1060 }; 1060 };
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index ea9646cc2a0e..0a498cb3fad8 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -115,7 +115,11 @@ ENTRY(printascii)
115 mov r1, r0 115 mov r1, r0
116 mov r0, #0x04 @ SYS_WRITE0 116 mov r0, #0x04 @ SYS_WRITE0
117 ARM( svc #0x123456 ) 117 ARM( svc #0x123456 )
118#ifdef CONFIG_CPU_V7M
119 THUMB( bkpt #0xab )
120#else
118 THUMB( svc #0xab ) 121 THUMB( svc #0xab )
122#endif
119 ret lr 123 ret lr
120ENDPROC(printascii) 124ENDPROC(printascii)
121 125
@@ -124,7 +128,11 @@ ENTRY(printch)
124 strb r0, [r1] 128 strb r0, [r1]
125 mov r0, #0x03 @ SYS_WRITEC 129 mov r0, #0x03 @ SYS_WRITEC
126 ARM( svc #0x123456 ) 130 ARM( svc #0x123456 )
131#ifdef CONFIG_CPU_V7M
132 THUMB( bkpt #0xab )
133#else
127 THUMB( svc #0xab ) 134 THUMB( svc #0xab )
135#endif
128 ret lr 136 ret lr
129ENDPROC(printch) 137ENDPROC(printch)
130 138
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 71a34e8c345a..57058ac46f49 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -32,6 +32,7 @@
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33 33
34#include "db8500-regs.h" 34#include "db8500-regs.h"
35#include "pm_domains.h"
35 36
36static int __init ux500_l2x0_unlock(void) 37static int __init ux500_l2x0_unlock(void)
37{ 38{
@@ -157,6 +158,9 @@ static const struct of_device_id u8500_local_bus_nodes[] = {
157 158
158static void __init u8500_init_machine(void) 159static void __init u8500_init_machine(void)
159{ 160{
161 /* Initialize ux500 power domains */
162 ux500_pm_domains_init();
163
160 /* automatically probe child nodes of dbx5x0 devices */ 164 /* automatically probe child nodes of dbx5x0 devices */
161 if (of_machine_is_compatible("st-ericsson,u8540")) 165 if (of_machine_is_compatible("st-ericsson,u8540"))
162 of_platform_populate(NULL, u8500_local_bus_nodes, 166 of_platform_populate(NULL, u8500_local_bus_nodes,
diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c
index a970e7fcba9e..f6c33a0c1c61 100644
--- a/arch/arm/mach-ux500/pm.c
+++ b/arch/arm/mach-ux500/pm.c
@@ -19,7 +19,6 @@
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20 20
21#include "db8500-regs.h" 21#include "db8500-regs.h"
22#include "pm_domains.h"
23 22
24/* ARM WFI Standby signal register */ 23/* ARM WFI Standby signal register */
25#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) 24#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130)
@@ -203,7 +202,4 @@ void __init ux500_pm_init(u32 phy_base, u32 size)
203 202
204 /* Set up ux500 suspend callbacks. */ 203 /* Set up ux500 suspend callbacks. */
205 suspend_set_ops(UX500_SUSPEND_OPS); 204 suspend_set_ops(UX500_SUSPEND_OPS);
206
207 /* Initialize ux500 power domains */
208 ux500_pm_domains_init();
209} 205}
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 3b8e728cc944..91537d90f5f5 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -344,6 +344,11 @@ void __init arm_mm_memblock_reserve(void)
344 * reserved here. 344 * reserved here.
345 */ 345 */
346#endif 346#endif
347 /*
348 * In any case, always ensure address 0 is never used as many things
349 * get very confused if 0 is returned as a legitimate address.
350 */
351 memblock_reserve(0, 1);
347} 352}
348 353
349void __init adjust_lowmem_bounds(void) 354void __init adjust_lowmem_bounds(void)
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-30 22:35:22 -0400