diff options
Diffstat (limited to 'arch/arm64/include/asm/kvm_arm.h')
-rw-r--r-- | arch/arm64/include/asm/kvm_arm.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 7605e095217f..9694f2654593 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h | |||
@@ -95,6 +95,7 @@ | |||
95 | SCTLR_EL2_SA | SCTLR_EL2_I) | 95 | SCTLR_EL2_SA | SCTLR_EL2_I) |
96 | 96 | ||
97 | /* TCR_EL2 Registers bits */ | 97 | /* TCR_EL2 Registers bits */ |
98 | #define TCR_EL2_RES1 ((1 << 31) | (1 << 23)) | ||
98 | #define TCR_EL2_TBI (1 << 20) | 99 | #define TCR_EL2_TBI (1 << 20) |
99 | #define TCR_EL2_PS (7 << 16) | 100 | #define TCR_EL2_PS (7 << 16) |
100 | #define TCR_EL2_PS_40B (2 << 16) | 101 | #define TCR_EL2_PS_40B (2 << 16) |
@@ -106,9 +107,10 @@ | |||
106 | #define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ | 107 | #define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ |
107 | TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) | 108 | TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) |
108 | 109 | ||
109 | #define TCR_EL2_FLAGS (TCR_EL2_PS_40B) | 110 | #define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B) |
110 | 111 | ||
111 | /* VTCR_EL2 Registers bits */ | 112 | /* VTCR_EL2 Registers bits */ |
113 | #define VTCR_EL2_RES1 (1 << 31) | ||
112 | #define VTCR_EL2_PS_MASK (7 << 16) | 114 | #define VTCR_EL2_PS_MASK (7 << 16) |
113 | #define VTCR_EL2_TG0_MASK (1 << 14) | 115 | #define VTCR_EL2_TG0_MASK (1 << 14) |
114 | #define VTCR_EL2_TG0_4K (0 << 14) | 116 | #define VTCR_EL2_TG0_4K (0 << 14) |
@@ -147,7 +149,8 @@ | |||
147 | */ | 149 | */ |
148 | #define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \ | 150 | #define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \ |
149 | VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ | 151 | VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ |
150 | VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) | 152 | VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \ |
153 | VTCR_EL2_RES1) | ||
151 | #define VTTBR_X (38 - VTCR_EL2_T0SZ_40B) | 154 | #define VTTBR_X (38 - VTCR_EL2_T0SZ_40B) |
152 | #else | 155 | #else |
153 | /* | 156 | /* |
@@ -158,7 +161,8 @@ | |||
158 | */ | 161 | */ |
159 | #define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \ | 162 | #define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \ |
160 | VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ | 163 | VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ |
161 | VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) | 164 | VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B | \ |
165 | VTCR_EL2_RES1) | ||
162 | #define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) | 166 | #define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) |
163 | #endif | 167 | #endif |
164 | 168 | ||
@@ -168,7 +172,6 @@ | |||
168 | #define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT) | 172 | #define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT) |
169 | 173 | ||
170 | /* Hyp System Trap Register */ | 174 | /* Hyp System Trap Register */ |
171 | #define HSTR_EL2_TTEE (1 << 16) | ||
172 | #define HSTR_EL2_T(x) (1 << x) | 175 | #define HSTR_EL2_T(x) (1 << x) |
173 | 176 | ||
174 | /* Hyp Coproccessor Trap Register Shifts */ | 177 | /* Hyp Coproccessor Trap Register Shifts */ |