7 files changed, 58 insertions, 63 deletions

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b1e192ba8c24..a53fd2aaa2f4 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -30,13 +30,13 @@
 
 static void __iomem *l2x0_base;
 static DEFINE_RAW_SPINLOCK(l2x0_lock);
-static uint32_t l2x0_way_mask;  /* Bitmask of active ways */
-static uint32_t l2x0_size;
+static u32 l2x0_way_mask;       /* Bitmask of active ways */
+static u32 l2x0_size;
 
 struct l2x0_regs l2x0_saved_regs;
 
 struct l2x0_of_data {
-        void (*setup)(const struct device_node *, __u32 *, __u32 *);
+        void (*setup)(const struct device_node *, u32 *, u32 *);
         void (*save)(void);
         void (*resume)(void);
 };
@@ -288,7 +288,7 @@ static void l2x0_disable(void)
         raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
-static void l2x0_unlock(__u32 cache_id)
+static void l2x0_unlock(u32 cache_id)
 {
         int lockregs;
         int i;
@@ -307,11 +307,11 @@ static void l2x0_unlock(__u32 cache_id)
         }
 }
 
-void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
 {
-        __u32 aux;
-        __u32 cache_id;
-        __u32 way_size = 0;
+        u32 aux;
+        u32 cache_id;
+        u32 way_size = 0;
         int ways;
         const char *type;
 
@@ -388,7 +388,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
 
 #ifdef CONFIG_OF
 static void __init l2x0_of_setup(const struct device_node *np,
-                                 __u32 *aux_val, __u32 *aux_mask)
+                                 u32 *aux_val, u32 *aux_mask)
 {
         u32 data[2] = { 0, 0 };
         u32 tag = 0;
@@ -422,7 +422,7 @@ static void __init l2x0_of_setup(const struct device_node *np,
 }
 
 static void __init pl310_of_setup(const struct device_node *np,
-                                  __u32 *aux_val, __u32 *aux_mask)
+                                  u32 *aux_val, u32 *aux_mask)
 {
         u32 data[3] = { 0, 0, 0 };
         u32 tag[3] = { 0, 0, 0 };
@@ -548,7 +548,7 @@ static const struct of_device_id l2x0_ids[] __initconst = {
         {}
 };
 
-int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask)
+int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
 {
         struct device_node *np;
         struct l2x0_of_data *data;
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 7d0a8c230342..6e06180a8bc0 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -23,10 +23,6 @@
 
 #include "mm.h"
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently.
- */
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
@@ -78,10 +74,9 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
 
         raw_spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
-        flush_tlb_kernel_page(0xffff8000);
+        set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
 
-        mc_copy_user_page((void *)0xffff8000, kto);
+        mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
         raw_spin_unlock(&minicache_lock);
 
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 3d9a1552cef6..29c770463e41 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -24,9 +24,6 @@
 #error FIX ME
 #endif
 
-#define from_address    (0xffff8000)
-#define to_address      (0xffffc000)
-
 static DEFINE_RAW_SPINLOCK(v6_lock);
 
 /*
@@ -90,14 +87,11 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
          */
         raw_spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
-
-        kfrom = from_address + (offset << PAGE_SHIFT);
-        kto   = to_address + (offset << PAGE_SHIFT);
+        kfrom = COPYPAGE_V6_FROM + (offset << PAGE_SHIFT);
+        kto   = COPYPAGE_V6_TO + (offset << PAGE_SHIFT);
 
-        flush_tlb_kernel_page(kfrom);
-        flush_tlb_kernel_page(kto);
+        set_top_pte(kfrom, mk_pte(from, PAGE_KERNEL));
+        set_top_pte(kto, mk_pte(to, PAGE_KERNEL));
 
         copy_page((void *)kto, (void *)kfrom);
 
@@ -111,8 +105,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
  */
 static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
 {
-        unsigned int offset = CACHE_COLOUR(vaddr);
-        unsigned long to = to_address + (offset << PAGE_SHIFT);
+        unsigned long to = COPYPAGE_V6_TO + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
 
         /* FIXME: not highmem safe */
         discard_old_kernel_data(page_address(page));
@@ -123,8 +116,7 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
          */
         raw_spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
-        flush_tlb_kernel_page(to);
+        set_top_pte(to, mk_pte(page, PAGE_KERNEL));
         clear_page((void *)to);
 
         raw_spin_unlock(&v6_lock);
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 610c24ced310..804eeddda97f 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -23,12 +23,6 @@
 
 #include "mm.h"
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently.
- */
-#define COPYPAGE_MINICACHE      0xffff8000
-
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
@@ -100,8 +94,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
 
         raw_spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
-        flush_tlb_kernel_page(COPYPAGE_MINICACHE);
+        set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 1a8d4aa821be..4d0b70f035eb 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -23,15 +23,12 @@
 
 #ifdef CONFIG_CPU_CACHE_VIPT
 
-#define ALIAS_FLUSH_START       0xffff4000
-
 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 {
-        unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+        unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         const int zero = 0;
 
-        set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
-        flush_tlb_kernel_page(to);
+        set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
 
         asm(    "mcrr   p15, 0, %1, %0, c14\n"
         "       mcr     p15, 0, %2, c7, c10, 4"
@@ -42,13 +39,12 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 
 static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
 {
-        unsigned long colour = CACHE_COLOUR(vaddr);
+        unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         unsigned long offset = vaddr & (PAGE_SIZE - 1);
         unsigned long to;
 
-        set_pte_ext(TOP_PTE(ALIAS_FLUSH_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0);
-        to = ALIAS_FLUSH_START + (colour << PAGE_SHIFT) + offset;
-        flush_tlb_kernel_page(to);
+        set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
+        to = va + offset;
         flush_icache_range(to, to + len);
 }
 
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 807c0573abbe..3a9e8aa19759 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -69,15 +69,14 @@ void *__kmap_atomic(struct page *page)
          * With debugging enabled, kunmap_atomic forces that entry to 0.
          * Make sure it was indeed properly unmapped.
          */
-        BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
+        BUG_ON(!pte_none(get_top_pte(vaddr)));
 #endif
-        set_pte_ext(TOP_PTE(vaddr), mk_pte(page, kmap_prot), 0);
         /*
          * When debugging is off, kunmap_atomic leaves the previous mapping
-         * in place, so this TLB flush ensures the TLB is updated with the
-         * new mapping.
+         * in place, so the contained TLB flush ensures the TLB is updated
+         * with the new mapping.
          */
-        local_flush_tlb_kernel_page(vaddr);
+        set_top_pte(vaddr, mk_pte(page, kmap_prot));
 
         return (void *)vaddr;
 }
@@ -96,8 +95,7 @@ void __kunmap_atomic(void *kvaddr)
                         __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
 #ifdef CONFIG_DEBUG_HIGHMEM
                 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
-                set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
-                local_flush_tlb_kernel_page(vaddr);
+                set_top_pte(vaddr, __pte(0));
 #else
                 (void) idx;  /* to kill a warning */
 #endif
@@ -121,10 +119,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
         idx = type + KM_TYPE_NR * smp_processor_id();
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
-        BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
+        BUG_ON(!pte_none(get_top_pte(vaddr)));
 #endif
-        set_pte_ext(TOP_PTE(vaddr), pfn_pte(pfn, kmap_prot), 0);
-        local_flush_tlb_kernel_page(vaddr);
+        set_top_pte(vaddr, pfn_pte(pfn, kmap_prot));
 
         return (void *)vaddr;
 }
@@ -132,11 +129,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
 struct page *kmap_atomic_to_page(const void *ptr)
 {
         unsigned long vaddr = (unsigned long)ptr;
-        pte_t *pte;
 
         if (vaddr < FIXADDR_START)
                 return virt_to_page(ptr);
 
-        pte = TOP_PTE(vaddr);
-        return pte_page(*pte);
+        return pte_page(get_top_pte(vaddr));
 }
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 70f6d3ea4834..27f4a619b35d 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -3,7 +3,31 @@
 /* the upper-most page table pointer */
 extern pmd_t *top_pmd;
 
-#define TOP_PTE(x)      pte_offset_kernel(top_pmd, x)
+/*
+ * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
+ * specific hacks for copying pages efficiently, while 0xffff4000
+ * is reserved for VIPT aliasing flushing by generic code.
+ *
+ * Note that we don't allow VIPT aliasing caches with SMP.
+ */
+#define COPYPAGE_MINICACHE      0xffff8000
+#define COPYPAGE_V6_FROM        0xffff8000
+#define COPYPAGE_V6_TO          0xffffc000
+/* PFN alias flushing, for VIPT caches */
+#define FLUSH_ALIAS_START       0xffff4000
+
+static inline void set_top_pte(unsigned long va, pte_t pte)
+{
+        pte_t *ptep = pte_offset_kernel(top_pmd, va);
+        set_pte_ext(ptep, pte, 0);
+        local_flush_tlb_kernel_page(va);
+}
+
+static inline pte_t get_top_pte(unsigned long va)
+{
+        pte_t *ptep = pte_offset_kernel(top_pmd, va);
+        return *ptep;
+}
 
 static inline pmd_t *pmd_off_k(unsigned long virt)
 {