1 files changed, 5 insertions, 2 deletions

diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 47a5acc64433..acd5a66dfc23 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -139,6 +139,9 @@ __v7m_setup_cont:
         cpsie   i
         svc     #0
 1:      cpsid   i
+        ldr     r0, =exc_ret
+        orr     lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK
+        str     lr, [r0]
         ldmia   sp, {r0-r3, r12}
         str     r5, [r12, #11 * 4]      @ restore the original SVC vector entry
         mov     lr, r6                  @ restore LR
@@ -149,10 +152,10 @@ __v7m_setup_cont:
 
         @ Configure caches (if implemented)
         teq     r8, #0
-        stmneia sp, {r0-r6, lr}         @ v7m_invalidate_l1 touches r0-r6
+        stmiane sp, {r0-r6, lr}         @ v7m_invalidate_l1 touches r0-r6
         blne    v7m_invalidate_l1
         teq     r8, #0                  @ re-evalutae condition
-        ldmneia sp, {r0-r6, lr}
+        ldmiane sp, {r0-r6, lr}
 
         @ Configure the System Control Register to ensure 8-byte stack alignment
         @ Note the STKALIGN bit is either RW or RAO.