diff options
Diffstat (limited to 'arch/arm/mach-netx/time.c')
-rw-r--r-- | arch/arm/mach-netx/time.c | 141 |
1 files changed, 0 insertions, 141 deletions
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c deleted file mode 100644 index d9defa1ab605..000000000000 --- a/arch/arm/mach-netx/time.c +++ /dev/null | |||
@@ -1,141 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0-only | ||
2 | /* | ||
3 | * arch/arm/mach-netx/time.c | ||
4 | * | ||
5 | * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
6 | */ | ||
7 | |||
8 | #include <linux/init.h> | ||
9 | #include <linux/interrupt.h> | ||
10 | #include <linux/irq.h> | ||
11 | #include <linux/clocksource.h> | ||
12 | #include <linux/clockchips.h> | ||
13 | #include <linux/io.h> | ||
14 | |||
15 | #include <mach/hardware.h> | ||
16 | #include <asm/mach/time.h> | ||
17 | #include <mach/netx-regs.h> | ||
18 | |||
19 | #define NETX_CLOCK_FREQ 100000000 | ||
20 | #define NETX_LATCH DIV_ROUND_CLOSEST(NETX_CLOCK_FREQ, HZ) | ||
21 | |||
22 | #define TIMER_CLOCKEVENT 0 | ||
23 | #define TIMER_CLOCKSOURCE 1 | ||
24 | |||
25 | static inline void timer_shutdown(struct clock_event_device *evt) | ||
26 | { | ||
27 | /* disable timer */ | ||
28 | writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT)); | ||
29 | } | ||
30 | |||
31 | static int netx_shutdown(struct clock_event_device *evt) | ||
32 | { | ||
33 | timer_shutdown(evt); | ||
34 | |||
35 | return 0; | ||
36 | } | ||
37 | |||
38 | static int netx_set_oneshot(struct clock_event_device *evt) | ||
39 | { | ||
40 | u32 tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN; | ||
41 | |||
42 | timer_shutdown(evt); | ||
43 | writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT)); | ||
44 | writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT)); | ||
45 | |||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | static int netx_set_periodic(struct clock_event_device *evt) | ||
50 | { | ||
51 | u32 tmode = NETX_GPIO_COUNTER_CTRL_RST_EN | | ||
52 | NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN; | ||
53 | |||
54 | timer_shutdown(evt); | ||
55 | writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT)); | ||
56 | writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT)); | ||
57 | |||
58 | return 0; | ||
59 | } | ||
60 | |||
61 | static int netx_set_next_event(unsigned long evt, | ||
62 | struct clock_event_device *clk) | ||
63 | { | ||
64 | writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT)); | ||
65 | return 0; | ||
66 | } | ||
67 | |||
68 | static struct clock_event_device netx_clockevent = { | ||
69 | .name = "netx-timer" __stringify(TIMER_CLOCKEVENT), | ||
70 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
71 | .set_next_event = netx_set_next_event, | ||
72 | .set_state_shutdown = netx_shutdown, | ||
73 | .set_state_periodic = netx_set_periodic, | ||
74 | .set_state_oneshot = netx_set_oneshot, | ||
75 | .tick_resume = netx_shutdown, | ||
76 | }; | ||
77 | |||
78 | /* | ||
79 | * IRQ handler for the timer | ||
80 | */ | ||
81 | static irqreturn_t | ||
82 | netx_timer_interrupt(int irq, void *dev_id) | ||
83 | { | ||
84 | struct clock_event_device *evt = &netx_clockevent; | ||
85 | |||
86 | /* acknowledge interrupt */ | ||
87 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | ||
88 | |||
89 | evt->event_handler(evt); | ||
90 | |||
91 | return IRQ_HANDLED; | ||
92 | } | ||
93 | |||
94 | static struct irqaction netx_timer_irq = { | ||
95 | .name = "NetX Timer Tick", | ||
96 | .flags = IRQF_TIMER | IRQF_IRQPOLL, | ||
97 | .handler = netx_timer_interrupt, | ||
98 | }; | ||
99 | |||
100 | /* | ||
101 | * Set up timer interrupt | ||
102 | */ | ||
103 | void __init netx_timer_init(void) | ||
104 | { | ||
105 | /* disable timer initially */ | ||
106 | writel(0, NETX_GPIO_COUNTER_CTRL(0)); | ||
107 | |||
108 | /* Reset the timer value to zero */ | ||
109 | writel(0, NETX_GPIO_COUNTER_CURRENT(0)); | ||
110 | |||
111 | writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(0)); | ||
112 | |||
113 | /* acknowledge interrupt */ | ||
114 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | ||
115 | |||
116 | /* Enable the interrupt in the specific timer | ||
117 | * register and start timer | ||
118 | */ | ||
119 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE); | ||
120 | writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN, | ||
121 | NETX_GPIO_COUNTER_CTRL(0)); | ||
122 | |||
123 | setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq); | ||
124 | |||
125 | /* Setup timer one for clocksource */ | ||
126 | writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); | ||
127 | writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE)); | ||
128 | writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE)); | ||
129 | |||
130 | writel(NETX_GPIO_COUNTER_CTRL_RUN, | ||
131 | NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); | ||
132 | |||
133 | clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), | ||
134 | "netx_timer", NETX_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up); | ||
135 | |||
136 | /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. | ||
137 | * Adding some safety ... */ | ||
138 | netx_clockevent.cpumask = cpumask_of(0); | ||
139 | clockevents_config_and_register(&netx_clockevent, NETX_CLOCK_FREQ, | ||
140 | 0xa00, 0xfffffffe); | ||
141 | } | ||