diff options
Diffstat (limited to 'arch/arm/mach-msm/include/mach/iommu.h')
| -rw-r--r-- | arch/arm/mach-msm/include/mach/iommu.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/arch/arm/mach-msm/include/mach/iommu.h index 218ef5732a24..296c0f10f230 100644 --- a/arch/arm/mach-msm/include/mach/iommu.h +++ b/arch/arm/mach-msm/include/mach/iommu.h | |||
| @@ -20,13 +20,26 @@ | |||
| 20 | 20 | ||
| 21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
| 22 | 22 | ||
| 23 | /* Sharability attributes of MSM IOMMU mappings */ | ||
| 24 | #define MSM_IOMMU_ATTR_NON_SH 0x0 | ||
| 25 | #define MSM_IOMMU_ATTR_SH 0x4 | ||
| 26 | |||
| 27 | /* Cacheability attributes of MSM IOMMU mappings */ | ||
| 28 | #define MSM_IOMMU_ATTR_NONCACHED 0x0 | ||
| 29 | #define MSM_IOMMU_ATTR_CACHED_WB_WA 0x1 | ||
| 30 | #define MSM_IOMMU_ATTR_CACHED_WB_NWA 0x2 | ||
| 31 | #define MSM_IOMMU_ATTR_CACHED_WT 0x3 | ||
| 32 | |||
| 33 | /* Mask for the cache policy attribute */ | ||
| 34 | #define MSM_IOMMU_CP_MASK 0x03 | ||
| 35 | |||
| 23 | /* Maximum number of Machine IDs that we are allowing to be mapped to the same | 36 | /* Maximum number of Machine IDs that we are allowing to be mapped to the same |
| 24 | * context bank. The number of MIDs mapped to the same CB does not affect | 37 | * context bank. The number of MIDs mapped to the same CB does not affect |
| 25 | * performance, but there is a practical limit on how many distinct MIDs may | 38 | * performance, but there is a practical limit on how many distinct MIDs may |
| 26 | * be present. These mappings are typically determined at design time and are | 39 | * be present. These mappings are typically determined at design time and are |
| 27 | * not expected to change at run time. | 40 | * not expected to change at run time. |
| 28 | */ | 41 | */ |
| 29 | #define MAX_NUM_MIDS 16 | 42 | #define MAX_NUM_MIDS 32 |
| 30 | 43 | ||
| 31 | /** | 44 | /** |
| 32 | * struct msm_iommu_dev - a single IOMMU hardware instance | 45 | * struct msm_iommu_dev - a single IOMMU hardware instance |
