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-rw-r--r--arch/arm/mach-at91/Kconfig453
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt399
-rw-r--r--arch/arm/mach-at91/Makefile11
-rw-r--r--arch/arm/mach-at91/at91rm9200.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c2
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c2
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c2
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c2
-rw-r--r--arch/arm/mach-at91/board-dt-rm9200.c (renamed from arch/arm/mach-at91/board-rm9200-dt.c)0
-rw-r--r--arch/arm/mach-at91/board-dt-sam9.c (renamed from arch/arm/mach-at91/board-dt.c)0
-rw-r--r--arch/arm/mach-at91/board-dt-sama5.c86
-rw-r--r--arch/arm/mach-at91/clock.c109
-rw-r--r--arch/arm/mach-at91/clock.h2
-rw-r--r--arch/arm/mach-at91/cpuidle.c2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h18
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h29
-rw-r--r--arch/arm/mach-at91/include/mach/sama5d3.h73
-rw-r--r--arch/arm/mach-at91/pm.c2
-rw-r--r--arch/arm/mach-at91/pm.h30
-rw-r--r--arch/arm/mach-at91/sama5d3.c377
-rw-r--r--arch/arm/mach-at91/setup.c49
-rw-r--r--arch/arm/mach-at91/soc.h7
25 files changed, 1208 insertions, 455 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 6071f4c3d654..02802386b894 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,14 +1,15 @@
1if ARCH_AT91 1if ARCH_AT91
2 2
3config HAVE_AT91_DATAFLASH_CARD
4 bool
5
6config HAVE_AT91_DBGU0 3config HAVE_AT91_DBGU0
7 bool 4 bool
8 5
9config HAVE_AT91_DBGU1 6config HAVE_AT91_DBGU1
10 bool 7 bool
11 8
9config AT91_PMC_UNIT
10 bool
11 default !ARCH_AT91X40
12
12config AT91_SAM9_ALT_RESET 13config AT91_SAM9_ALT_RESET
13 bool 14 bool
14 default !ARCH_AT91X40 15 default !ARCH_AT91X40
@@ -17,17 +18,59 @@ config AT91_SAM9G45_RESET
17 bool 18 bool
18 default !ARCH_AT91X40 19 default !ARCH_AT91X40
19 20
21config AT91_SAM9_TIME
22 bool
23
20config SOC_AT91SAM9 24config SOC_AT91SAM9
21 bool 25 bool
26 select AT91_SAM9_TIME
22 select CPU_ARM926T 27 select CPU_ARM926T
23 select GENERIC_CLOCKEVENTS 28 select GENERIC_CLOCKEVENTS
24 select MULTI_IRQ_HANDLER 29 select MULTI_IRQ_HANDLER
25 select SPARSE_IRQ 30 select SPARSE_IRQ
26 31
32config SOC_SAMA5
33 bool
34 select AT91_SAM9_TIME
35 select CPU_V7
36 select GENERIC_CLOCKEVENTS
37 select MULTI_IRQ_HANDLER
38 select SPARSE_IRQ
39
27menu "Atmel AT91 System-on-Chip" 40menu "Atmel AT91 System-on-Chip"
28 41
42choice
43
44 prompt "Core type"
45
46config SOC_SAM_V4_V5
47 bool "ARM7/ARM9"
48 help
49 Select this if you are using one of Atmel's AT91SAM9, AT91RM9200
50 or AT91X40 SoC.
51
52config SOC_SAM_V7
53 bool "Cortex A5"
54 help
55 Select this if you are using one of Atmel's SAMA5D3 SoC.
56
57endchoice
58
29comment "Atmel AT91 Processor" 59comment "Atmel AT91 Processor"
30 60
61if SOC_SAM_V7
62config SOC_SAMA5D3
63 bool "SAMA5D3 family"
64 depends on SOC_SAM_V7
65 select SOC_SAMA5
66 select HAVE_FB_ATMEL
67 select HAVE_AT91_DBGU1
68 help
69 Select this if you are using one of Atmel's SAMA5D3 family SoC.
70 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
71endif
72
73if SOC_SAM_V4_V5
31config SOC_AT91RM9200 74config SOC_AT91RM9200
32 bool "AT91RM9200" 75 bool "AT91RM9200"
33 select CPU_ARM920T 76 select CPU_ARM920T
@@ -93,394 +136,10 @@ config SOC_AT91SAM9N12
93 help 136 help
94 Select this if you are using Atmel's AT91SAM9N12 SoC. 137 Select this if you are using Atmel's AT91SAM9N12 SoC.
95 138
96choice
97 prompt "Atmel AT91 Processor Devices for non DT boards"
98
99config ARCH_AT91_NONE
100 bool "None"
101
102config ARCH_AT91RM9200
103 bool "AT91RM9200"
104 select SOC_AT91RM9200
105
106config ARCH_AT91SAM9260
107 bool "AT91SAM9260 or AT91SAM9XE"
108 select SOC_AT91SAM9260
109
110config ARCH_AT91SAM9261
111 bool "AT91SAM9261"
112 select SOC_AT91SAM9261
113
114config ARCH_AT91SAM9G10
115 bool "AT91SAM9G10"
116 select SOC_AT91SAM9261
117
118config ARCH_AT91SAM9263
119 bool "AT91SAM9263"
120 select SOC_AT91SAM9263
121
122config ARCH_AT91SAM9RL
123 bool "AT91SAM9RL"
124 select SOC_AT91SAM9RL
125
126config ARCH_AT91SAM9G20
127 bool "AT91SAM9G20"
128 select SOC_AT91SAM9260
129
130config ARCH_AT91SAM9G45
131 bool "AT91SAM9G45"
132 select SOC_AT91SAM9G45
133
134config ARCH_AT91X40
135 bool "AT91x40"
136 depends on !MMU
137 select ARCH_USES_GETTIMEOFFSET
138 select MULTI_IRQ_HANDLER
139 select SPARSE_IRQ
140
141endchoice
142
143config AT91_PMC_UNIT
144 bool
145 default !ARCH_AT91X40
146
147# ----------------------------------------------------------
148
149if ARCH_AT91RM9200
150
151comment "AT91RM9200 Board Type"
152
153config MACH_ONEARM
154 bool "Ajeco 1ARM Single Board Computer"
155 help
156 Select this if you are using Ajeco's 1ARM Single Board Computer.
157 <http://www.ajeco.fi/>
158
159config ARCH_AT91RM9200DK
160 bool "Atmel AT91RM9200-DK Development board"
161 select HAVE_AT91_DATAFLASH_CARD
162 help
163 Select this if you are using Atmel's AT91RM9200-DK Development board.
164 (Discontinued)
165
166config MACH_AT91RM9200EK
167 bool "Atmel AT91RM9200-EK Evaluation Kit"
168 select HAVE_AT91_DATAFLASH_CARD
169 help
170 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
171 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
172
173config MACH_CSB337
174 bool "Cogent CSB337"
175 help
176 Select this if you are using Cogent's CSB337 board.
177 <http://www.cogcomp.com/csb_csb337.htm>
178
179config MACH_CSB637
180 bool "Cogent CSB637"
181 help
182 Select this if you are using Cogent's CSB637 board.
183 <http://www.cogcomp.com/csb_csb637.htm>
184
185config MACH_CARMEVA
186 bool "Conitec ARM&EVA"
187 help
188 Select this if you are using Conitec's AT91RM9200-MCU-Module.
189 <http://www.conitec.net/english/linuxboard.php>
190
191config MACH_ATEB9200
192 bool "Embest ATEB9200"
193 help
194 Select this if you are using Embest's ATEB9200 board.
195 <http://www.embedinfo.com/english/product/ATEB9200.asp>
196
197config MACH_KB9200
198 bool "KwikByte KB920x"
199 help
200 Select this if you are using KwikByte's KB920x board.
201 <http://www.kwikbyte.com/KB9202.html>
202
203config MACH_PICOTUX2XX
204 bool "picotux 200"
205 help
206 Select this if you are using a picotux 200.
207 <http://www.picotux.com/>
208
209config MACH_KAFA
210 bool "Sperry-Sun KAFA board"
211 help
212 Select this if you are using Sperry-Sun's KAFA board.
213
214config MACH_ECBAT91
215 bool "emQbit ECB_AT91 SBC"
216 select HAVE_AT91_DATAFLASH_CARD
217 help
218 Select this if you are using emQbit's ECB_AT91 board.
219 <http://wiki.emqbit.com/free-ecb-at91>
220
221config MACH_YL9200
222 bool "ucDragon YL-9200"
223 help
224 Select this if you are using the ucDragon YL-9200 board.
225
226config MACH_CPUAT91
227 bool "Eukrea CPUAT91"
228 help
229 Select this if you are using the Eukrea Electromatique's
230 CPUAT91 board <http://www.eukrea.com/>.
231
232config MACH_ECO920
233 bool "eco920"
234 help
235 Select this if you are using the eco920 board
236
237config MACH_RSI_EWS
238 bool "RSI Embedded Webserver"
239 depends on ARCH_AT91RM9200
240 help
241 Select this if you are using RSIs EWS board.
242endif
243
244# ----------------------------------------------------------
245
246if ARCH_AT91SAM9260
247
248comment "AT91SAM9260 Variants"
249
250comment "AT91SAM9260 / AT91SAM9XE Board Type"
251
252config MACH_AT91SAM9260EK
253 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
254 select HAVE_AT91_DATAFLASH_CARD
255 help
256 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
257 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
258
259config MACH_CAM60
260 bool "KwikByte KB9260 (CAM60) board"
261 help
262 Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
263 <http://www.kwikbyte.com/KB9260.html>
264
265config MACH_SAM9_L9260
266 bool "Olimex SAM9-L9260 board"
267 select HAVE_AT91_DATAFLASH_CARD
268 help
269 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
270 <http://www.olimex.com/dev/sam9-L9260.html>
271
272config MACH_AFEB9260
273 bool "Custom afeb9260 board v1"
274 help
275 Select this if you are using custom afeb9260 board based on
276 open hardware design. Select this for revision 1 of the board.
277 <svn://194.85.238.22/home/users/george/svn/arm9eb>
278 <http://groups.google.com/group/arm9fpga-evolution-board>
279
280config MACH_USB_A9260
281 bool "CALAO USB-A9260"
282 help
283 Select this if you are using a Calao Systems USB-A9260.
284 <http://www.calao-systems.com>
285
286config MACH_QIL_A9260
287 bool "CALAO QIL-A9260 board"
288 help
289 Select this if you are using a Calao Systems QIL-A9260 Board.
290 <http://www.calao-systems.com>
291
292config MACH_CPU9260
293 bool "Eukrea CPU9260 board"
294 help
295 Select this if you are using a Eukrea Electromatique's
296 CPU9260 Board <http://www.eukrea.com/>
297
298config MACH_FLEXIBITY
299 bool "Flexibity Connect board"
300 help
301 Select this if you are using Flexibity Connect board
302 <http://www.flexibity.com>
303
304endif
305
306# ----------------------------------------------------------
307
308if ARCH_AT91SAM9261
309
310comment "AT91SAM9261 Board Type"
311
312config MACH_AT91SAM9261EK
313 bool "Atmel AT91SAM9261-EK Evaluation Kit"
314 select HAVE_AT91_DATAFLASH_CARD
315 help
316 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
317 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
318
319endif
320
321# ----------------------------------------------------------
322
323if ARCH_AT91SAM9G10
324
325comment "AT91SAM9G10 Board Type"
326
327config MACH_AT91SAM9G10EK
328 bool "Atmel AT91SAM9G10-EK Evaluation Kit"
329 select HAVE_AT91_DATAFLASH_CARD
330 help
331 Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
332 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
333
334endif
335
336# ----------------------------------------------------------
337
338if ARCH_AT91SAM9263
339
340comment "AT91SAM9263 Board Type"
341
342config MACH_AT91SAM9263EK
343 bool "Atmel AT91SAM9263-EK Evaluation Kit"
344 select HAVE_AT91_DATAFLASH_CARD
345 help
346 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
347 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
348
349config MACH_USB_A9263
350 bool "CALAO USB-A9263"
351 help
352 Select this if you are using a Calao Systems USB-A9263.
353 <http://www.calao-systems.com>
354
355endif
356
357# ----------------------------------------------------------
358
359if ARCH_AT91SAM9RL
360
361comment "AT91SAM9RL Board Type"
362
363config MACH_AT91SAM9RLEK
364 bool "Atmel AT91SAM9RL-EK Evaluation Kit"
365 help
366 Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
367
368endif
369
370# ---------------------------------------------------------- 139# ----------------------------------------------------------
371 140
372if ARCH_AT91SAM9G20 141source arch/arm/mach-at91/Kconfig.non_dt
373 142endif # SOC_SAM_V4_V5
374comment "AT91SAM9G20 Board Type"
375
376config MACH_AT91SAM9G20EK
377 bool "Atmel AT91SAM9G20-EK Evaluation Kit"
378 select HAVE_AT91_DATAFLASH_CARD
379 help
380 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
381 that embeds only one SD/MMC slot.
382
383config MACH_AT91SAM9G20EK_2MMC
384 depends on MACH_AT91SAM9G20EK
385 bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
386 help
387 Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
388 with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
389 onwards.
390 <http://www.atmel.com/tools/SAM9G20-EK.aspx>
391
392config MACH_CPU9G20
393 bool "Eukrea CPU9G20 board"
394 help
395 Select this if you are using a Eukrea Electromatique's
396 CPU9G20 Board <http://www.eukrea.com/>
397
398config MACH_ACMENETUSFOXG20
399 bool "Acme Systems srl FOX Board G20"
400 help
401 Select this if you are using Acme Systems
402 FOX Board G20 <http://www.acmesystems.it>
403
404config MACH_PORTUXG20
405 bool "taskit PortuxG20"
406 help
407 Select this if you are using taskit's PortuxG20.
408 <http://www.taskit.de/en/>
409
410config MACH_STAMP9G20
411 bool "taskit Stamp9G20 CPU module"
412 help
413 Select this if you are using taskit's Stamp9G20 CPU module on its
414 evaluation board.
415 <http://www.taskit.de/en/>
416
417config MACH_PCONTROL_G20
418 bool "PControl G20 CPU module"
419 help
420 Select this if you are using taskit's Stamp9G20 CPU module on this
421 carrier board, beeing the decentralized unit of a building automation
422 system; featuring nvram, eth-switch, iso-rs485, display, io
423
424config MACH_GSIA18S
425 bool "GS_IA18_S board"
426 help
427 This enables support for the GS_IA18_S board
428 produced by GeoSIG Ltd company. This is an internet accelerograph.
429 <http://www.geosig.com>
430
431config MACH_USB_A9G20
432 bool "CALAO USB-A9G20"
433 depends on ARCH_AT91SAM9G20
434 help
435 Select this if you are using a Calao Systems USB-A9G20.
436 <http://www.calao-systems.com>
437
438endif
439
440if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
441comment "AT91SAM9260/AT91SAM9G20 boards"
442
443config MACH_SNAPPER_9260
444 bool "Bluewater Systems Snapper 9260/9G20 module"
445 help
446 Select this if you are using the Bluewater Systems Snapper 9260 or
447 Snapper 9G20 modules.
448 <http://www.bluewatersys.com/>
449endif
450
451# ----------------------------------------------------------
452
453if ARCH_AT91SAM9G45
454
455comment "AT91SAM9G45 Board Type"
456
457config MACH_AT91SAM9M10G45EK
458 bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
459 help
460 Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
461 Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
462 families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
463 <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
464
465endif
466
467# ----------------------------------------------------------
468
469if ARCH_AT91X40
470
471comment "AT91X40 Board Type"
472
473config MACH_AT91EB01
474 bool "Atmel AT91EB01 Evaluation Kit"
475 help
476 Select this if you are using Atmel's AT91EB01 Evaluation Kit.
477 It is also a popular target for simulators such as GDB's
478 ARM simulator (commonly known as the ARMulator) and the
479 Skyeye simulator.
480
481endif
482
483# ----------------------------------------------------------
484 143
485comment "Generic Board Type" 144comment "Generic Board Type"
486 145
@@ -492,7 +151,7 @@ config MACH_AT91RM9200_DT
492 Select this if you want to experiment device-tree with 151 Select this if you want to experiment device-tree with
493 an Atmel RM9200 Evaluation Kit. 152 an Atmel RM9200 Evaluation Kit.
494 153
495config MACH_AT91SAM_DT 154config MACH_AT91SAM9_DT
496 bool "Atmel AT91SAM Evaluation Kits with device-tree support" 155 bool "Atmel AT91SAM Evaluation Kits with device-tree support"
497 depends on SOC_AT91SAM9 156 depends on SOC_AT91SAM9
498 select USE_OF 157 select USE_OF
@@ -500,15 +159,13 @@ config MACH_AT91SAM_DT
500 Select this if you want to experiment device-tree with 159 Select this if you want to experiment device-tree with
501 an Atmel Evaluation Kit. 160 an Atmel Evaluation Kit.
502 161
503# ---------------------------------------------------------- 162config MACH_SAMA5_DT
504 163 bool "Atmel SAMA5 Evaluation Kits with device-tree support"
505comment "AT91 Board Options" 164 depends on SOC_SAMA5
506 165 select USE_OF
507config MTD_AT91_DATAFLASH_CARD
508 bool "Enable DataFlash Card support"
509 depends on HAVE_AT91_DATAFLASH_CARD
510 help 166 help
511 Enable support for the DataFlash card. 167 Select this if you want to experiment device-tree with
168 an Atmel Evaluation Kit.
512 169
513# ---------------------------------------------------------- 170# ----------------------------------------------------------
514 171
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
new file mode 100644
index 000000000000..6c24985515a2
--- /dev/null
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -0,0 +1,399 @@
1menu "Atmel Non-DT world"
2
3config HAVE_AT91_DATAFLASH_CARD
4 bool
5
6choice
7 prompt "Atmel AT91 Processor Devices for non DT boards"
8
9config ARCH_AT91_NONE
10 bool "None"
11
12config ARCH_AT91RM9200
13 bool "AT91RM9200"
14 select SOC_AT91RM9200
15
16config ARCH_AT91SAM9260
17 bool "AT91SAM9260 or AT91SAM9XE"
18 select SOC_AT91SAM9260
19
20config ARCH_AT91SAM9261
21 bool "AT91SAM9261"
22 select SOC_AT91SAM9261
23
24config ARCH_AT91SAM9G10
25 bool "AT91SAM9G10"
26 select SOC_AT91SAM9261
27
28config ARCH_AT91SAM9263
29 bool "AT91SAM9263"
30 select SOC_AT91SAM9263
31
32config ARCH_AT91SAM9RL
33 bool "AT91SAM9RL"
34 select SOC_AT91SAM9RL
35
36config ARCH_AT91SAM9G20
37 bool "AT91SAM9G20"
38 select SOC_AT91SAM9260
39
40config ARCH_AT91SAM9G45
41 bool "AT91SAM9G45"
42 select SOC_AT91SAM9G45
43
44config ARCH_AT91X40
45 bool "AT91x40"
46 depends on !MMU
47 select ARCH_USES_GETTIMEOFFSET
48 select MULTI_IRQ_HANDLER
49 select SPARSE_IRQ
50
51endchoice
52
53# ----------------------------------------------------------
54
55if ARCH_AT91RM9200
56
57comment "AT91RM9200 Board Type"
58
59config MACH_ONEARM
60 bool "Ajeco 1ARM Single Board Computer"
61 help
62 Select this if you are using Ajeco's 1ARM Single Board Computer.
63 <http://www.ajeco.fi/>
64
65config ARCH_AT91RM9200DK
66 bool "Atmel AT91RM9200-DK Development board"
67 select HAVE_AT91_DATAFLASH_CARD
68 help
69 Select this if you are using Atmel's AT91RM9200-DK Development board.
70 (Discontinued)
71
72config MACH_AT91RM9200EK
73 bool "Atmel AT91RM9200-EK Evaluation Kit"
74 select HAVE_AT91_DATAFLASH_CARD
75 help
76 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
77 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
78
79config MACH_CSB337
80 bool "Cogent CSB337"
81 help
82 Select this if you are using Cogent's CSB337 board.
83 <http://www.cogcomp.com/csb_csb337.htm>
84
85config MACH_CSB637
86 bool "Cogent CSB637"
87 help
88 Select this if you are using Cogent's CSB637 board.
89 <http://www.cogcomp.com/csb_csb637.htm>
90
91config MACH_CARMEVA
92 bool "Conitec ARM&EVA"
93 help
94 Select this if you are using Conitec's AT91RM9200-MCU-Module.
95 <http://www.conitec.net/english/linuxboard.php>
96
97config MACH_ATEB9200
98 bool "Embest ATEB9200"
99 help
100 Select this if you are using Embest's ATEB9200 board.
101 <http://www.embedinfo.com/english/product/ATEB9200.asp>
102
103config MACH_KB9200
104 bool "KwikByte KB920x"
105 help
106 Select this if you are using KwikByte's KB920x board.
107 <http://www.kwikbyte.com/KB9202.html>
108
109config MACH_PICOTUX2XX
110 bool "picotux 200"
111 help
112 Select this if you are using a picotux 200.
113 <http://www.picotux.com/>
114
115config MACH_KAFA
116 bool "Sperry-Sun KAFA board"
117 help
118 Select this if you are using Sperry-Sun's KAFA board.
119
120config MACH_ECBAT91
121 bool "emQbit ECB_AT91 SBC"
122 select HAVE_AT91_DATAFLASH_CARD
123 help
124 Select this if you are using emQbit's ECB_AT91 board.
125 <http://wiki.emqbit.com/free-ecb-at91>
126
127config MACH_YL9200
128 bool "ucDragon YL-9200"
129 help
130 Select this if you are using the ucDragon YL-9200 board.
131
132config MACH_CPUAT91
133 bool "Eukrea CPUAT91"
134 help
135 Select this if you are using the Eukrea Electromatique's
136 CPUAT91 board <http://www.eukrea.com/>.
137
138config MACH_ECO920
139 bool "eco920"
140 help
141 Select this if you are using the eco920 board
142
143config MACH_RSI_EWS
144 bool "RSI Embedded Webserver"
145 depends on ARCH_AT91RM9200
146 help
147 Select this if you are using RSIs EWS board.
148endif
149
150# ----------------------------------------------------------
151
152if ARCH_AT91SAM9260
153
154comment "AT91SAM9260 Variants"
155
156comment "AT91SAM9260 / AT91SAM9XE Board Type"
157
158config MACH_AT91SAM9260EK
159 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
160 select HAVE_AT91_DATAFLASH_CARD
161 help
162 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
163 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
164
165config MACH_CAM60
166 bool "KwikByte KB9260 (CAM60) board"
167 help
168 Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
169 <http://www.kwikbyte.com/KB9260.html>
170
171config MACH_SAM9_L9260
172 bool "Olimex SAM9-L9260 board"
173 select HAVE_AT91_DATAFLASH_CARD
174 help
175 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
176 <http://www.olimex.com/dev/sam9-L9260.html>
177
178config MACH_AFEB9260
179 bool "Custom afeb9260 board v1"
180 help
181 Select this if you are using custom afeb9260 board based on
182 open hardware design. Select this for revision 1 of the board.
183 <svn://194.85.238.22/home/users/george/svn/arm9eb>
184 <http://groups.google.com/group/arm9fpga-evolution-board>
185
186config MACH_USB_A9260
187 bool "CALAO USB-A9260"
188 help
189 Select this if you are using a Calao Systems USB-A9260.
190 <http://www.calao-systems.com>
191
192config MACH_QIL_A9260
193 bool "CALAO QIL-A9260 board"
194 help
195 Select this if you are using a Calao Systems QIL-A9260 Board.
196 <http://www.calao-systems.com>
197
198config MACH_CPU9260
199 bool "Eukrea CPU9260 board"
200 help
201 Select this if you are using a Eukrea Electromatique's
202 CPU9260 Board <http://www.eukrea.com/>
203
204config MACH_FLEXIBITY
205 bool "Flexibity Connect board"
206 help
207 Select this if you are using Flexibity Connect board
208 <http://www.flexibity.com>
209
210endif
211
212# ----------------------------------------------------------
213
214if ARCH_AT91SAM9261
215
216comment "AT91SAM9261 Board Type"
217
218config MACH_AT91SAM9261EK
219 bool "Atmel AT91SAM9261-EK Evaluation Kit"
220 select HAVE_AT91_DATAFLASH_CARD
221 help
222 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
223 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
224
225endif
226
227# ----------------------------------------------------------
228
229if ARCH_AT91SAM9G10
230
231comment "AT91SAM9G10 Board Type"
232
233config MACH_AT91SAM9G10EK
234 bool "Atmel AT91SAM9G10-EK Evaluation Kit"
235 select HAVE_AT91_DATAFLASH_CARD
236 help
237 Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
238 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
239
240endif
241
242# ----------------------------------------------------------
243
244if ARCH_AT91SAM9263
245
246comment "AT91SAM9263 Board Type"
247
248config MACH_AT91SAM9263EK
249 bool "Atmel AT91SAM9263-EK Evaluation Kit"
250 select HAVE_AT91_DATAFLASH_CARD
251 help
252 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
253 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
254
255config MACH_USB_A9263
256 bool "CALAO USB-A9263"
257 help
258 Select this if you are using a Calao Systems USB-A9263.
259 <http://www.calao-systems.com>
260
261endif
262
263# ----------------------------------------------------------
264
265if ARCH_AT91SAM9RL
266
267comment "AT91SAM9RL Board Type"
268
269config MACH_AT91SAM9RLEK
270 bool "Atmel AT91SAM9RL-EK Evaluation Kit"
271 help
272 Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
273
274endif
275
276# ----------------------------------------------------------
277
278if ARCH_AT91SAM9G20
279
280comment "AT91SAM9G20 Board Type"
281
282config MACH_AT91SAM9G20EK
283 bool "Atmel AT91SAM9G20-EK Evaluation Kit"
284 select HAVE_AT91_DATAFLASH_CARD
285 help
286 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
287 that embeds only one SD/MMC slot.
288
289config MACH_AT91SAM9G20EK_2MMC
290 depends on MACH_AT91SAM9G20EK
291 bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
292 help
293 Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
294 with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
295 onwards.
296 <http://www.atmel.com/tools/SAM9G20-EK.aspx>
297
298config MACH_CPU9G20
299 bool "Eukrea CPU9G20 board"
300 help
301 Select this if you are using a Eukrea Electromatique's
302 CPU9G20 Board <http://www.eukrea.com/>
303
304config MACH_ACMENETUSFOXG20
305 bool "Acme Systems srl FOX Board G20"
306 help
307 Select this if you are using Acme Systems
308 FOX Board G20 <http://www.acmesystems.it>
309
310config MACH_PORTUXG20
311 bool "taskit PortuxG20"
312 help
313 Select this if you are using taskit's PortuxG20.
314 <http://www.taskit.de/en/>
315
316config MACH_STAMP9G20
317 bool "taskit Stamp9G20 CPU module"
318 help
319 Select this if you are using taskit's Stamp9G20 CPU module on its
320 evaluation board.
321 <http://www.taskit.de/en/>
322
323config MACH_PCONTROL_G20
324 bool "PControl G20 CPU module"
325 help
326 Select this if you are using taskit's Stamp9G20 CPU module on this
327 carrier board, beeing the decentralized unit of a building automation
328 system; featuring nvram, eth-switch, iso-rs485, display, io
329
330config MACH_GSIA18S
331 bool "GS_IA18_S board"
332 help
333 This enables support for the GS_IA18_S board
334 produced by GeoSIG Ltd company. This is an internet accelerograph.
335 <http://www.geosig.com>
336
337config MACH_USB_A9G20
338 bool "CALAO USB-A9G20"
339 depends on ARCH_AT91SAM9G20
340 help
341 Select this if you are using a Calao Systems USB-A9G20.
342 <http://www.calao-systems.com>
343
344endif
345
346if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
347comment "AT91SAM9260/AT91SAM9G20 boards"
348
349config MACH_SNAPPER_9260
350 bool "Bluewater Systems Snapper 9260/9G20 module"
351 help
352 Select this if you are using the Bluewater Systems Snapper 9260 or
353 Snapper 9G20 modules.
354 <http://www.bluewatersys.com/>
355endif
356
357# ----------------------------------------------------------
358
359if ARCH_AT91SAM9G45
360
361comment "AT91SAM9G45 Board Type"
362
363config MACH_AT91SAM9M10G45EK
364 bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
365 help
366 Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
367 Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
368 families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
369 <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
370
371endif
372
373# ----------------------------------------------------------
374
375if ARCH_AT91X40
376
377comment "AT91X40 Board Type"
378
379config MACH_AT91EB01
380 bool "Atmel AT91EB01 Evaluation Kit"
381 help
382 Select this if you are using Atmel's AT91EB01 Evaluation Kit.
383 It is also a popular target for simulators such as GDB's
384 ARM simulator (commonly known as the ARMulator) and the
385 Skyeye simulator.
386
387endif
388
389# ----------------------------------------------------------
390
391comment "AT91 Board Options"
392
393config MTD_AT91_DATAFLASH_CARD
394 bool "Enable DataFlash Card support"
395 depends on HAVE_AT91_DATAFLASH_CARD
396 help
397 Enable support for the DataFlash card.
398
399endmenu
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 39218ca6d8e8..788562dccb43 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -10,7 +10,8 @@ obj- :=
10obj-$(CONFIG_AT91_PMC_UNIT) += clock.o 10obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
11obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o 11obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
12obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o 12obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
13obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o 13obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o
14obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
14 15
15# CPU-specific support 16# CPU-specific support
16obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o 17obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o
@@ -21,6 +22,7 @@ obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o
21obj-$(CONFIG_SOC_AT91SAM9N12) += at91sam9n12.o 22obj-$(CONFIG_SOC_AT91SAM9N12) += at91sam9n12.o
22obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o 23obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o
23obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o 24obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
25obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
24 26
25obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o 27obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
26obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o 28obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
@@ -87,8 +89,11 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
87obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o 89obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
88 90
89# AT91SAM board with device-tree 91# AT91SAM board with device-tree
90obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o 92obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
91obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o 93obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o
94
95# SAMA5 board with device-tree
96obj-$(CONFIG_MACH_SAMA5_DT) += board-dt-sama5.o
92 97
93# AT91X40 board-specific support 98# AT91X40 board-specific support
94obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o 99obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 9706c000f294..ccce7592dbd3 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -384,7 +384,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
384 0 /* Advanced Interrupt Controller (IRQ6) */ 384 0 /* Advanced Interrupt Controller (IRQ6) */
385}; 385};
386 386
387AT91_SOC_START(rm9200) 387AT91_SOC_START(at91rm9200)
388 .map_io = at91rm9200_map_io, 388 .map_io = at91rm9200_map_io,
389 .default_irq_priority = at91rm9200_default_irq_priority, 389 .default_irq_priority = at91rm9200_default_irq_priority,
390 .ioremap_registers = at91rm9200_ioremap_registers, 390 .ioremap_registers = at91rm9200_ioremap_registers,
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b67cd5374117..1833b4c365df 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -395,7 +395,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
395 0, /* Advanced Interrupt Controller */ 395 0, /* Advanced Interrupt Controller */
396}; 396};
397 397
398AT91_SOC_START(sam9260) 398AT91_SOC_START(at91sam9260)
399 .map_io = at91sam9260_map_io, 399 .map_io = at91sam9260_map_io,
400 .default_irq_priority = at91sam9260_default_irq_priority, 400 .default_irq_priority = at91sam9260_default_irq_priority,
401 .ioremap_registers = at91sam9260_ioremap_registers, 401 .ioremap_registers = at91sam9260_ioremap_registers,
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 0204f4cc9ebf..25efb5ac30f1 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -339,7 +339,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
339 0, /* Advanced Interrupt Controller */ 339 0, /* Advanced Interrupt Controller */
340}; 340};
341 341
342AT91_SOC_START(sam9261) 342AT91_SOC_START(at91sam9261)
343 .map_io = at91sam9261_map_io, 343 .map_io = at91sam9261_map_io,
344 .default_irq_priority = at91sam9261_default_irq_priority, 344 .default_irq_priority = at91sam9261_default_irq_priority,
345 .ioremap_registers = at91sam9261_ioremap_registers, 345 .ioremap_registers = at91sam9261_ioremap_registers,
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 2282fd7ad3e3..f44ffd2105a7 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -375,7 +375,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
375 0, /* Advanced Interrupt Controller (IRQ1) */ 375 0, /* Advanced Interrupt Controller (IRQ1) */
376}; 376};
377 377
378AT91_SOC_START(sam9263) 378AT91_SOC_START(at91sam9263)
379 .map_io = at91sam9263_map_io, 379 .map_io = at91sam9263_map_io,
380 .default_irq_priority = at91sam9263_default_irq_priority, 380 .default_irq_priority = at91sam9263_default_irq_priority,
381 .ioremap_registers = at91sam9263_ioremap_registers, 381 .ioremap_registers = at91sam9263_ioremap_registers,
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index c68960d82247..dc49c2c45d49 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -420,7 +420,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
420 0, /* Advanced Interrupt Controller (IRQ0) */ 420 0, /* Advanced Interrupt Controller (IRQ0) */
421}; 421};
422 422
423AT91_SOC_START(sam9g45) 423AT91_SOC_START(at91sam9g45)
424 .map_io = at91sam9g45_map_io, 424 .map_io = at91sam9g45_map_io,
425 .default_irq_priority = at91sam9g45_default_irq_priority, 425 .default_irq_priority = at91sam9g45_default_irq_priority,
426 .ioremap_registers = at91sam9g45_ioremap_registers, 426 .ioremap_registers = at91sam9g45_ioremap_registers,
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 5dfc8fd87103..2c7a2f4a7568 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -226,7 +226,7 @@ void __init at91sam9n12_initialize(void)
226 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0); 226 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
227} 227}
228 228
229AT91_SOC_START(sam9n12) 229AT91_SOC_START(at91sam9n12)
230 .map_io = at91sam9n12_map_io, 230 .map_io = at91sam9n12_map_io,
231 .register_clocks = at91sam9n12_register_clocks, 231 .register_clocks = at91sam9n12_register_clocks,
232 .init = at91sam9n12_initialize, 232 .init = at91sam9n12_initialize,
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 3de3e04d0f81..f77fae5591bc 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -341,7 +341,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
341 0, /* Advanced Interrupt Controller */ 341 0, /* Advanced Interrupt Controller */
342}; 342};
343 343
344AT91_SOC_START(sam9rl) 344AT91_SOC_START(at91sam9rl)
345 .map_io = at91sam9rl_map_io, 345 .map_io = at91sam9rl_map_io,
346 .default_irq_priority = at91sam9rl_default_irq_priority, 346 .default_irq_priority = at91sam9rl_default_irq_priority,
347 .ioremap_registers = at91sam9rl_ioremap_registers, 347 .ioremap_registers = at91sam9rl_ioremap_registers,
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 44a9a62dcc13..3a1a7993c125 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -320,7 +320,7 @@ static void __init at91sam9x5_map_io(void)
320 * Interrupt initialization 320 * Interrupt initialization
321 * -------------------------------------------------------------------- */ 321 * -------------------------------------------------------------------- */
322 322
323AT91_SOC_START(sam9x5) 323AT91_SOC_START(at91sam9x5)
324 .map_io = at91sam9x5_map_io, 324 .map_io = at91sam9x5_map_io,
325 .register_clocks = at91sam9x5_register_clocks, 325 .register_clocks = at91sam9x5_register_clocks,
326AT91_SOC_END 326AT91_SOC_END
diff --git a/arch/arm/mach-at91/board-rm9200-dt.c b/arch/arm/mach-at91/board-dt-rm9200.c
index 3fcb6623a33e..3fcb6623a33e 100644
--- a/arch/arm/mach-at91/board-rm9200-dt.c
+++ b/arch/arm/mach-at91/board-dt-rm9200.c
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt-sam9.c
index 8db30132abed..8db30132abed 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt-sam9.c
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
new file mode 100644
index 000000000000..705305e62bbc
--- /dev/null
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -0,0 +1,86 @@
1/*
2 * Setup code for SAMA5 Evaluation Kits with Device Tree support
3 *
4 * Copyright (C) 2013 Atmel,
5 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include <linux/types.h>
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/gpio.h>
14#include <linux/micrel_phy.h>
15#include <linux/of.h>
16#include <linux/of_irq.h>
17#include <linux/of_platform.h>
18#include <linux/phy.h>
19
20#include <asm/setup.h>
21#include <asm/irq.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/map.h>
24#include <asm/mach/irq.h>
25
26#include "at91_aic.h"
27#include "generic.h"
28
29
30static const struct of_device_id irq_of_match[] __initconst = {
31
32 { .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init },
33 { /*sentinel*/ }
34};
35
36static void __init at91_dt_init_irq(void)
37{
38 of_irq_init(irq_of_match);
39}
40
41static int ksz9021rn_phy_fixup(struct phy_device *phy)
42{
43 int value;
44
45#define GMII_RCCPSR 260
46#define GMII_RRDPSR 261
47#define GMII_ERCR 11
48#define GMII_ERDWR 12
49
50 /* Set delay values */
51 value = GMII_RCCPSR | 0x8000;
52 phy_write(phy, GMII_ERCR, value);
53 value = 0xF2F4;
54 phy_write(phy, GMII_ERDWR, value);
55 value = GMII_RRDPSR | 0x8000;
56 phy_write(phy, GMII_ERCR, value);
57 value = 0x2222;
58 phy_write(phy, GMII_ERDWR, value);
59
60 return 0;
61}
62
63static void __init sama5_dt_device_init(void)
64{
65 if (of_machine_is_compatible("atmel,sama5d3xcm"))
66 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
67 ksz9021rn_phy_fixup);
68
69 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
70}
71
72static const char *sama5_dt_board_compat[] __initdata = {
73 "atmel,sama5",
74 NULL
75};
76
77DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
78 /* Maintainer: Atmel */
79 .init_time = at91sam926x_pit_init,
80 .map_io = at91_map_io,
81 .handle_irq = at91_aic5_handle_irq,
82 .init_early = at91_dt_initialize,
83 .init_irq = at91_dt_init_irq,
84 .init_machine = sama5_dt_device_init,
85 .dt_compat = sama5_dt_board_compat,
86MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 33361505c0cd..da841885d01c 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -54,7 +54,10 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
54 */ 54 */
55#define cpu_has_utmi() ( cpu_is_at91sam9rl() \ 55#define cpu_has_utmi() ( cpu_is_at91sam9rl() \
56 || cpu_is_at91sam9g45() \ 56 || cpu_is_at91sam9g45() \
57 || cpu_is_at91sam9x5()) 57 || cpu_is_at91sam9x5() \
58 || cpu_is_sama5d3())
59
60#define cpu_has_1056M_plla() (cpu_is_sama5d3())
58 61
59#define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ 62#define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \
60 || cpu_is_at91sam9g45() \ 63 || cpu_is_at91sam9g45() \
@@ -75,7 +78,8 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
75 || cpu_is_at91sam9n12())) 78 || cpu_is_at91sam9n12()))
76 79
77#define cpu_has_upll() (cpu_is_at91sam9g45() \ 80#define cpu_has_upll() (cpu_is_at91sam9g45() \
78 || cpu_is_at91sam9x5()) 81 || cpu_is_at91sam9x5() \
82 || cpu_is_sama5d3())
79 83
80/* USB host HS & FS */ 84/* USB host HS & FS */
81#define cpu_has_uhp() (!cpu_is_at91sam9rl()) 85#define cpu_has_uhp() (!cpu_is_at91sam9rl())
@@ -83,18 +87,22 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
83/* USB device FS only */ 87/* USB device FS only */
84#define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \ 88#define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \
85 || cpu_is_at91sam9g45() \ 89 || cpu_is_at91sam9g45() \
86 || cpu_is_at91sam9x5())) 90 || cpu_is_at91sam9x5() \
91 || cpu_is_sama5d3()))
87 92
88#define cpu_has_plladiv2() (cpu_is_at91sam9g45() \ 93#define cpu_has_plladiv2() (cpu_is_at91sam9g45() \
89 || cpu_is_at91sam9x5() \ 94 || cpu_is_at91sam9x5() \
90 || cpu_is_at91sam9n12()) 95 || cpu_is_at91sam9n12() \
96 || cpu_is_sama5d3())
91 97
92#define cpu_has_mdiv3() (cpu_is_at91sam9g45() \ 98#define cpu_has_mdiv3() (cpu_is_at91sam9g45() \
93 || cpu_is_at91sam9x5() \ 99 || cpu_is_at91sam9x5() \
94 || cpu_is_at91sam9n12()) 100 || cpu_is_at91sam9n12() \
101 || cpu_is_sama5d3())
95 102
96#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5() \ 103#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5() \
97 || cpu_is_at91sam9n12()) 104 || cpu_is_at91sam9n12() \
105 || cpu_is_sama5d3())
98 106
99static LIST_HEAD(clocks); 107static LIST_HEAD(clocks);
100static DEFINE_SPINLOCK(clk_lock); 108static DEFINE_SPINLOCK(clk_lock);
@@ -210,10 +218,26 @@ struct clk mck = {
210 218
211static void pmc_periph_mode(struct clk *clk, int is_on) 219static void pmc_periph_mode(struct clk *clk, int is_on)
212{ 220{
213 if (is_on) 221 u32 regval = 0;
214 at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask); 222
215 else 223 /*
216 at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask); 224 * With sama5d3 devices, we are managing clock division so we have to
225 * use the Peripheral Control Register introduced from at91sam9x5
226 * devices.
227 */
228 if (cpu_is_sama5d3()) {
229 regval |= AT91_PMC_PCR_CMD; /* write command */
230 regval |= clk->pid & AT91_PMC_PCR_PID; /* peripheral selection */
231 regval |= AT91_PMC_PCR_DIV(clk->div);
232 if (is_on)
233 regval |= AT91_PMC_PCR_EN; /* enable clock */
234 at91_pmc_write(AT91_PMC_PCR, regval);
235 } else {
236 if (is_on)
237 at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask);
238 else
239 at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask);
240 }
217} 241}
218 242
219static struct clk __init *at91_css_to_clk(unsigned long css) 243static struct clk __init *at91_css_to_clk(unsigned long css)
@@ -443,14 +467,18 @@ static void __init init_programmable_clock(struct clk *clk)
443 467
444static int at91_clk_show(struct seq_file *s, void *unused) 468static int at91_clk_show(struct seq_file *s, void *unused)
445{ 469{
446 u32 scsr, pcsr, uckr = 0, sr; 470 u32 scsr, pcsr, pcsr1 = 0, uckr = 0, sr;
447 struct clk *clk; 471 struct clk *clk;
448 472
449 scsr = at91_pmc_read(AT91_PMC_SCSR); 473 scsr = at91_pmc_read(AT91_PMC_SCSR);
450 pcsr = at91_pmc_read(AT91_PMC_PCSR); 474 pcsr = at91_pmc_read(AT91_PMC_PCSR);
475 if (cpu_is_sama5d3())
476 pcsr1 = at91_pmc_read(AT91_PMC_PCSR1);
451 sr = at91_pmc_read(AT91_PMC_SR); 477 sr = at91_pmc_read(AT91_PMC_SR);
452 seq_printf(s, "SCSR = %8x\n", scsr); 478 seq_printf(s, "SCSR = %8x\n", scsr);
453 seq_printf(s, "PCSR = %8x\n", pcsr); 479 seq_printf(s, "PCSR = %8x\n", pcsr);
480 if (cpu_is_sama5d3())
481 seq_printf(s, "PCSR1 = %8x\n", pcsr1);
454 seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR)); 482 seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR));
455 seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR)); 483 seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR));
456 seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR)); 484 seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR));
@@ -470,20 +498,30 @@ static int at91_clk_show(struct seq_file *s, void *unused)
470 list_for_each_entry(clk, &clocks, node) { 498 list_for_each_entry(clk, &clocks, node) {
471 char *state; 499 char *state;
472 500
473 if (clk->mode == pmc_sys_mode) 501 if (clk->mode == pmc_sys_mode) {
474 state = (scsr & clk->pmc_mask) ? "on" : "off"; 502 state = (scsr & clk->pmc_mask) ? "on" : "off";
475 else if (clk->mode == pmc_periph_mode) 503 } else if (clk->mode == pmc_periph_mode) {
476 state = (pcsr & clk->pmc_mask) ? "on" : "off"; 504 if (cpu_is_sama5d3()) {
477 else if (clk->mode == pmc_uckr_mode) 505 u32 pmc_mask = 1 << (clk->pid % 32);
506
507 if (clk->pid > 31)
508 state = (pcsr1 & pmc_mask) ? "on" : "off";
509 else
510 state = (pcsr & pmc_mask) ? "on" : "off";
511 } else {
512 state = (pcsr & clk->pmc_mask) ? "on" : "off";
513 }
514 } else if (clk->mode == pmc_uckr_mode) {
478 state = (uckr & clk->pmc_mask) ? "on" : "off"; 515 state = (uckr & clk->pmc_mask) ? "on" : "off";
479 else if (clk->pmc_mask) 516 } else if (clk->pmc_mask) {
480 state = (sr & clk->pmc_mask) ? "on" : "off"; 517 state = (sr & clk->pmc_mask) ? "on" : "off";
481 else if (clk == &clk32k || clk == &main_clk) 518 } else if (clk == &clk32k || clk == &main_clk) {
482 state = "on"; 519 state = "on";
483 else 520 } else {
484 state = ""; 521 state = "";
522 }
485 523
486 seq_printf(s, "%-10s users=%2d %-3s %9ld Hz %s\n", 524 seq_printf(s, "%-10s users=%2d %-3s %9lu Hz %s\n",
487 clk->name, clk->users, state, clk_get_rate(clk), 525 clk->name, clk->users, state, clk_get_rate(clk),
488 clk->parent ? clk->parent->name : ""); 526 clk->parent ? clk->parent->name : "");
489 } 527 }
@@ -530,6 +568,9 @@ int __init clk_register(struct clk *clk)
530 if (clk_is_peripheral(clk)) { 568 if (clk_is_peripheral(clk)) {
531 if (!clk->parent) 569 if (!clk->parent)
532 clk->parent = &mck; 570 clk->parent = &mck;
571 if (cpu_is_sama5d3())
572 clk->rate_hz = DIV_ROUND_UP(clk->parent->rate_hz,
573 1 << clk->div);
533 clk->mode = pmc_periph_mode; 574 clk->mode = pmc_periph_mode;
534 } 575 }
535 else if (clk_is_sys(clk)) { 576 else if (clk_is_sys(clk)) {
@@ -555,7 +596,11 @@ static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
555 unsigned mul, div; 596 unsigned mul, div;
556 597
557 div = reg & 0xff; 598 div = reg & 0xff;
558 mul = (reg >> 16) & 0x7ff; 599 if (cpu_is_sama5d3())
600 mul = AT91_PMC3_MUL_GET(reg);
601 else
602 mul = AT91_PMC_MUL_GET(reg);
603
559 if (div && mul) { 604 if (div && mul) {
560 freq /= div; 605 freq /= div;
561 freq *= mul + 1; 606 freq *= mul + 1;
@@ -706,12 +751,15 @@ static int __init at91_pmc_init(unsigned long main_clock)
706 751
707 /* report if PLLA is more than mildly overclocked */ 752 /* report if PLLA is more than mildly overclocked */
708 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR)); 753 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR));
709 if (cpu_has_300M_plla()) { 754 if (cpu_has_1056M_plla()) {
710 if (plla.rate_hz > 300000000) 755 if (plla.rate_hz > 1056000000)
711 pll_overclock = true; 756 pll_overclock = true;
712 } else if (cpu_has_800M_plla()) { 757 } else if (cpu_has_800M_plla()) {
713 if (plla.rate_hz > 800000000) 758 if (plla.rate_hz > 800000000)
714 pll_overclock = true; 759 pll_overclock = true;
760 } else if (cpu_has_300M_plla()) {
761 if (plla.rate_hz > 300000000)
762 pll_overclock = true;
715 } else if (cpu_has_240M_plla()) { 763 } else if (cpu_has_240M_plla()) {
716 if (plla.rate_hz > 240000000) 764 if (plla.rate_hz > 240000000)
717 pll_overclock = true; 765 pll_overclock = true;
@@ -872,6 +920,7 @@ int __init at91_clock_init(unsigned long main_clock)
872static int __init at91_clock_reset(void) 920static int __init at91_clock_reset(void)
873{ 921{
874 unsigned long pcdr = 0; 922 unsigned long pcdr = 0;
923 unsigned long pcdr1 = 0;
875 unsigned long scdr = 0; 924 unsigned long scdr = 0;
876 struct clk *clk; 925 struct clk *clk;
877 926
@@ -879,8 +928,17 @@ static int __init at91_clock_reset(void)
879 if (clk->users > 0) 928 if (clk->users > 0)
880 continue; 929 continue;
881 930
882 if (clk->mode == pmc_periph_mode) 931 if (clk->mode == pmc_periph_mode) {
883 pcdr |= clk->pmc_mask; 932 if (cpu_is_sama5d3()) {
933 u32 pmc_mask = 1 << (clk->pid % 32);
934
935 if (clk->pid > 31)
936 pcdr1 |= pmc_mask;
937 else
938 pcdr |= pmc_mask;
939 } else
940 pcdr |= clk->pmc_mask;
941 }
884 942
885 if (clk->mode == pmc_sys_mode) 943 if (clk->mode == pmc_sys_mode)
886 scdr |= clk->pmc_mask; 944 scdr |= clk->pmc_mask;
@@ -888,8 +946,9 @@ static int __init at91_clock_reset(void)
888 pr_debug("Clocks: disable unused %s\n", clk->name); 946 pr_debug("Clocks: disable unused %s\n", clk->name);
889 } 947 }
890 948
891 at91_pmc_write(AT91_PMC_PCDR, pcdr);
892 at91_pmc_write(AT91_PMC_SCDR, scdr); 949 at91_pmc_write(AT91_PMC_SCDR, scdr);
950 if (cpu_is_sama5d3())
951 at91_pmc_write(AT91_PMC_PCDR1, pcdr1);
893 952
894 return 0; 953 return 0;
895} 954}
diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h
index c2e63e47dcbe..a98a39bbd883 100644
--- a/arch/arm/mach-at91/clock.h
+++ b/arch/arm/mach-at91/clock.h
@@ -20,7 +20,9 @@ struct clk {
20 const char *name; /* unique clock name */ 20 const char *name; /* unique clock name */
21 struct clk_lookup cl; 21 struct clk_lookup cl;
22 unsigned long rate_hz; 22 unsigned long rate_hz;
23 unsigned div; /* parent clock divider */
23 struct clk *parent; 24 struct clk *parent;
25 unsigned pid; /* peripheral ID */
24 u32 pmc_mask; 26 u32 pmc_mask;
25 void (*mode)(struct clk *, int); 27 void (*mode)(struct clk *, int);
26 unsigned id:3; /* PCK0..4, or 32k/main/a/b */ 28 unsigned id:3; /* PCK0..4, or 32k/main/a/b */
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index 0c6381516a5a..4c6794603780 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -38,6 +38,8 @@ static int at91_enter_idle(struct cpuidle_device *dev,
38 at91rm9200_standby(); 38 at91rm9200_standby();
39 else if (cpu_is_at91sam9g45()) 39 else if (cpu_is_at91sam9g45())
40 at91sam9g45_standby(); 40 at91sam9g45_standby();
41 else if (cpu_is_at91sam9263())
42 at91sam9263_standby();
41 else 43 else
42 at91sam9_standby(); 44 at91sam9_standby();
43 45
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index ea2c57a86ca6..31df12029c4e 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -75,6 +75,9 @@ extern void __iomem *at91_pmc_base;
75#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ 75#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
76#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ 76#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
77#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ 77#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */
78#define AT91_PMC_MUL_GET(n) ((n) >> 16 & 0x7ff)
79#define AT91_PMC3_MUL (0x7f << 18) /* PLL Multiplier [SAMA5 only] */
80#define AT91_PMC3_MUL_GET(n) ((n) >> 18 & 0x7f)
78#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ 81#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */
79#define AT91_PMC_USBDIV_1 (0 << 28) 82#define AT91_PMC_USBDIV_1 (0 << 28)
80#define AT91_PMC_USBDIV_2 (1 << 28) 83#define AT91_PMC_USBDIV_2 (1 << 28)
@@ -167,11 +170,18 @@ extern void __iomem *at91_pmc_base;
167#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */ 170#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */
168#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */ 171#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */
169 172
170#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9] */ 173#define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/
174#define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */
175#define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */
176
177#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */
171#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ 178#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */
172#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */ 179#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
173#define AT91_PMC_PCR_DIV (0x3 << 16) /* Divisor Value */ 180#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
174#define AT91_PMC_PCRDIV(n) (((n) << 16) & AT91_PMC_PCR_DIV) 181#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
182#define AT91_PMC_PCR_DIV2 0x2 /* Peripheral clock is MCK/2 */
183#define AT91_PMC_PCR_DIV4 0x4 /* Peripheral clock is MCK/4 */
184#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */
175#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ 185#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
176 186
177#endif 187#endif
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index b6504c19d55c..d3d7b993846b 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -36,6 +36,8 @@
36#define ARCH_ID_AT91M40807 0x14080745 36#define ARCH_ID_AT91M40807 0x14080745
37#define ARCH_ID_AT91R40008 0x44000840 37#define ARCH_ID_AT91R40008 0x44000840
38 38
39#define ARCH_ID_SAMA5D3 0x8A5C07C0
40
39#define ARCH_EXID_AT91SAM9M11 0x00000001 41#define ARCH_EXID_AT91SAM9M11 0x00000001
40#define ARCH_EXID_AT91SAM9M10 0x00000002 42#define ARCH_EXID_AT91SAM9M10 0x00000002
41#define ARCH_EXID_AT91SAM9G46 0x00000003 43#define ARCH_EXID_AT91SAM9G46 0x00000003
@@ -47,6 +49,11 @@
47#define ARCH_EXID_AT91SAM9G25 0x00000003 49#define ARCH_EXID_AT91SAM9G25 0x00000003
48#define ARCH_EXID_AT91SAM9X25 0x00000004 50#define ARCH_EXID_AT91SAM9X25 0x00000004
49 51
52#define ARCH_EXID_SAMA5D31 0x00444300
53#define ARCH_EXID_SAMA5D33 0x00414300
54#define ARCH_EXID_SAMA5D34 0x00414301
55#define ARCH_EXID_SAMA5D35 0x00584300
56
50#define ARCH_FAMILY_AT91X92 0x09200000 57#define ARCH_FAMILY_AT91X92 0x09200000
51#define ARCH_FAMILY_AT91SAM9 0x01900000 58#define ARCH_FAMILY_AT91SAM9 0x01900000
52#define ARCH_FAMILY_AT91SAM9XE 0x02900000 59#define ARCH_FAMILY_AT91SAM9XE 0x02900000
@@ -75,8 +82,11 @@ enum at91_soc_type {
75 /* SAM9N12 */ 82 /* SAM9N12 */
76 AT91_SOC_SAM9N12, 83 AT91_SOC_SAM9N12,
77 84
85 /* SAMA5D3 */
86 AT91_SOC_SAMA5D3,
87
78 /* Unknown type */ 88 /* Unknown type */
79 AT91_SOC_NONE 89 AT91_SOC_UNKNOWN,
80}; 90};
81 91
82enum at91_soc_subtype { 92enum at91_soc_subtype {
@@ -93,8 +103,15 @@ enum at91_soc_subtype {
93 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35, 103 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35,
94 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25, 104 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25,
95 105
106 /* SAMA5D3 */
107 AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
108 AT91_SOC_SAMA5D35,
109
110 /* No subtype for this SoC */
111 AT91_SOC_SUBTYPE_NONE,
112
96 /* Unknown subtype */ 113 /* Unknown subtype */
97 AT91_SOC_SUBTYPE_NONE 114 AT91_SOC_SUBTYPE_UNKNOWN,
98}; 115};
99 116
100struct at91_socinfo { 117struct at91_socinfo {
@@ -108,7 +125,7 @@ const char *at91_get_soc_subtype(struct at91_socinfo *c);
108 125
109static inline int at91_soc_is_detected(void) 126static inline int at91_soc_is_detected(void)
110{ 127{
111 return at91_soc_initdata.type != AT91_SOC_NONE; 128 return at91_soc_initdata.type != AT91_SOC_UNKNOWN;
112} 129}
113 130
114#ifdef CONFIG_SOC_AT91RM9200 131#ifdef CONFIG_SOC_AT91RM9200
@@ -187,6 +204,12 @@ static inline int at91_soc_is_detected(void)
187#define cpu_is_at91sam9n12() (0) 204#define cpu_is_at91sam9n12() (0)
188#endif 205#endif
189 206
207#ifdef CONFIG_SOC_SAMA5D3
208#define cpu_is_sama5d3() (at91_soc_initdata.type == AT91_SOC_SAMA5D3)
209#else
210#define cpu_is_sama5d3() (0)
211#endif
212
190/* 213/*
191 * Since this is ARM, we will never run on any AVR32 CPU. But these 214 * Since this is ARM, we will never run on any AVR32 CPU. But these
192 * definitions may reduce clutter in common drivers. 215 * definitions may reduce clutter in common drivers.
diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h
new file mode 100644
index 000000000000..6dc81ee38048
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama5d3.h
@@ -0,0 +1,73 @@
1/*
2 * Chip-specific header file for the SAMA5D3 family
3 *
4 * Copyright (C) 2013 Atmel,
5 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
6 *
7 * Common definitions.
8 * Based on SAMA5D3 datasheet.
9 *
10 * Licensed under GPLv2 or later.
11 */
12
13#ifndef SAMA5D3_H
14#define SAMA5D3_H
15
16/*
17 * Peripheral identifiers/interrupts.
18 */
19#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
20#define AT91_ID_SYS 1 /* System Peripherals */
21#define SAMA5D3_ID_DBGU 2 /* debug Unit (usually no special interrupt line) */
22#define AT91_ID_PIT 3 /* PIT */
23#define SAMA5D3_ID_WDT 4 /* Watchdog Timer Interrupt */
24#define SAMA5D3_ID_HSMC 5 /* Static Memory Controller */
25#define SAMA5D3_ID_PIOA 6 /* PIOA */
26#define SAMA5D3_ID_PIOB 7 /* PIOB */
27#define SAMA5D3_ID_PIOC 8 /* PIOC */
28#define SAMA5D3_ID_PIOD 9 /* PIOD */
29#define SAMA5D3_ID_PIOE 10 /* PIOE */
30#define SAMA5D3_ID_SMD 11 /* SMD Soft Modem */
31#define SAMA5D3_ID_USART0 12 /* USART0 */
32#define SAMA5D3_ID_USART1 13 /* USART1 */
33#define SAMA5D3_ID_USART2 14 /* USART2 */
34#define SAMA5D3_ID_USART3 15 /* USART3 */
35#define SAMA5D3_ID_UART0 16 /* UART 0 */
36#define SAMA5D3_ID_UART1 17 /* UART 1 */
37#define SAMA5D3_ID_TWI0 18 /* Two-Wire Interface 0 */
38#define SAMA5D3_ID_TWI1 19 /* Two-Wire Interface 1 */
39#define SAMA5D3_ID_TWI2 20 /* Two-Wire Interface 2 */
40#define SAMA5D3_ID_HSMCI0 21 /* MCI */
41#define SAMA5D3_ID_HSMCI1 22 /* MCI */
42#define SAMA5D3_ID_HSMCI2 23 /* MCI */
43#define SAMA5D3_ID_SPI0 24 /* Serial Peripheral Interface 0 */
44#define SAMA5D3_ID_SPI1 25 /* Serial Peripheral Interface 1 */
45#define SAMA5D3_ID_TC0 26 /* Timer Counter 0 */
46#define SAMA5D3_ID_TC1 27 /* Timer Counter 2 */
47#define SAMA5D3_ID_PWM 28 /* Pulse Width Modulation Controller */
48#define SAMA5D3_ID_ADC 29 /* Touch Screen ADC Controller */
49#define SAMA5D3_ID_DMA0 30 /* DMA Controller 0 */
50#define SAMA5D3_ID_DMA1 31 /* DMA Controller 1 */
51#define SAMA5D3_ID_UHPHS 32 /* USB Host High Speed */
52#define SAMA5D3_ID_UDPHS 33 /* USB Device High Speed */
53#define SAMA5D3_ID_GMAC 34 /* Gigabit Ethernet MAC */
54#define SAMA5D3_ID_EMAC 35 /* Ethernet MAC */
55#define SAMA5D3_ID_LCDC 36 /* LCD Controller */
56#define SAMA5D3_ID_ISI 37 /* Image Sensor Interface */
57#define SAMA5D3_ID_SSC0 38 /* Synchronous Serial Controller 0 */
58#define SAMA5D3_ID_SSC1 39 /* Synchronous Serial Controller 1 */
59#define SAMA5D3_ID_CAN0 40 /* CAN Controller 0 */
60#define SAMA5D3_ID_CAN1 41 /* CAN Controller 1 */
61#define SAMA5D3_ID_SHA 42 /* Secure Hash Algorithm */
62#define SAMA5D3_ID_AES 43 /* Advanced Encryption Standard */
63#define SAMA5D3_ID_TDES 44 /* Triple Data Encryption Standard */
64#define SAMA5D3_ID_TRNG 45 /* True Random Generator Number */
65#define SAMA5D3_ID_IRQ0 47 /* Advanced Interrupt Controller (IRQ0) */
66
67/*
68 * Internal Memory
69 */
70#define SAMA5D3_SRAM_BASE 0x00300000 /* Internal SRAM base address */
71#define SAMA5D3_SRAM_SIZE (128 * SZ_1K) /* Internal SRAM size (128Kb) */
72
73#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 73f1f250403a..530db304ec5e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -270,6 +270,8 @@ static int at91_pm_enter(suspend_state_t state)
270 at91rm9200_standby(); 270 at91rm9200_standby();
271 else if (cpu_is_at91sam9g45()) 271 else if (cpu_is_at91sam9g45())
272 at91sam9g45_standby(); 272 at91sam9g45_standby();
273 else if (cpu_is_at91sam9263())
274 at91sam9263_standby();
273 else 275 else
274 at91sam9_standby(); 276 at91sam9_standby();
275 break; 277 break;
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 38f467c6b710..2f5908f0b8c5 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -70,13 +70,31 @@ static inline void at91sam9g45_standby(void)
70 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); 70 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
71} 71}
72 72
73#ifdef CONFIG_SOC_AT91SAM9263 73/* We manage both DDRAM/SDRAM controllers, we need more than one value to
74/* 74 * remember.
75 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
76 * handle those cases both here and in the Suspend-To-RAM support.
77 */ 75 */
78#warning Assuming EB1 SDRAM controller is *NOT* used 76static inline void at91sam9263_standby(void)
79#endif 77{
78 u32 lpr0, lpr1;
79 u32 saved_lpr0, saved_lpr1;
80
81 saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
82 lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
83 lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
84
85 saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
86 lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
87 lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
88
89 /* self-refresh mode now */
90 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
91 at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
92
93 cpu_do_idle();
94
95 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
96 at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
97}
80 98
81static inline void at91sam9_standby(void) 99static inline void at91sam9_standby(void)
82{ 100{
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
new file mode 100644
index 000000000000..401279715ab1
--- /dev/null
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -0,0 +1,377 @@
1/*
2 * Chip-specific setup code for the SAMA5D3 family
3 *
4 * Copyright (C) 2013 Atmel,
5 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/dma-mapping.h>
12
13#include <asm/irq.h>
14#include <asm/mach/arch.h>
15#include <asm/mach/map.h>
16#include <mach/sama5d3.h>
17#include <mach/at91_pmc.h>
18#include <mach/cpu.h>
19
20#include "soc.h"
21#include "generic.h"
22#include "clock.h"
23#include "sam9_smc.h"
24
25/* --------------------------------------------------------------------
26 * Clocks
27 * -------------------------------------------------------------------- */
28
29/*
30 * The peripheral clocks.
31 */
32
33static struct clk pioA_clk = {
34 .name = "pioA_clk",
35 .pid = SAMA5D3_ID_PIOA,
36 .type = CLK_TYPE_PERIPHERAL,
37};
38static struct clk pioB_clk = {
39 .name = "pioB_clk",
40 .pid = SAMA5D3_ID_PIOB,
41 .type = CLK_TYPE_PERIPHERAL,
42};
43static struct clk pioC_clk = {
44 .name = "pioC_clk",
45 .pid = SAMA5D3_ID_PIOC,
46 .type = CLK_TYPE_PERIPHERAL,
47};
48static struct clk pioD_clk = {
49 .name = "pioD_clk",
50 .pid = SAMA5D3_ID_PIOD,
51 .type = CLK_TYPE_PERIPHERAL,
52};
53static struct clk pioE_clk = {
54 .name = "pioE_clk",
55 .pid = SAMA5D3_ID_PIOE,
56 .type = CLK_TYPE_PERIPHERAL,
57};
58static struct clk usart0_clk = {
59 .name = "usart0_clk",
60 .pid = SAMA5D3_ID_USART0,
61 .type = CLK_TYPE_PERIPHERAL,
62 .div = AT91_PMC_PCR_DIV2,
63};
64static struct clk usart1_clk = {
65 .name = "usart1_clk",
66 .pid = SAMA5D3_ID_USART1,
67 .type = CLK_TYPE_PERIPHERAL,
68 .div = AT91_PMC_PCR_DIV2,
69};
70static struct clk usart2_clk = {
71 .name = "usart2_clk",
72 .pid = SAMA5D3_ID_USART2,
73 .type = CLK_TYPE_PERIPHERAL,
74 .div = AT91_PMC_PCR_DIV2,
75};
76static struct clk usart3_clk = {
77 .name = "usart3_clk",
78 .pid = SAMA5D3_ID_USART3,
79 .type = CLK_TYPE_PERIPHERAL,
80 .div = AT91_PMC_PCR_DIV2,
81};
82static struct clk uart0_clk = {
83 .name = "uart0_clk",
84 .pid = SAMA5D3_ID_UART0,
85 .type = CLK_TYPE_PERIPHERAL,
86 .div = AT91_PMC_PCR_DIV2,
87};
88static struct clk uart1_clk = {
89 .name = "uart1_clk",
90 .pid = SAMA5D3_ID_UART1,
91 .type = CLK_TYPE_PERIPHERAL,
92 .div = AT91_PMC_PCR_DIV2,
93};
94static struct clk twi0_clk = {
95 .name = "twi0_clk",
96 .pid = SAMA5D3_ID_TWI0,
97 .type = CLK_TYPE_PERIPHERAL,
98 .div = AT91_PMC_PCR_DIV2,
99};
100static struct clk twi1_clk = {
101 .name = "twi1_clk",
102 .pid = SAMA5D3_ID_TWI1,
103 .type = CLK_TYPE_PERIPHERAL,
104 .div = AT91_PMC_PCR_DIV2,
105};
106static struct clk twi2_clk = {
107 .name = "twi2_clk",
108 .pid = SAMA5D3_ID_TWI2,
109 .type = CLK_TYPE_PERIPHERAL,
110 .div = AT91_PMC_PCR_DIV2,
111};
112static struct clk mmc0_clk = {
113 .name = "mci0_clk",
114 .pid = SAMA5D3_ID_HSMCI0,
115 .type = CLK_TYPE_PERIPHERAL,
116};
117static struct clk mmc1_clk = {
118 .name = "mci1_clk",
119 .pid = SAMA5D3_ID_HSMCI1,
120 .type = CLK_TYPE_PERIPHERAL,
121};
122static struct clk mmc2_clk = {
123 .name = "mci2_clk",
124 .pid = SAMA5D3_ID_HSMCI2,
125 .type = CLK_TYPE_PERIPHERAL,
126};
127static struct clk spi0_clk = {
128 .name = "spi0_clk",
129 .pid = SAMA5D3_ID_SPI0,
130 .type = CLK_TYPE_PERIPHERAL,
131};
132static struct clk spi1_clk = {
133 .name = "spi1_clk",
134 .pid = SAMA5D3_ID_SPI1,
135 .type = CLK_TYPE_PERIPHERAL,
136};
137static struct clk tcb0_clk = {
138 .name = "tcb0_clk",
139 .pid = SAMA5D3_ID_TC0,
140 .type = CLK_TYPE_PERIPHERAL,
141 .div = AT91_PMC_PCR_DIV2,
142};
143static struct clk tcb1_clk = {
144 .name = "tcb1_clk",
145 .pid = SAMA5D3_ID_TC1,
146 .type = CLK_TYPE_PERIPHERAL,
147 .div = AT91_PMC_PCR_DIV2,
148};
149static struct clk adc_clk = {
150 .name = "adc_clk",
151 .pid = SAMA5D3_ID_ADC,
152 .type = CLK_TYPE_PERIPHERAL,
153 .div = AT91_PMC_PCR_DIV2,
154};
155static struct clk adc_op_clk = {
156 .name = "adc_op_clk",
157 .type = CLK_TYPE_PERIPHERAL,
158 .rate_hz = 5000000,
159};
160static struct clk dma0_clk = {
161 .name = "dma0_clk",
162 .pid = SAMA5D3_ID_DMA0,
163 .type = CLK_TYPE_PERIPHERAL,
164};
165static struct clk dma1_clk = {
166 .name = "dma1_clk",
167 .pid = SAMA5D3_ID_DMA1,
168 .type = CLK_TYPE_PERIPHERAL,
169};
170static struct clk uhphs_clk = {
171 .name = "uhphs",
172 .pid = SAMA5D3_ID_UHPHS,
173 .type = CLK_TYPE_PERIPHERAL,
174};
175static struct clk udphs_clk = {
176 .name = "udphs_clk",
177 .pid = SAMA5D3_ID_UDPHS,
178 .type = CLK_TYPE_PERIPHERAL,
179};
180/* gmac only for sama5d33, sama5d34, sama5d35 */
181static struct clk macb0_clk = {
182 .name = "macb0_clk",
183 .pid = SAMA5D3_ID_GMAC,
184 .type = CLK_TYPE_PERIPHERAL,
185};
186/* emac only for sama5d31, sama5d35 */
187static struct clk macb1_clk = {
188 .name = "macb1_clk",
189 .pid = SAMA5D3_ID_EMAC,
190 .type = CLK_TYPE_PERIPHERAL,
191};
192/* lcd only for sama5d31, sama5d33, sama5d34 */
193static struct clk lcdc_clk = {
194 .name = "lcdc_clk",
195 .pid = SAMA5D3_ID_LCDC,
196 .type = CLK_TYPE_PERIPHERAL,
197};
198/* isi only for sama5d33, sama5d35 */
199static struct clk isi_clk = {
200 .name = "isi_clk",
201 .pid = SAMA5D3_ID_ISI,
202 .type = CLK_TYPE_PERIPHERAL,
203};
204static struct clk can0_clk = {
205 .name = "can0_clk",
206 .pid = SAMA5D3_ID_CAN0,
207 .type = CLK_TYPE_PERIPHERAL,
208 .div = AT91_PMC_PCR_DIV2,
209};
210static struct clk can1_clk = {
211 .name = "can1_clk",
212 .pid = SAMA5D3_ID_CAN1,
213 .type = CLK_TYPE_PERIPHERAL,
214 .div = AT91_PMC_PCR_DIV2,
215};
216static struct clk ssc0_clk = {
217 .name = "ssc0_clk",
218 .pid = SAMA5D3_ID_SSC0,
219 .type = CLK_TYPE_PERIPHERAL,
220 .div = AT91_PMC_PCR_DIV2,
221};
222static struct clk ssc1_clk = {
223 .name = "ssc1_clk",
224 .pid = SAMA5D3_ID_SSC1,
225 .type = CLK_TYPE_PERIPHERAL,
226 .div = AT91_PMC_PCR_DIV2,
227};
228static struct clk sha_clk = {
229 .name = "sha_clk",
230 .pid = SAMA5D3_ID_SHA,
231 .type = CLK_TYPE_PERIPHERAL,
232 .div = AT91_PMC_PCR_DIV8,
233};
234static struct clk aes_clk = {
235 .name = "aes_clk",
236 .pid = SAMA5D3_ID_AES,
237 .type = CLK_TYPE_PERIPHERAL,
238};
239static struct clk tdes_clk = {
240 .name = "tdes_clk",
241 .pid = SAMA5D3_ID_TDES,
242 .type = CLK_TYPE_PERIPHERAL,
243};
244
245static struct clk *periph_clocks[] __initdata = {
246 &pioA_clk,
247 &pioB_clk,
248 &pioC_clk,
249 &pioD_clk,
250 &pioE_clk,
251 &usart0_clk,
252 &usart1_clk,
253 &usart2_clk,
254 &usart3_clk,
255 &uart0_clk,
256 &uart1_clk,
257 &twi0_clk,
258 &twi1_clk,
259 &twi2_clk,
260 &mmc0_clk,
261 &mmc1_clk,
262 &mmc2_clk,
263 &spi0_clk,
264 &spi1_clk,
265 &tcb0_clk,
266 &tcb1_clk,
267 &adc_clk,
268 &adc_op_clk,
269 &dma0_clk,
270 &dma1_clk,
271 &uhphs_clk,
272 &udphs_clk,
273 &macb0_clk,
274 &macb1_clk,
275 &lcdc_clk,
276 &isi_clk,
277 &can0_clk,
278 &can1_clk,
279 &ssc0_clk,
280 &ssc1_clk,
281 &sha_clk,
282 &aes_clk,
283 &tdes_clk,
284};
285
286static struct clk pck0 = {
287 .name = "pck0",
288 .pmc_mask = AT91_PMC_PCK0,
289 .type = CLK_TYPE_PROGRAMMABLE,
290 .id = 0,
291};
292
293static struct clk pck1 = {
294 .name = "pck1",
295 .pmc_mask = AT91_PMC_PCK1,
296 .type = CLK_TYPE_PROGRAMMABLE,
297 .id = 1,
298};
299
300static struct clk pck2 = {
301 .name = "pck2",
302 .pmc_mask = AT91_PMC_PCK2,
303 .type = CLK_TYPE_PROGRAMMABLE,
304 .id = 2,
305};
306
307static struct clk_lookup periph_clocks_lookups[] = {
308 /* lookup table for DT entries */
309 CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
310 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
311 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
312 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
313 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioD_clk),
314 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioE_clk),
315 CLKDEV_CON_DEV_ID("usart", "f001c000.serial", &usart0_clk),
316 CLKDEV_CON_DEV_ID("usart", "f0020000.serial", &usart1_clk),
317 CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart2_clk),
318 CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart3_clk),
319 CLKDEV_CON_DEV_ID(NULL, "f0014000.i2c", &twi0_clk),
320 CLKDEV_CON_DEV_ID(NULL, "f0018000.i2c", &twi1_clk),
321 CLKDEV_CON_DEV_ID(NULL, "f801c000.i2c", &twi2_clk),
322 CLKDEV_CON_DEV_ID("mci_clk", "f0000000.mmc", &mmc0_clk),
323 CLKDEV_CON_DEV_ID("mci_clk", "f8000000.mmc", &mmc1_clk),
324 CLKDEV_CON_DEV_ID("mci_clk", "f8004000.mmc", &mmc2_clk),
325 CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi0_clk),
326 CLKDEV_CON_DEV_ID("spi_clk", "f8008000.spi", &spi1_clk),
327 CLKDEV_CON_DEV_ID("t0_clk", "f0010000.timer", &tcb0_clk),
328 CLKDEV_CON_DEV_ID("t0_clk", "f8014000.timer", &tcb1_clk),
329 CLKDEV_CON_DEV_ID("tsc_clk", "f8018000.tsadcc", &adc_clk),
330 CLKDEV_CON_DEV_ID("dma_clk", "ffffe600.dma-controller", &dma0_clk),
331 CLKDEV_CON_DEV_ID("dma_clk", "ffffe800.dma-controller", &dma1_clk),
332 CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
333 CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
334 CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
335 CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
336 CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
337 CLKDEV_CON_DEV_ID("hclk", "f0028000.ethernet", &macb0_clk),
338 CLKDEV_CON_DEV_ID("pclk", "f0028000.ethernet", &macb0_clk),
339 CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb1_clk),
340 CLKDEV_CON_DEV_ID("pclk", "f802c000.ethernet", &macb1_clk),
341 CLKDEV_CON_DEV_ID("pclk", "f0008000.ssc", &ssc0_clk),
342 CLKDEV_CON_DEV_ID("pclk", "f000c000.ssc", &ssc1_clk),
343 CLKDEV_CON_DEV_ID("can_clk", "f000c000.can", &can0_clk),
344 CLKDEV_CON_DEV_ID("can_clk", "f8010000.can", &can1_clk),
345 CLKDEV_CON_DEV_ID("sha_clk", "f8034000.sha", &sha_clk),
346 CLKDEV_CON_DEV_ID("aes_clk", "f8038000.aes", &aes_clk),
347 CLKDEV_CON_DEV_ID("tdes_clk", "f803c000.tdes", &tdes_clk),
348};
349
350static void __init sama5d3_register_clocks(void)
351{
352 int i;
353
354 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
355 clk_register(periph_clocks[i]);
356
357 clkdev_add_table(periph_clocks_lookups,
358 ARRAY_SIZE(periph_clocks_lookups));
359
360 clk_register(&pck0);
361 clk_register(&pck1);
362 clk_register(&pck2);
363}
364
365/* --------------------------------------------------------------------
366 * AT91SAM9x5 processor initialization
367 * -------------------------------------------------------------------- */
368
369static void __init sama5d3_map_io(void)
370{
371 at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE);
372}
373
374AT91_SOC_START(sama5d3)
375 .map_io = sama5d3_map_io,
376 .register_clocks = sama5d3_register_clocks,
377AT91_SOC_END
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 4b678478cf95..fd00a09da86b 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -105,28 +105,32 @@ static void __init soc_detect(u32 dbgu_base)
105 switch (socid) { 105 switch (socid) {
106 case ARCH_ID_AT91RM9200: 106 case ARCH_ID_AT91RM9200:
107 at91_soc_initdata.type = AT91_SOC_RM9200; 107 at91_soc_initdata.type = AT91_SOC_RM9200;
108 if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE) 108 if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
109 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; 109 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
110 at91_boot_soc = at91rm9200_soc; 110 at91_boot_soc = at91rm9200_soc;
111 break; 111 break;
112 112
113 case ARCH_ID_AT91SAM9260: 113 case ARCH_ID_AT91SAM9260:
114 at91_soc_initdata.type = AT91_SOC_SAM9260; 114 at91_soc_initdata.type = AT91_SOC_SAM9260;
115 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
115 at91_boot_soc = at91sam9260_soc; 116 at91_boot_soc = at91sam9260_soc;
116 break; 117 break;
117 118
118 case ARCH_ID_AT91SAM9261: 119 case ARCH_ID_AT91SAM9261:
119 at91_soc_initdata.type = AT91_SOC_SAM9261; 120 at91_soc_initdata.type = AT91_SOC_SAM9261;
121 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
120 at91_boot_soc = at91sam9261_soc; 122 at91_boot_soc = at91sam9261_soc;
121 break; 123 break;
122 124
123 case ARCH_ID_AT91SAM9263: 125 case ARCH_ID_AT91SAM9263:
124 at91_soc_initdata.type = AT91_SOC_SAM9263; 126 at91_soc_initdata.type = AT91_SOC_SAM9263;
127 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
125 at91_boot_soc = at91sam9263_soc; 128 at91_boot_soc = at91sam9263_soc;
126 break; 129 break;
127 130
128 case ARCH_ID_AT91SAM9G20: 131 case ARCH_ID_AT91SAM9G20:
129 at91_soc_initdata.type = AT91_SOC_SAM9G20; 132 at91_soc_initdata.type = AT91_SOC_SAM9G20;
133 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
130 at91_boot_soc = at91sam9260_soc; 134 at91_boot_soc = at91sam9260_soc;
131 break; 135 break;
132 136
@@ -139,6 +143,7 @@ static void __init soc_detect(u32 dbgu_base)
139 143
140 case ARCH_ID_AT91SAM9RL64: 144 case ARCH_ID_AT91SAM9RL64:
141 at91_soc_initdata.type = AT91_SOC_SAM9RL; 145 at91_soc_initdata.type = AT91_SOC_SAM9RL;
146 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
142 at91_boot_soc = at91sam9rl_soc; 147 at91_boot_soc = at91sam9rl_soc;
143 break; 148 break;
144 149
@@ -151,11 +156,17 @@ static void __init soc_detect(u32 dbgu_base)
151 at91_soc_initdata.type = AT91_SOC_SAM9N12; 156 at91_soc_initdata.type = AT91_SOC_SAM9N12;
152 at91_boot_soc = at91sam9n12_soc; 157 at91_boot_soc = at91sam9n12_soc;
153 break; 158 break;
159
160 case ARCH_ID_SAMA5D3:
161 at91_soc_initdata.type = AT91_SOC_SAMA5D3;
162 at91_boot_soc = sama5d3_soc;
163 break;
154 } 164 }
155 165
156 /* at91sam9g10 */ 166 /* at91sam9g10 */
157 if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { 167 if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
158 at91_soc_initdata.type = AT91_SOC_SAM9G10; 168 at91_soc_initdata.type = AT91_SOC_SAM9G10;
169 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
159 at91_boot_soc = at91sam9261_soc; 170 at91_boot_soc = at91sam9261_soc;
160 } 171 }
161 /* at91sam9xe */ 172 /* at91sam9xe */
@@ -206,6 +217,23 @@ static void __init soc_detect(u32 dbgu_base)
206 break; 217 break;
207 } 218 }
208 } 219 }
220
221 if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
222 switch (at91_soc_initdata.exid) {
223 case ARCH_EXID_SAMA5D31:
224 at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
225 break;
226 case ARCH_EXID_SAMA5D33:
227 at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
228 break;
229 case ARCH_EXID_SAMA5D34:
230 at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
231 break;
232 case ARCH_EXID_SAMA5D35:
233 at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
234 break;
235 }
236 }
209} 237}
210 238
211static const char *soc_name[] = { 239static const char *soc_name[] = {
@@ -219,7 +247,8 @@ static const char *soc_name[] = {
219 [AT91_SOC_SAM9RL] = "at91sam9rl", 247 [AT91_SOC_SAM9RL] = "at91sam9rl",
220 [AT91_SOC_SAM9X5] = "at91sam9x5", 248 [AT91_SOC_SAM9X5] = "at91sam9x5",
221 [AT91_SOC_SAM9N12] = "at91sam9n12", 249 [AT91_SOC_SAM9N12] = "at91sam9n12",
222 [AT91_SOC_NONE] = "Unknown" 250 [AT91_SOC_SAMA5D3] = "sama5d3",
251 [AT91_SOC_UNKNOWN] = "Unknown",
223}; 252};
224 253
225const char *at91_get_soc_type(struct at91_socinfo *c) 254const char *at91_get_soc_type(struct at91_socinfo *c)
@@ -241,7 +270,12 @@ static const char *soc_subtype_name[] = {
241 [AT91_SOC_SAM9X35] = "at91sam9x35", 270 [AT91_SOC_SAM9X35] = "at91sam9x35",
242 [AT91_SOC_SAM9G25] = "at91sam9g25", 271 [AT91_SOC_SAM9G25] = "at91sam9g25",
243 [AT91_SOC_SAM9X25] = "at91sam9x25", 272 [AT91_SOC_SAM9X25] = "at91sam9x25",
244 [AT91_SOC_SUBTYPE_NONE] = "Unknown" 273 [AT91_SOC_SAMA5D31] = "sama5d31",
274 [AT91_SOC_SAMA5D33] = "sama5d33",
275 [AT91_SOC_SAMA5D34] = "sama5d34",
276 [AT91_SOC_SAMA5D35] = "sama5d35",
277 [AT91_SOC_SUBTYPE_NONE] = "None",
278 [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
245}; 279};
246 280
247const char *at91_get_soc_subtype(struct at91_socinfo *c) 281const char *at91_get_soc_subtype(struct at91_socinfo *c)
@@ -255,8 +289,8 @@ void __init at91_map_io(void)
255 /* Map peripherals */ 289 /* Map peripherals */
256 iotable_init(&at91_io_desc, 1); 290 iotable_init(&at91_io_desc, 1);
257 291
258 at91_soc_initdata.type = AT91_SOC_NONE; 292 at91_soc_initdata.type = AT91_SOC_UNKNOWN;
259 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; 293 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
260 294
261 soc_detect(AT91_BASE_DBGU0); 295 soc_detect(AT91_BASE_DBGU0);
262 if (!at91_soc_is_detected()) 296 if (!at91_soc_is_detected())
@@ -267,8 +301,9 @@ void __init at91_map_io(void)
267 301
268 pr_info("AT91: Detected soc type: %s\n", 302 pr_info("AT91: Detected soc type: %s\n",
269 at91_get_soc_type(&at91_soc_initdata)); 303 at91_get_soc_type(&at91_soc_initdata));
270 pr_info("AT91: Detected soc subtype: %s\n", 304 if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
271 at91_get_soc_subtype(&at91_soc_initdata)); 305 pr_info("AT91: Detected soc subtype: %s\n",
306 at91_get_soc_subtype(&at91_soc_initdata));
272 307
273 if (!at91_soc_is_enabled()) 308 if (!at91_soc_is_enabled())
274 panic("AT91: Soc not enabled"); 309 panic("AT91: Soc not enabled");
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 9c6d3d4f9a23..43a225f9e713 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -22,9 +22,10 @@ extern struct at91_init_soc at91sam9g45_soc;
22extern struct at91_init_soc at91sam9rl_soc; 22extern struct at91_init_soc at91sam9rl_soc;
23extern struct at91_init_soc at91sam9x5_soc; 23extern struct at91_init_soc at91sam9x5_soc;
24extern struct at91_init_soc at91sam9n12_soc; 24extern struct at91_init_soc at91sam9n12_soc;
25extern struct at91_init_soc sama5d3_soc;
25 26
26#define AT91_SOC_START(_name) \ 27#define AT91_SOC_START(_name) \
27struct at91_init_soc __initdata at91##_name##_soc \ 28struct at91_init_soc __initdata _name##_soc \
28 __used \ 29 __used \
29 = { \ 30 = { \
30 .builtin = 1, \ 31 .builtin = 1, \
@@ -68,3 +69,7 @@ static inline int at91_soc_is_enabled(void)
68#if !defined(CONFIG_SOC_AT91SAM9N12) 69#if !defined(CONFIG_SOC_AT91SAM9N12)
69#define at91sam9n12_soc at91_boot_soc 70#define at91sam9n12_soc at91_boot_soc
70#endif 71#endif
72
73#if !defined(CONFIG_SOC_SAMA5D3)
74#define sama5d3_soc at91_boot_soc
75#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 19:52:04 -0500