diff options
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r-- | arch/arm/kernel/devtree.c | 14 | ||||
-rw-r--r-- | arch/arm/kernel/perf_event_v7.c | 47 | ||||
-rw-r--r-- | arch/arm/kernel/vdso.c | 2 |
3 files changed, 40 insertions, 23 deletions
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c index 40ecd5f514a2..f676febbb270 100644 --- a/arch/arm/kernel/devtree.c +++ b/arch/arm/kernel/devtree.c | |||
@@ -88,6 +88,8 @@ void __init arm_dt_init_cpu_maps(void) | |||
88 | return; | 88 | return; |
89 | 89 | ||
90 | for_each_child_of_node(cpus, cpu) { | 90 | for_each_child_of_node(cpus, cpu) { |
91 | const __be32 *cell; | ||
92 | int prop_bytes; | ||
91 | u32 hwid; | 93 | u32 hwid; |
92 | 94 | ||
93 | if (of_node_cmp(cpu->type, "cpu")) | 95 | if (of_node_cmp(cpu->type, "cpu")) |
@@ -99,7 +101,8 @@ void __init arm_dt_init_cpu_maps(void) | |||
99 | * properties is considered invalid to build the | 101 | * properties is considered invalid to build the |
100 | * cpu_logical_map. | 102 | * cpu_logical_map. |
101 | */ | 103 | */ |
102 | if (of_property_read_u32(cpu, "reg", &hwid)) { | 104 | cell = of_get_property(cpu, "reg", &prop_bytes); |
105 | if (!cell || prop_bytes < sizeof(*cell)) { | ||
103 | pr_debug(" * %s missing reg property\n", | 106 | pr_debug(" * %s missing reg property\n", |
104 | cpu->full_name); | 107 | cpu->full_name); |
105 | of_node_put(cpu); | 108 | of_node_put(cpu); |
@@ -107,10 +110,15 @@ void __init arm_dt_init_cpu_maps(void) | |||
107 | } | 110 | } |
108 | 111 | ||
109 | /* | 112 | /* |
110 | * 8 MSBs must be set to 0 in the DT since the reg property | 113 | * Bits n:24 must be set to 0 in the DT since the reg property |
111 | * defines the MPIDR[23:0]. | 114 | * defines the MPIDR[23:0]. |
112 | */ | 115 | */ |
113 | if (hwid & ~MPIDR_HWID_BITMASK) { | 116 | do { |
117 | hwid = be32_to_cpu(*cell++); | ||
118 | prop_bytes -= sizeof(*cell); | ||
119 | } while (!hwid && prop_bytes > 0); | ||
120 | |||
121 | if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) { | ||
114 | of_node_put(cpu); | 122 | of_node_put(cpu); |
115 | return; | 123 | return; |
116 | } | 124 | } |
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 15063851cd10..b9423491b9d7 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c | |||
@@ -596,12 +596,6 @@ static struct attribute_group armv7_pmuv1_events_attr_group = { | |||
596 | .attrs = armv7_pmuv1_event_attrs, | 596 | .attrs = armv7_pmuv1_event_attrs, |
597 | }; | 597 | }; |
598 | 598 | ||
599 | static const struct attribute_group *armv7_pmuv1_attr_groups[] = { | ||
600 | &armv7_pmuv1_events_attr_group, | ||
601 | &armv7_pmu_format_attr_group, | ||
602 | NULL, | ||
603 | }; | ||
604 | |||
605 | ARMV7_EVENT_ATTR(mem_access, ARMV7_PERFCTR_MEM_ACCESS); | 599 | ARMV7_EVENT_ATTR(mem_access, ARMV7_PERFCTR_MEM_ACCESS); |
606 | ARMV7_EVENT_ATTR(l1i_cache, ARMV7_PERFCTR_L1_ICACHE_ACCESS); | 600 | ARMV7_EVENT_ATTR(l1i_cache, ARMV7_PERFCTR_L1_ICACHE_ACCESS); |
607 | ARMV7_EVENT_ATTR(l1d_cache_wb, ARMV7_PERFCTR_L1_DCACHE_WB); | 601 | ARMV7_EVENT_ATTR(l1d_cache_wb, ARMV7_PERFCTR_L1_DCACHE_WB); |
@@ -653,12 +647,6 @@ static struct attribute_group armv7_pmuv2_events_attr_group = { | |||
653 | .attrs = armv7_pmuv2_event_attrs, | 647 | .attrs = armv7_pmuv2_event_attrs, |
654 | }; | 648 | }; |
655 | 649 | ||
656 | static const struct attribute_group *armv7_pmuv2_attr_groups[] = { | ||
657 | &armv7_pmuv2_events_attr_group, | ||
658 | &armv7_pmu_format_attr_group, | ||
659 | NULL, | ||
660 | }; | ||
661 | |||
662 | /* | 650 | /* |
663 | * Perf Events' indices | 651 | * Perf Events' indices |
664 | */ | 652 | */ |
@@ -1208,7 +1196,10 @@ static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) | |||
1208 | armv7pmu_init(cpu_pmu); | 1196 | armv7pmu_init(cpu_pmu); |
1209 | cpu_pmu->name = "armv7_cortex_a8"; | 1197 | cpu_pmu->name = "armv7_cortex_a8"; |
1210 | cpu_pmu->map_event = armv7_a8_map_event; | 1198 | cpu_pmu->map_event = armv7_a8_map_event; |
1211 | cpu_pmu->pmu.attr_groups = armv7_pmuv1_attr_groups; | 1199 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1200 | &armv7_pmuv1_events_attr_group; | ||
1201 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1202 | &armv7_pmu_format_attr_group; | ||
1212 | return armv7_probe_num_events(cpu_pmu); | 1203 | return armv7_probe_num_events(cpu_pmu); |
1213 | } | 1204 | } |
1214 | 1205 | ||
@@ -1217,7 +1208,10 @@ static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) | |||
1217 | armv7pmu_init(cpu_pmu); | 1208 | armv7pmu_init(cpu_pmu); |
1218 | cpu_pmu->name = "armv7_cortex_a9"; | 1209 | cpu_pmu->name = "armv7_cortex_a9"; |
1219 | cpu_pmu->map_event = armv7_a9_map_event; | 1210 | cpu_pmu->map_event = armv7_a9_map_event; |
1220 | cpu_pmu->pmu.attr_groups = armv7_pmuv1_attr_groups; | 1211 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1212 | &armv7_pmuv1_events_attr_group; | ||
1213 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1214 | &armv7_pmu_format_attr_group; | ||
1221 | return armv7_probe_num_events(cpu_pmu); | 1215 | return armv7_probe_num_events(cpu_pmu); |
1222 | } | 1216 | } |
1223 | 1217 | ||
@@ -1226,7 +1220,10 @@ static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) | |||
1226 | armv7pmu_init(cpu_pmu); | 1220 | armv7pmu_init(cpu_pmu); |
1227 | cpu_pmu->name = "armv7_cortex_a5"; | 1221 | cpu_pmu->name = "armv7_cortex_a5"; |
1228 | cpu_pmu->map_event = armv7_a5_map_event; | 1222 | cpu_pmu->map_event = armv7_a5_map_event; |
1229 | cpu_pmu->pmu.attr_groups = armv7_pmuv1_attr_groups; | 1223 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1224 | &armv7_pmuv1_events_attr_group; | ||
1225 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1226 | &armv7_pmu_format_attr_group; | ||
1230 | return armv7_probe_num_events(cpu_pmu); | 1227 | return armv7_probe_num_events(cpu_pmu); |
1231 | } | 1228 | } |
1232 | 1229 | ||
@@ -1236,7 +1233,10 @@ static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) | |||
1236 | cpu_pmu->name = "armv7_cortex_a15"; | 1233 | cpu_pmu->name = "armv7_cortex_a15"; |
1237 | cpu_pmu->map_event = armv7_a15_map_event; | 1234 | cpu_pmu->map_event = armv7_a15_map_event; |
1238 | cpu_pmu->set_event_filter = armv7pmu_set_event_filter; | 1235 | cpu_pmu->set_event_filter = armv7pmu_set_event_filter; |
1239 | cpu_pmu->pmu.attr_groups = armv7_pmuv2_attr_groups; | 1236 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1237 | &armv7_pmuv2_events_attr_group; | ||
1238 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1239 | &armv7_pmu_format_attr_group; | ||
1240 | return armv7_probe_num_events(cpu_pmu); | 1240 | return armv7_probe_num_events(cpu_pmu); |
1241 | } | 1241 | } |
1242 | 1242 | ||
@@ -1246,7 +1246,10 @@ static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu) | |||
1246 | cpu_pmu->name = "armv7_cortex_a7"; | 1246 | cpu_pmu->name = "armv7_cortex_a7"; |
1247 | cpu_pmu->map_event = armv7_a7_map_event; | 1247 | cpu_pmu->map_event = armv7_a7_map_event; |
1248 | cpu_pmu->set_event_filter = armv7pmu_set_event_filter; | 1248 | cpu_pmu->set_event_filter = armv7pmu_set_event_filter; |
1249 | cpu_pmu->pmu.attr_groups = armv7_pmuv2_attr_groups; | 1249 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1250 | &armv7_pmuv2_events_attr_group; | ||
1251 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1252 | &armv7_pmu_format_attr_group; | ||
1250 | return armv7_probe_num_events(cpu_pmu); | 1253 | return armv7_probe_num_events(cpu_pmu); |
1251 | } | 1254 | } |
1252 | 1255 | ||
@@ -1256,7 +1259,10 @@ static int armv7_a12_pmu_init(struct arm_pmu *cpu_pmu) | |||
1256 | cpu_pmu->name = "armv7_cortex_a12"; | 1259 | cpu_pmu->name = "armv7_cortex_a12"; |
1257 | cpu_pmu->map_event = armv7_a12_map_event; | 1260 | cpu_pmu->map_event = armv7_a12_map_event; |
1258 | cpu_pmu->set_event_filter = armv7pmu_set_event_filter; | 1261 | cpu_pmu->set_event_filter = armv7pmu_set_event_filter; |
1259 | cpu_pmu->pmu.attr_groups = armv7_pmuv2_attr_groups; | 1262 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1263 | &armv7_pmuv2_events_attr_group; | ||
1264 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1265 | &armv7_pmu_format_attr_group; | ||
1260 | return armv7_probe_num_events(cpu_pmu); | 1266 | return armv7_probe_num_events(cpu_pmu); |
1261 | } | 1267 | } |
1262 | 1268 | ||
@@ -1264,7 +1270,10 @@ static int armv7_a17_pmu_init(struct arm_pmu *cpu_pmu) | |||
1264 | { | 1270 | { |
1265 | int ret = armv7_a12_pmu_init(cpu_pmu); | 1271 | int ret = armv7_a12_pmu_init(cpu_pmu); |
1266 | cpu_pmu->name = "armv7_cortex_a17"; | 1272 | cpu_pmu->name = "armv7_cortex_a17"; |
1267 | cpu_pmu->pmu.attr_groups = armv7_pmuv2_attr_groups; | 1273 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = |
1274 | &armv7_pmuv2_events_attr_group; | ||
1275 | cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = | ||
1276 | &armv7_pmu_format_attr_group; | ||
1268 | return ret; | 1277 | return ret; |
1269 | } | 1278 | } |
1270 | 1279 | ||
diff --git a/arch/arm/kernel/vdso.c b/arch/arm/kernel/vdso.c index 994e971a8538..a0affd14086a 100644 --- a/arch/arm/kernel/vdso.c +++ b/arch/arm/kernel/vdso.c | |||
@@ -270,7 +270,7 @@ static bool tk_is_cntvct(const struct timekeeper *tk) | |||
270 | if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) | 270 | if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) |
271 | return false; | 271 | return false; |
272 | 272 | ||
273 | if (strcmp(tk->tkr_mono.clock->name, "arch_sys_counter") != 0) | 273 | if (!tk->tkr_mono.clock->archdata.vdso_direct) |
274 | return false; | 274 | return false; |
275 | 275 | ||
276 | return true; | 276 | return true; |