diff options
Diffstat (limited to 'arch/arm/include/asm/tlbflush.h')
-rw-r--r-- | arch/arm/include/asm/tlbflush.h | 36 |
1 files changed, 27 insertions, 9 deletions
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index 33b546ae72d4..ce7378ea15a2 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h | |||
@@ -70,6 +70,10 @@ | |||
70 | #undef _TLB | 70 | #undef _TLB |
71 | #undef MULTI_TLB | 71 | #undef MULTI_TLB |
72 | 72 | ||
73 | #ifdef CONFIG_SMP_ON_UP | ||
74 | #define MULTI_TLB 1 | ||
75 | #endif | ||
76 | |||
73 | #define v3_tlb_flags (TLB_V3_FULL | TLB_V3_PAGE) | 77 | #define v3_tlb_flags (TLB_V3_FULL | TLB_V3_PAGE) |
74 | 78 | ||
75 | #ifdef CONFIG_CPU_TLB_V3 | 79 | #ifdef CONFIG_CPU_TLB_V3 |
@@ -185,17 +189,23 @@ | |||
185 | # define v6wbi_always_flags (-1UL) | 189 | # define v6wbi_always_flags (-1UL) |
186 | #endif | 190 | #endif |
187 | 191 | ||
188 | #ifdef CONFIG_SMP | 192 | #define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \ |
189 | #define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \ | ||
190 | TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID) | 193 | TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID) |
191 | #else | 194 | #define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BTB | \ |
192 | #define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \ | ||
193 | TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID) | 195 | TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID) |
194 | #endif | ||
195 | 196 | ||
196 | #ifdef CONFIG_CPU_TLB_V7 | 197 | #ifdef CONFIG_CPU_TLB_V7 |
197 | # define v7wbi_possible_flags v7wbi_tlb_flags | 198 | |
198 | # define v7wbi_always_flags v7wbi_tlb_flags | 199 | # ifdef CONFIG_SMP_ON_UP |
200 | # define v7wbi_possible_flags (v7wbi_tlb_flags_smp | v7wbi_tlb_flags_up) | ||
201 | # define v7wbi_always_flags (v7wbi_tlb_flags_smp & v7wbi_tlb_flags_up) | ||
202 | # elif defined(CONFIG_SMP) | ||
203 | # define v7wbi_possible_flags v7wbi_tlb_flags_smp | ||
204 | # define v7wbi_always_flags v7wbi_tlb_flags_smp | ||
205 | # else | ||
206 | # define v7wbi_possible_flags v7wbi_tlb_flags_up | ||
207 | # define v7wbi_always_flags v7wbi_tlb_flags_up | ||
208 | # endif | ||
199 | # ifdef _TLB | 209 | # ifdef _TLB |
200 | # define MULTI_TLB 1 | 210 | # define MULTI_TLB 1 |
201 | # else | 211 | # else |
@@ -560,12 +570,20 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); | |||
560 | #endif | 570 | #endif |
561 | 571 | ||
562 | /* | 572 | /* |
563 | * if PG_dcache_dirty is set for the page, we need to ensure that any | 573 | * If PG_dcache_clean is not set for the page, we need to ensure that any |
564 | * cache entries for the kernels virtual memory range are written | 574 | * cache entries for the kernels virtual memory range are written |
565 | * back to the page. | 575 | * back to the page. On ARMv6 and later, the cache coherency is handled via |
576 | * the set_pte_at() function. | ||
566 | */ | 577 | */ |
578 | #if __LINUX_ARM_ARCH__ < 6 | ||
567 | extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, | 579 | extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, |
568 | pte_t *ptep); | 580 | pte_t *ptep); |
581 | #else | ||
582 | static inline void update_mmu_cache(struct vm_area_struct *vma, | ||
583 | unsigned long addr, pte_t *ptep) | ||
584 | { | ||
585 | } | ||
586 | #endif | ||
569 | 587 | ||
570 | #endif | 588 | #endif |
571 | 589 | ||