diff options
Diffstat (limited to 'arch/arm/boot/dts/am33xx.dtsi')
-rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 157 |
1 files changed, 142 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index a4615b44f25e..c2f14e875eb6 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | compatible = "ti,am33xx"; | 14 | compatible = "ti,am33xx"; |
15 | interrupt-parent = <&intc>; | ||
15 | 16 | ||
16 | aliases { | 17 | aliases { |
17 | serial0 = &uart1; | 18 | serial0 = &uart1; |
@@ -25,6 +26,21 @@ | |||
25 | cpus { | 26 | cpus { |
26 | cpu@0 { | 27 | cpu@0 { |
27 | compatible = "arm,cortex-a8"; | 28 | compatible = "arm,cortex-a8"; |
29 | |||
30 | /* | ||
31 | * To consider voltage drop between PMIC and SoC, | ||
32 | * tolerance value is reduced to 2% from 4% and | ||
33 | * voltage value is increased as a precaution. | ||
34 | */ | ||
35 | operating-points = < | ||
36 | /* kHz uV */ | ||
37 | 720000 1285000 | ||
38 | 600000 1225000 | ||
39 | 500000 1125000 | ||
40 | 275000 1125000 | ||
41 | >; | ||
42 | voltage-tolerance = <2>; /* 2 percentage */ | ||
43 | clock-latency = <300000>; /* From omap-cpufreq driver */ | ||
28 | }; | 44 | }; |
29 | }; | 45 | }; |
30 | 46 | ||
@@ -40,6 +56,15 @@ | |||
40 | }; | 56 | }; |
41 | }; | 57 | }; |
42 | 58 | ||
59 | am33xx_pinmux: pinmux@44e10800 { | ||
60 | compatible = "pinctrl-single"; | ||
61 | reg = <0x44e10800 0x0238>; | ||
62 | #address-cells = <1>; | ||
63 | #size-cells = <0>; | ||
64 | pinctrl-single,register-width = <32>; | ||
65 | pinctrl-single,function-mask = <0x7f>; | ||
66 | }; | ||
67 | |||
43 | /* | 68 | /* |
44 | * XXX: Use a flat representation of the AM33XX interconnect. | 69 | * XXX: Use a flat representation of the AM33XX interconnect. |
45 | * The real AM33XX interconnect network is quite complex.Since | 70 | * The real AM33XX interconnect network is quite complex.Since |
@@ -70,7 +95,6 @@ | |||
70 | interrupt-controller; | 95 | interrupt-controller; |
71 | #interrupt-cells = <1>; | 96 | #interrupt-cells = <1>; |
72 | reg = <0x44e07000 0x1000>; | 97 | reg = <0x44e07000 0x1000>; |
73 | interrupt-parent = <&intc>; | ||
74 | interrupts = <96>; | 98 | interrupts = <96>; |
75 | }; | 99 | }; |
76 | 100 | ||
@@ -82,7 +106,6 @@ | |||
82 | interrupt-controller; | 106 | interrupt-controller; |
83 | #interrupt-cells = <1>; | 107 | #interrupt-cells = <1>; |
84 | reg = <0x4804c000 0x1000>; | 108 | reg = <0x4804c000 0x1000>; |
85 | interrupt-parent = <&intc>; | ||
86 | interrupts = <98>; | 109 | interrupts = <98>; |
87 | }; | 110 | }; |
88 | 111 | ||
@@ -94,7 +117,6 @@ | |||
94 | interrupt-controller; | 117 | interrupt-controller; |
95 | #interrupt-cells = <1>; | 118 | #interrupt-cells = <1>; |
96 | reg = <0x481ac000 0x1000>; | 119 | reg = <0x481ac000 0x1000>; |
97 | interrupt-parent = <&intc>; | ||
98 | interrupts = <32>; | 120 | interrupts = <32>; |
99 | }; | 121 | }; |
100 | 122 | ||
@@ -106,7 +128,6 @@ | |||
106 | interrupt-controller; | 128 | interrupt-controller; |
107 | #interrupt-cells = <1>; | 129 | #interrupt-cells = <1>; |
108 | reg = <0x481ae000 0x1000>; | 130 | reg = <0x481ae000 0x1000>; |
109 | interrupt-parent = <&intc>; | ||
110 | interrupts = <62>; | 131 | interrupts = <62>; |
111 | }; | 132 | }; |
112 | 133 | ||
@@ -115,7 +136,6 @@ | |||
115 | ti,hwmods = "uart1"; | 136 | ti,hwmods = "uart1"; |
116 | clock-frequency = <48000000>; | 137 | clock-frequency = <48000000>; |
117 | reg = <0x44e09000 0x2000>; | 138 | reg = <0x44e09000 0x2000>; |
118 | interrupt-parent = <&intc>; | ||
119 | interrupts = <72>; | 139 | interrupts = <72>; |
120 | status = "disabled"; | 140 | status = "disabled"; |
121 | }; | 141 | }; |
@@ -125,7 +145,6 @@ | |||
125 | ti,hwmods = "uart2"; | 145 | ti,hwmods = "uart2"; |
126 | clock-frequency = <48000000>; | 146 | clock-frequency = <48000000>; |
127 | reg = <0x48022000 0x2000>; | 147 | reg = <0x48022000 0x2000>; |
128 | interrupt-parent = <&intc>; | ||
129 | interrupts = <73>; | 148 | interrupts = <73>; |
130 | status = "disabled"; | 149 | status = "disabled"; |
131 | }; | 150 | }; |
@@ -135,7 +154,6 @@ | |||
135 | ti,hwmods = "uart3"; | 154 | ti,hwmods = "uart3"; |
136 | clock-frequency = <48000000>; | 155 | clock-frequency = <48000000>; |
137 | reg = <0x48024000 0x2000>; | 156 | reg = <0x48024000 0x2000>; |
138 | interrupt-parent = <&intc>; | ||
139 | interrupts = <74>; | 157 | interrupts = <74>; |
140 | status = "disabled"; | 158 | status = "disabled"; |
141 | }; | 159 | }; |
@@ -145,7 +163,6 @@ | |||
145 | ti,hwmods = "uart4"; | 163 | ti,hwmods = "uart4"; |
146 | clock-frequency = <48000000>; | 164 | clock-frequency = <48000000>; |
147 | reg = <0x481a6000 0x2000>; | 165 | reg = <0x481a6000 0x2000>; |
148 | interrupt-parent = <&intc>; | ||
149 | interrupts = <44>; | 166 | interrupts = <44>; |
150 | status = "disabled"; | 167 | status = "disabled"; |
151 | }; | 168 | }; |
@@ -155,7 +172,6 @@ | |||
155 | ti,hwmods = "uart5"; | 172 | ti,hwmods = "uart5"; |
156 | clock-frequency = <48000000>; | 173 | clock-frequency = <48000000>; |
157 | reg = <0x481a8000 0x2000>; | 174 | reg = <0x481a8000 0x2000>; |
158 | interrupt-parent = <&intc>; | ||
159 | interrupts = <45>; | 175 | interrupts = <45>; |
160 | status = "disabled"; | 176 | status = "disabled"; |
161 | }; | 177 | }; |
@@ -165,7 +181,6 @@ | |||
165 | ti,hwmods = "uart6"; | 181 | ti,hwmods = "uart6"; |
166 | clock-frequency = <48000000>; | 182 | clock-frequency = <48000000>; |
167 | reg = <0x481aa000 0x2000>; | 183 | reg = <0x481aa000 0x2000>; |
168 | interrupt-parent = <&intc>; | ||
169 | interrupts = <46>; | 184 | interrupts = <46>; |
170 | status = "disabled"; | 185 | status = "disabled"; |
171 | }; | 186 | }; |
@@ -176,7 +191,6 @@ | |||
176 | #size-cells = <0>; | 191 | #size-cells = <0>; |
177 | ti,hwmods = "i2c1"; | 192 | ti,hwmods = "i2c1"; |
178 | reg = <0x44e0b000 0x1000>; | 193 | reg = <0x44e0b000 0x1000>; |
179 | interrupt-parent = <&intc>; | ||
180 | interrupts = <70>; | 194 | interrupts = <70>; |
181 | status = "disabled"; | 195 | status = "disabled"; |
182 | }; | 196 | }; |
@@ -187,7 +201,6 @@ | |||
187 | #size-cells = <0>; | 201 | #size-cells = <0>; |
188 | ti,hwmods = "i2c2"; | 202 | ti,hwmods = "i2c2"; |
189 | reg = <0x4802a000 0x1000>; | 203 | reg = <0x4802a000 0x1000>; |
190 | interrupt-parent = <&intc>; | ||
191 | interrupts = <71>; | 204 | interrupts = <71>; |
192 | status = "disabled"; | 205 | status = "disabled"; |
193 | }; | 206 | }; |
@@ -198,7 +211,6 @@ | |||
198 | #size-cells = <0>; | 211 | #size-cells = <0>; |
199 | ti,hwmods = "i2c3"; | 212 | ti,hwmods = "i2c3"; |
200 | reg = <0x4819c000 0x1000>; | 213 | reg = <0x4819c000 0x1000>; |
201 | interrupt-parent = <&intc>; | ||
202 | interrupts = <30>; | 214 | interrupts = <30>; |
203 | status = "disabled"; | 215 | status = "disabled"; |
204 | }; | 216 | }; |
@@ -207,10 +219,126 @@ | |||
207 | compatible = "ti,omap3-wdt"; | 219 | compatible = "ti,omap3-wdt"; |
208 | ti,hwmods = "wd_timer2"; | 220 | ti,hwmods = "wd_timer2"; |
209 | reg = <0x44e35000 0x1000>; | 221 | reg = <0x44e35000 0x1000>; |
210 | interrupt-parent = <&intc>; | ||
211 | interrupts = <91>; | 222 | interrupts = <91>; |
212 | }; | 223 | }; |
213 | 224 | ||
225 | dcan0: d_can@481cc000 { | ||
226 | compatible = "bosch,d_can"; | ||
227 | ti,hwmods = "d_can0"; | ||
228 | reg = <0x481cc000 0x2000>; | ||
229 | interrupts = <52>; | ||
230 | status = "disabled"; | ||
231 | }; | ||
232 | |||
233 | dcan1: d_can@481d0000 { | ||
234 | compatible = "bosch,d_can"; | ||
235 | ti,hwmods = "d_can1"; | ||
236 | reg = <0x481d0000 0x2000>; | ||
237 | interrupts = <55>; | ||
238 | status = "disabled"; | ||
239 | }; | ||
240 | |||
241 | timer1: timer@44e31000 { | ||
242 | compatible = "ti,omap2-timer"; | ||
243 | reg = <0x44e31000 0x400>; | ||
244 | interrupts = <67>; | ||
245 | ti,hwmods = "timer1"; | ||
246 | ti,timer-alwon; | ||
247 | }; | ||
248 | |||
249 | timer2: timer@48040000 { | ||
250 | compatible = "ti,omap2-timer"; | ||
251 | reg = <0x48040000 0x400>; | ||
252 | interrupts = <68>; | ||
253 | ti,hwmods = "timer2"; | ||
254 | }; | ||
255 | |||
256 | timer3: timer@48042000 { | ||
257 | compatible = "ti,omap2-timer"; | ||
258 | reg = <0x48042000 0x400>; | ||
259 | interrupts = <69>; | ||
260 | ti,hwmods = "timer3"; | ||
261 | }; | ||
262 | |||
263 | timer4: timer@48044000 { | ||
264 | compatible = "ti,omap2-timer"; | ||
265 | reg = <0x48044000 0x400>; | ||
266 | interrupts = <92>; | ||
267 | ti,hwmods = "timer4"; | ||
268 | ti,timer-pwm; | ||
269 | }; | ||
270 | |||
271 | timer5: timer@48046000 { | ||
272 | compatible = "ti,omap2-timer"; | ||
273 | reg = <0x48046000 0x400>; | ||
274 | interrupts = <93>; | ||
275 | ti,hwmods = "timer5"; | ||
276 | ti,timer-pwm; | ||
277 | }; | ||
278 | |||
279 | timer6: timer@48048000 { | ||
280 | compatible = "ti,omap2-timer"; | ||
281 | reg = <0x48048000 0x400>; | ||
282 | interrupts = <94>; | ||
283 | ti,hwmods = "timer6"; | ||
284 | ti,timer-pwm; | ||
285 | }; | ||
286 | |||
287 | timer7: timer@4804a000 { | ||
288 | compatible = "ti,omap2-timer"; | ||
289 | reg = <0x4804a000 0x400>; | ||
290 | interrupts = <95>; | ||
291 | ti,hwmods = "timer7"; | ||
292 | ti,timer-pwm; | ||
293 | }; | ||
294 | |||
295 | rtc@44e3e000 { | ||
296 | compatible = "ti,da830-rtc"; | ||
297 | reg = <0x44e3e000 0x1000>; | ||
298 | interrupts = <75 | ||
299 | 76>; | ||
300 | ti,hwmods = "rtc"; | ||
301 | }; | ||
302 | |||
303 | spi0: spi@48030000 { | ||
304 | compatible = "ti,omap4-mcspi"; | ||
305 | #address-cells = <1>; | ||
306 | #size-cells = <0>; | ||
307 | reg = <0x48030000 0x400>; | ||
308 | interrupt = <65>; | ||
309 | ti,spi-num-cs = <2>; | ||
310 | ti,hwmods = "spi0"; | ||
311 | status = "disabled"; | ||
312 | }; | ||
313 | |||
314 | spi1: spi@481a0000 { | ||
315 | compatible = "ti,omap4-mcspi"; | ||
316 | #address-cells = <1>; | ||
317 | #size-cells = <0>; | ||
318 | reg = <0x481a0000 0x400>; | ||
319 | interrupt = <125>; | ||
320 | ti,spi-num-cs = <2>; | ||
321 | ti,hwmods = "spi1"; | ||
322 | status = "disabled"; | ||
323 | }; | ||
324 | |||
325 | usb@47400000 { | ||
326 | compatible = "ti,musb-am33xx"; | ||
327 | reg = <0x47400000 0x1000 /* usbss */ | ||
328 | 0x47401000 0x800 /* musb instance 0 */ | ||
329 | 0x47401800 0x800>; /* musb instance 1 */ | ||
330 | interrupts = <17 /* usbss */ | ||
331 | 18 /* musb instance 0 */ | ||
332 | 19>; /* musb instance 1 */ | ||
333 | multipoint = <1>; | ||
334 | num-eps = <16>; | ||
335 | ram-bits = <12>; | ||
336 | port0-mode = <3>; | ||
337 | port1-mode = <3>; | ||
338 | power = <250>; | ||
339 | ti,hwmods = "usb_otg_hs"; | ||
340 | }; | ||
341 | |||
214 | mac: ethernet@4a100000 { | 342 | mac: ethernet@4a100000 { |
215 | compatible = "ti,cpsw"; | 343 | compatible = "ti,cpsw"; |
216 | ti,hwmods = "cpgmac0"; | 344 | ti,hwmods = "cpgmac0"; |
@@ -256,7 +384,6 @@ | |||
256 | /* Filled in by U-Boot */ | 384 | /* Filled in by U-Boot */ |
257 | mac-address = [ 00 00 00 00 00 00 ]; | 385 | mac-address = [ 00 00 00 00 00 00 ]; |
258 | }; | 386 | }; |
259 | |||
260 | }; | 387 | }; |
261 | }; | 388 | }; |
262 | }; | 389 | }; |